The very first batch of CLAM asic was received on Monday this week, and the test results are quite satisfactory, power consumption in full compliance with the previous simulation results , the performance is far than expected.
Due to the bug of the board schematic released earlier, analog PLL power input is not properly grounded, causing wrong communication IO voltage. We fix this problem soon and after it CLAM chip gives the results we expected.
Now the results of the test are as follows :
1.1V voltage : 2.5w / G, the chip can run stably at a clock frequency of 320MHz, 2.56G/s hash power of the 8 cores in total
1.2V Voltage : 3.0w / G, the chip can run stably at 400MHz, 3.2G/s hash power in total
We also tested the chip at a higher frequency under 1.2V voltage: Single core can run at 500Mhz frequency , but because of chip performance exceeded expectations, inadequate thermal design of our test board can not support 8 cores simultaneously.
Therefore, we are improving our thermal design according to the test results, and looking forward to that CLAM can archive 4.0G/s of hash power very soon, it will be the highest performance in 55nm all chips.
Also, because of our high standard of chip design, and the high-standard Amkor's QFN100 package, test shows that CLAM can support up to 12w single-chip power dissipation at 500Mhz frequency, even higher.
We are modifying the design design of CLAM miner based on test data, high-quality CLAM miners will be released within one or two weeks.
Miner models may include :
Clam Mini: 6GH / s
C1: 200GH / s
C2: 350GH / s
C3: 1TH / s
Detailed specifications will be determined by the actual test before the release.
http://bweer.img38.wal8.com/img38/389497_20131123152021/138519212932.jpghttp://bweer.img38.wal8.com/img38/389497_20131123152021/138519212603.jpg
