DaDoctor (OP)
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February 04, 2014, 02:59:54 PM Last edit: February 04, 2014, 03:35:31 PM by DaDoctor |
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I am designing a USB bitcoin miner, and i need some help.
First of all, how would i implement an existing protocol over serial? i want to use an existing protocol so i can intergrate it easily with BFGminer, CGminer, etc... I only have serial available on the microcontroller i plan to use. some pseudo-code and/or c code about interfacing would be helpful.
Second of all, what exactly does the chip its self do? does it simply do an SHA256 hash and send it back, or is more going on? again, example code would be helpful.
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Colin Miner
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February 04, 2014, 05:49:55 PM |
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I only have serial available on the microcontroller i plan to use.
It would be more sensible to match the hardware to the job it needs to do, rather than picking some random controller and trying to get it to fit.
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DaDoctor (OP)
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February 04, 2014, 07:08:13 PM |
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This is more of a fun excersise than a plan to make a lot of money.
On a seperate thought, i hear the Icarus protocol is serial-based, but i can't find any documentation on it.
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Colin Miner
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February 04, 2014, 09:27:50 PM |
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This is more of a fun excersise than a plan to make a lot of money.
On a seperate thought, i hear the Icarus protocol is serial-based, but i can't find any documentation on it.
Icarus? None of the current hardware or firmware for the miners is open source, its all secret and protected by the manufacturers which is probably why you can't find any useful information. You may find something on FPGA in the icarus link (above) and some FPGA mining code to browse.
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dropt
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February 04, 2014, 09:30:32 PM |
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This is more of a fun excersise than a plan to make a lot of money.
On a seperate thought, i hear the Icarus protocol is serial-based, but i can't find any documentation on it.
Icarus? None of the current hardware or firmware for the miners is open source, its all secret and protected by the manufacturers which is probably why you can't find any useful information. You may find something on FPGA in the icarus link (above). Oddly enough, BFL open sourced their firware. Avalon did too IIRC.
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DaDoctor (OP)
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February 05, 2014, 04:10:26 AM |
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Thanks for the links. Porting Verilog to c++ is a pain! and the Butterfly labs code seemed to be 99% hashing chip management. I found this: https://www.youtube.com/all_comments?v=UvSVxC7dy9c . The author seemed determined not to share any code, though.
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