Open Source Bitcoin ASIC miner project that uses 2x BM1387 (Antminer S9)

[NebulaMiner]

that's sounds great,  i think the ESP32-S3 internal pull-up/pull-down resistors are usually 45k Ohms. How are you testing the BM1397 chip on the board ?

my bringup plan;

1. make sure I2C is working (done)
2. Make sure the DS4432U+ is alive (done)
3. Adjust the BM1397 core voltage to 1.5V with the DS4432U+ over I2C from the ESP32
4. Test the BM1397 with cgminer using the level shifted J6 debug header and a USB Serial cable
5. make some ESP32 FW to test the BM1397 from the ESP32

then..

6. Make proper drivers for the DS4432U+, EMC2102, INA260, and LEDs
7. Make sure the ESP32 can connect over WiFi (done)
8. Get stratum work from ckpool
9. Format work for the BM1397, and send it to the BM1397
10. send stratum responses

11. Mine BTC!

Great plan !

Finally my work is on point 6 (proper drivers, EMC2102 almost finished) and 9 (BM1397 driver).
I am also working on 8/10 (stratum library).

[1714563579]

1714563579

[1714563579]

1714563579

[1714563579]

1714563579

[1714563579]

1714563579

[pwakham]

You would think someone who works for Bitdeer repairing miners all day would remember that the 1397s tops are connected to ground. Silly me. I’ll have to think of something other than thermal pads because the goal is to be super quiet. (APW3 doesn’t qualify as super quiet i know, the 3.3 rail Isn’t a bad idea. I’ve used kicad before just more familiar with easyeda. What should the current be for two chips? The one i have is a 3.3v 1amp

Hey, Bitdeer is a Bitmain offshoot, right??

The APW3 sounds a lot better if you put a Noctua fan in there.

Current for two chips in series is the same as one. Rumor has it a single BM1397 can hit 25W if you really go for it. So, that's like 15A for two chips at 3.3V

ive never built the bitaxe before so whats the power draw on there to get say around 700gh? I know on the s17+ you can get it to around 370gh per chip. yes bitdeer is the offshoot of bitmain. we dont do any manufacturing only cloud hosting, this is just a personal project. the heatsink issue is confounding me and I really am just tempted to use thermal pads but I know how hot these things run and just dont think that will cut it unless youre at like 100mhz, thermal paste would work but you run the risk of not putting enough on and it making contact same with thermal adhesive. The way the 17+ is laid out it has seperate heatsinks per asic but thats also in a machine with a 6000 rpm fan which im looking for this to sit on the corner in the floor and you basically forget about it, maybe get lucky with a block, or just hope pricing goes back up and by then even the little bit youve mined would be worth something. its really frustrating that you either can only do a hobby project with just a few chips or you have to go for it and basically just clone a hashboard. cause I can now see that my design wouldnt really work anyway because if its drawing that much power per two chips in series then me having 6 sets would make it impossible to feed, which refers back to at that point you basically just have to clone a board just with less chips.

[TalkativeCoin]

The APW3 sounds a lot better if you put a Noctua fan in there.

Do you use any kind of LNA/resistor for it or just run off the nominal voltage?

[n0nce]

Hello My name is Peyton and after coming across your project on github it inspired me to work on my own product which I didnt realize until today that it was discussed on the forum page about the bitaxe 1387 version. but anyway my project is a 12 asic BM1397 hashboard that is the same formfactor as a matx motherboard so you can put it in a slim matx case. my plan is to power it with an apw 3. I will link some 3d renders of it. But the plan is to cool it with standard LGA1151 heatsinks and its 4 asics per heatsinks and 3 heatsinks. My idea which im not sure if it will work is to basically have 6 domains where there are 6 sets of two chips in series. the power will come from 12 volt of the apw3 and get stepped down to 5v then 3.3v which then powers the 2 asic domain splitting the power into 2 coming to that 1.6 vdd line it needs. It also will be controlled by a rpi cm4. That will run the linux which runs kano theoretically. What I think I need your help on is the actual communication portion. my plan is to make a built in ttl connector which is hardwired into the cm4 as a usb port with a dip switch to power it off if necessary. I think I can figure out how to wire that ttl connector up no problem, what I dont know how to do is connect the asics to said "ttl adapter" or how to actually make the chips do any work. any guidance you can give me of how to connect and communicate with the asics would be much appreciated and lmk what you think!

overall (front and back):


asic layout, 8 pin ic 5v 5 pin 3.3v, not fully put together but should work in theory?


serial ttl adapter, 12v power, cm4, gpio pin set, startings of power circuitry to power the cm4


I am designing it through easy eda as thats the software I like best and could send you the files if youd like. again any help would be appreciated!

Quote with image tags.

It would honestly be great if you could export those EasyEDA files to KiCAD and then push that KiCAD project to GitHub & continue developing it on KiCAD. I switched myself, too, following Skot's advice and it's not only been easy to switch, but this software is also sooo much better. World of difference.

I wonder if you could make it work with normal PC power supplies that also fit in the matx case? Don't they have some beefy 3.3V rails?

Nowadays most power goes to 12V. For instance, this 1600W premium unit from Seasonic only delivers 82.5W of those 1600 on the 3.3V rail.
https://seasonic.com/prime-tx#specification

Lower specced PSU's still deliver 20A, but that's pretty wasteful. You're looking at using 66W out of a 650W unit.

Maybe put your design files up on GitHub and post the link here?
Also, You should really check out KiCad! It's free, open source, cross platform and great for sharing files on the internet. It's a bit quirky to learn at first, but if you can get past that you'll love it. No advertisements either 

You were faster!

Rumor has it a single BM1397 can hit 25W if you really go for it. So, that's like 15A for two chips at 3.3V

ive never built the bitaxe before so whats the power draw on there to get say around 700gh? I know on the s17+ you can get it to around 370gh per chip.

I am right now running 6 BM1397 in the R909 that Skot linked to you earlier, producing 2.133Th/s at around 100W. So you need 2 chips at 350GH/s each and those will pull about 30W together. Giving them more juice just makes them run too hot and getting less efficient.

thermal paste would work but you run the risk of not putting enough on and it making contact same with thermal adhesive.

Thermal paste would still give you contact in some areas. It is just meant to fill tiny imperfections in the metal of heatsink & chip, not to create an electrically insulating layer between them.

Maybe look into graphite thermal pads. They have very high thermal conductivity (like paste) and I believe low electrical conductivity.

The way the 17+ is laid out it has seperate heatsinks per asic but thats also in a machine with a 6000 rpm fan

You could buy yourself an R909 and open it up (I won't do it with mine); I see 2 beefy heatsinks, one per side of the PCB. It has 6 chips. No idea how sidehack did it.

[pwakham]

I am mostly opposed to kicad mostly because my workflow has been adjusted to ezeda and I know the hotkeys by heart none of those transfer over to kicad and I havent been too eager to look how to change hotkeys. One thing I think could be possible is to have them in one domain. S17+ miners have 13 domains of 5 chips making 65 chips. in those domains the gnd only becomes an issue on the 1397 if it is crossing domains. only issue is now I have to figure out how to make 3 domains of 4 chips lol. I wanted to design this for the 1398 as thats what I have the most access to and runs on .36 volts just a lot of current but after learning that kanoi only goes up to a 1397 kinda hampers that and I dont want to design something then wait for compatability

[GizmoMiner]

got the ESP32 LED Controller running with the bitaxe RGB LEDs -- bright orange, of course!



Ordered a 40x40x10mm 5V 4-pin Noctua fan so I can try out changing the fan speed with the EMC2101

So very cool!!! Going to make a really neat case for it.

[GizmoMiner]

I think it makes sense to have a separate RTOS thread/task listening to, parsing and acting on BM1397 responses. Low latency with good hashes seems important!

Oh yes, you want to get those out immediately. Would definitely work with threads / tasks / listeners (whatever fits the framework or programming language used). On the other hand, I don't think the main task needs to do much while the ASIC is hashing, no?

In that case, it would be possible to do the ASIC comms on main thread and periodically / on background thread fetch new block templates from the pool. Whatever is most performant, I'd suggest.

You would not happen to have a stl, obj 3d model of the complete assembled Bitaxe would you? With heatsink and fan? Exact size of the completed Bitaxe in stl file format?

Here's the .obj; I just exported from KiCAD, then converted it using Blender.
You will need to find or model the heatsink & fan yourself, as I don't have those models.

Having some issues getting the bitaxe obj to actual real world scale? Seems to get exported 3000x smaller to real life scale. Got any advice?

[GizmoMiner]

Hello My name is Peyton and after coming across your project on github it inspired me to work on my own product which I didnt realize until today that it was discussed on the forum page about the bitaxe 1387 version. but anyway my project is a 12 asic BM1397 hashboard that is the same formfactor as a matx motherboard so you can put it in a slim matx case. my plan is to power it with an apw 3. I will link some 3d renders of it. But the plan is to cool it with standard LGA1151 heatsinks and its 4 asics per heatsinks and 3 heatsinks. My idea which im not sure if it will work is to basically have 6 domains where there are 6 sets of two chips in series. the power will come from 12 volt of the apw3 and get stepped down to 5v then 3.3v which then powers the 2 asic domain splitting the power into 2 coming to that 1.6 vdd line it needs. It also will be controlled by a rpi cm4. That will run the linux which runs kano theoretically. What I think I need your help on is the actual communication portion. my plan is to make a built in ttl connector which is hardwired into the cm4 as a usb port with a dip switch to power it off if necessary. I think I can figure out how to wire that ttl connector up no problem, what I dont know how to do is connect the asics to said "ttl adapter" or how to actually make the chips do any work. any guidance you can give me of how to connect and communicate with the asics would be much appreciated and lmk what you think!

https://gyazo.com/24625a4510e0393d42d2ae27f94f5ebc - overall
https://gyazo.com/438c1e7d3284387ee43fe1a1162a8a45 - overall back
https://gyazo.com/ae867ddc0d43c6b0dc4fe1b36e88fbf1 - asic layout, 8 pin ic 5v 5 pin 3.3v, not fully put together but should work in theory?
https://gyazo.com/91955ccfa9e6b9f295086913b4efdbb6 - serial ttl adapter, 12v power, cm4, gpio pin set, startings of power circuitry to power the cm4

I am designing it through easy eda as thats the software I like best and could send you the files if youd like. again any help would be appreciated!

You should join us at Discord. Just a fun place to collaborate on tiny bitcoin mining gadgets and gizmos . Knowledge base and trying to get some tutorials on there as well. Collaborate, share knowledge and have some fun.

[Skot]

Hello My name is Peyton and after coming across your project on github it inspired me to work on my own product which I didnt realize until today that it was discussed on the forum page about the bitaxe 1387 version. but anyway my project is a 12 asic BM1397 hashboard that is the same formfactor as a matx motherboard so you can put it in a slim matx case. my plan is to power it with an apw 3. I will link some 3d renders of it. But the plan is to cool it with standard LGA1151 heatsinks and its 4 asics per heatsinks and 3 heatsinks. My idea which im not sure if it will work is to basically have 6 domains where there are 6 sets of two chips in series. the power will come from 12 volt of the apw3 and get stepped down to 5v then 3.3v which then powers the 2 asic domain splitting the power into 2 coming to that 1.6 vdd line it needs. It also will be controlled by a rpi cm4. That will run the linux which runs kano theoretically. What I think I need your help on is the actual communication portion. my plan is to make a built in ttl connector which is hardwired into the cm4 as a usb port with a dip switch to power it off if necessary. I think I can figure out how to wire that ttl connector up no problem, what I dont know how to do is connect the asics to said "ttl adapter" or how to actually make the chips do any work. any guidance you can give me of how to connect and communicate with the asics would be much appreciated and lmk what you think!

https://gyazo.com/24625a4510e0393d42d2ae27f94f5ebc - overall
https://gyazo.com/438c1e7d3284387ee43fe1a1162a8a45 - overall back
https://gyazo.com/ae867ddc0d43c6b0dc4fe1b36e88fbf1 - asic layout, 8 pin ic 5v 5 pin 3.3v, not fully put together but should work in theory?
https://gyazo.com/91955ccfa9e6b9f295086913b4efdbb6 - serial ttl adapter, 12v power, cm4, gpio pin set, startings of power circuitry to power the cm4

I am designing it through easy eda as thats the software I like best and could send you the files if youd like. again any help would be appreciated!

You should join us at Discord. Just a fun place to collaborate on tiny bitcoin mining gadgets and gizmos . Knowledge base and trying to get some tutorials on there as well. Collaborate, share knowledge and have some fun.

I second this; Discord is nice for streaming development chat. We’ll be hyper-vigilant about scammers!

[n0nce]

Having some issues getting the bitaxe obj to actual real world scale? Seems to get exported 3000x smaller to real life scale. Got any advice?

You should be able to scale it up without problem / quality loss. I actually didn't even check what scale it was imported as and simply resized the heatsink to fit the PCB. Probably should have been the other way round, but you don't see that in a render..

[developeralgo]

I second this; Discord is nice for streaming development chat. We’ll be hyper-vigilant about scammers!

Aaaaaaagh!!!! Those scammers on Discord are notorious , even though Discord is good for development chatting

[GizmoMiner]

I second this; Discord is nice for streaming development chat. We’ll be hyper-vigilant about scammers!

Aaaaaaagh!!!! Those scammers on Discord are notorious , even though Discord is good for development chatting

All knowledge in the discord is open source. We should not have issues with scammers. Seeing everything is free. None of the mining projects associated with the discord or the open source Bitcoin hardware initiative sell anything. They give away all knowledge gained. All their time  and energy is spent from what I have gathered. For personal pleasure and to enrich the Bitcoin community with open source knowledge. Something that has been void in the Bitcoin mining hardware development community for far to long.  Most mining hardware companies, go to great lengths to keep their information closed source.

These developers evolved in these emerging open source Bitcoin mining hardware projects are truly spectacular. They are selfless and have the original  vision of Bitcoin “open source” close to the chest. Nothing to scam when everything is FREE. We will however watch closely.

What is really awesome is they are actually trying to make it even easier for people to get with PCB manufactures and order these prototype boards themselves “tutorials”. A hug daunting task for the average person is to actually order these prototype boards. A goal is to make tutorials for anyone with zero hardware knowledge to order these boards and slap on an ASIC chip. Done and Done.

Many people who have zero hardware development skill. Can actually gain first time hardware knowledge by the love of mining Bitcoin and  through the knowledge provided by these open source hardware projects. Really fun concept of people learning Bitcoin through building their own miner.

At the same time Mining hardware companies will still thrive. People will always want boxed, plug and play miners. For people wanting a more hands on deeper understanding of  Bitcoin and the hardware that mines it. They have options like Bitaxe and Voodoo. To name a few. Sorry for the long reply. Was able to get out all my thoughts out via your reply. Thank you.

[developeralgo]

A couple things you might watch out for;

- Careful of the BM1397 copper tops, they are connected to GND, which won't be at the same potential if you have the chips in series. ie, a common heatsink between two BM1397's in series is going to short them.

I thought the Bottom side is connected to GND and +Ve  while the top has copper insulating substrate below it not connected to GND . I believe what you mentioned in your comment , if correct then , a common Heatsink  for 2 chips is not possible. That's not a good design, i thought the top had great thermal conductivity  but poor/no electrical conductivity at all due to insulating substrate below the copper top

Can you elaborate ?

[Skot]

A couple things you might watch out for;

- Careful of the BM1397 copper tops, they are connected to GND, which won't be at the same potential if you have the chips in series. ie, a common heatsink between two BM1397's in series is going to short them.

I thought the Bottom side is connected to GND and +Ve  while the top has copper insulating substrate below it not connected to GND . I believe what you mentioned in your comment , if correct then , a common Heatsink  for 2 chips is not possible. That's not a good design, i thought the top had great thermal conductivity  but poor/no electrical conductivity at all due to insulating substrate below the copper top

Can you elaborate ?

I just checked on some used BM1397AG I have; there is about 30Ω between the bottom GND pad and the top. I also checked on my last remaining new BM1397AG and it's more like 90Ω.

It is my understanding that the S17 has individual heatsinks for each chip because of this problem.

[developeralgo]

I just checked on some used BM1397AG I have; there is about 30Ω between the bottom GND pad and the top. I also checked on my last remaining new BM1397AG and it's more like 90Ω.

It is my understanding that the S17 has individual heatsinks for each chip because of this problem.

i have seen several refits for S17+ using a single large combed Heatsink plate for several chips all at once ( 3 large heatsinks per Hashboard ) . Not sure , how they get them to work

[Skot]

I just checked on some used BM1397AG I have; there is about 30Ω between the bottom GND pad and the top. I also checked on my last remaining new BM1397AG and it's more like 90Ω.

It is my understanding that the S17 has individual heatsinks for each chip because of this problem.

i have seen several refits for S17+ using a single large combed Heatsink plate for several chips all at once ( 3 large heatsinks per Hashboard ) . Not sure , how they get them to work

I have heard from a guy on our discord (you should join!) that in some cases they sand off the copper top.. I didn't believe it, but he has some pictures.

I think they could also use a electrically insulating but thermally conductive layer too.

[developeralgo]

I just checked on some used BM1397AG I have; there is about 30Ω between the bottom GND pad and the top. I also checked on my last remaining new BM1397AG and it's more like 90Ω.

It is my understanding that the S17 has individual heatsinks for each chip because of this problem.

i have seen several refits for S17+ using a single large combed Heatsink plate for several chips all at once ( 3 large heatsinks per Hashboard ) . Not sure , how they get them to work

I have heard from a guy on our discord (you should join!) that in some cases they sand off the copper top.. I didn't believe it, but he has some pictures.

I think they could also use a electrically insulating but thermally conductive layer too.

which discord group ? i belong to a couple . i was looking of using MG-Chemicals 8329TFF Thermally Conductive Adhesive https://www.mgchemicals.com/downloads/tds/tds-8329tff-2parts.pdf which as they say on their datasheet  --- It is a paste that cures to form a hard, durable polymer that is thermally conductive, yet electrically insulating. A few guys who repair S17+ recommended it to me for BM1397 Heatsinks . I am now doubting myself on this

[xraid]

I just checked on some used BM1397AG I have; there is about 30Ω between the bottom GND pad and the top. I also checked on my last remaining new BM1397AG and it's more like 90Ω.

It is my understanding that the S17 has individual heatsinks for each chip because of this problem.

i have seen several refits for S17+ using a single large combed Heatsink plate for several chips all at once ( 3 large heatsinks per Hashboard ) . Not sure , how they get them to work

I have heard from a guy on our discord (you should join!) that in some cases they sand off the copper top.. I didn't believe it, but he has some pictures.

I think they could also use a electrically insulating but thermally conductive layer too.

i think the "sanding" is to flatten the prior solder remains, when retrofitting the mono heatsinks, then termal paste is used for isolation

[Skot]

which discord group ? i belong to a couple

I'm on this one from GizmoMiner -> https://discord.gg/nSTUZFC8

[n0nce]

a common Heatsink  for 2 chips is not possible

Unless they are on the same ground. Then it would work.

I just had a closer look at my R909 and noticed it actually has 4 individual heatsinks; 2 per side.
Here's a well-lit picture from a review; the standoff in the center makes it difficult to see, but you can tell that the spacing between regular finns and between the two most center ones is different. Also notice the gap between standoff and bottom right heatsink. That's not a shadow.


You can check out the beginning of that review for more angles (he moves it around a bit): https://www.youtube.com/watch?v=fgU1fUfEd3Y

I'm not sure if it makes sense to have chips on both sides of the PCB or if GekkoScience cools the chips from the die side and from the PCB side.
In any case, they do seem to group chips together; in case one side was just PCB cooling, then 3 chips wold be sharing one heatsink.


Edit: Mystery solved. Thermal pads seem to work fine thermally and insulate the chips electrically, at the same time.

The IC package is plated and electrically connected to local ground, which means that unless there's electrical insulation between the package and heatsink, you can cause shorts and break stuff. We use a 0.5mm 20W/k silicone pad to avoid shorts.