Why are FPGAs less efficient than ASICs in terms of computation?

[StanCrypt]

As the name implies, application-specific integrated circuits, or ASICs, are specialized chips used to execute analog and digital capabilities in high volume or high performance applications. ASICs are fully customized, hence designing and implementing them requires more money (NRE).
Originally designed in 1985 as just digital processors, FPGAs (Field Programmable Gate Arrays) now include both analog and mixed signal blocks. Because FPGAs are simple to use and reasonably priced reprogrammable devices, customers choose to employ them. Moreover, they are less computationally efficient than ASIC devices and i can't figure out why.

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[DaveF]

Think about it as anything that is specialized then something that is more generalized.
A Lamborghini will go really fast BUT you can't take your family on vacation with a lot of luggage. (If you mention the URUS I will have to say it's not a Lamborghini but an Audi with a different logo on front) Think of it as an ASIC.

A Ford F150 will let you haul a lot of things but will not be good on the track. Also think of that as an ASIC

A BMW X3 will take your family on vacation but it will be tight and be OK but not great on the track and you can haul a decent amount of stuff but not as much as the F150. That is an FPGA, it's OK at everything but not great at any 1 thing. So, they cost a bit more and are slower and *tend* to be more power hungry. But in theory with the proper software you can have it mining SHA256 and then reprogram it for scrypt.

Now note, for the technical purists, I the above is not a 100% accurate description BUT I like to think it gives a good general concept.

-Dave

[NotFuzzyWarm]

DaveF summed it up in general terms quite nicely.

The difference is that a FPGA is of course Programmable. In a nutshell that it means that the signal pathways between the synthesized sha256 cores and the I2C coms can never be optimized for the most direct & shortest path to give highest possible speed because each logic element used to synthesize the sha cores has to go through the programmable connection logic elements (called a switch fabric) used to create the logic structure for each 'core'. Once programmed, cycle-for-cycle a FPGA does its processing exactly the same as an ASIC does but has a lot more circuitry and signal path length to contend with which slows them down considerably.

That said, FPGA's are used to test new iterations of an ASIC's logic gate structures that make up its sha256 cores before committing any new design ideas to silicon.

At best the performance would be akin to using a Foundry's library of pre-designed 'standard' logic cells that are routed willy-nilliy to standard com cells to make a mining chip: It works but because the I/O pathways cannot be changed to minimize the physical lengths of the connections between the cells you end up with slower speeds than a full custom ASIC can give.

Of course in a FPGA those programmable connection pathway elements also require power whereas ASIC's don't have that circuitry so the ASIC has better power eff and the die real estate that would have been used by the connection elements is just filled with more cores... Not sure how many cores even the best FPGA could emulate but for reference each Bitfury 14nm chip used in the Apollo miner has 4096 cores in it and that chip is certainly not cutting much less bleeding-edge tech. AFAIK the latest chips from Bitmain and Canaan have over 8k cores in each one.

Bitmain, Canaan, Bitfury et al custom laid out the physical cells and their interconnects 'by hand' to get the performance they achieve.

[Majestic-milf]

An ASIC allows for customization of mixed signal designs to enable them meet higher frequencies and lower power budgets.
 An FPGA has loads of constraints when optimizing logic and floor planning. For deep submicron processes, wire delay gets more than a transistor delay relatively.
 Work becomes slow using an FPGA because you'd need to make do with the existing reconfigurable logic in a given FPGA.

[MinerMEDIC]

The answer is a lot more simple than that. Efficiency is a factor of two variables, the number of transistors needed to perform the task and the nanometer process used to create those transistors. FPGA‘s are wonderfully versatile meaning there are gobs more transistors to perform a function. It’s the classic trade-off Efficiency versus function. The other factor, process just means the smaller the transistor the less physical matter there is to consume power and thus give off waste heat. In other words, When you designate a function to a FPGA you’re basically turning off everything you don’t need but without physically unplugging everything unneeded that power to suppress those transistors is still being wasted, given the number of transistors in a modern FPGA this is not an insignificant number.

[nullama]

Keep in mind that for more complex calculations FPGA can be more efficient than current ASICS, because of better designs over time. Once you get a better design on an FPGA, that design can be "set in stone" on an ASIC and it will perform better than the FPGA, until newer designs start to appear.

But because what you need for mining Bitcoin is relatively simple, the main design hasn't really changed too much over the years. There are still improvements, but usually design changes on an FPGA are not as big to make a difference with an established design on an ASIC.

Basically if you have the same design on an FPGA and an ASIC, it will run much faster in an ASIC, because it has less components to do the same thing. On the other hand the ASIC is stuck with that design forever, whereas the FPGA can be changed.

[kano]

Alas the reality of this is that as soon as anyone it able to come up with a useful optimisation of the hash process,
all the miner manufacturers will go make a new ASIC for it.

It's also exceptionally unlikely for anyone to actually find any more very fast optimisations on SHA256 since if they did, you'd have more to worry about than just your bitcoins

[culhane]

The power consumption of an FPGA is higher than an ASIC. The operating frequency is also lower on an FPGA versus an ASIC. Thus it's less efficient.

[Daltonik]

The main thing that distinguishes ASIC from FPGA is that ASIC is used to perform a specific task (in addition, it is cheaper to manufacture), and FPGA is used to perform various tasks, and as you know, a specialized tool will always be more effective than a universal one.

[MinerMEDIC]

I find this thread highly entertaining. Wether people really understand the differences between the architectures, software, and silicone processes are used to create these entirely different technologies and try to dumb it way Way way way down with various degrees of hilarity, or people just guessing based on popular belief or outright hearsay; All while the actual simple truth is that there are no lines of demarcation, everything is in ASIC, a FPGA is a Programmable ASIC, a Pentium processor is general computing ASIC(the x86 granddad the 4004 was a calculator ASIC), etc.

FPGA‘s are only in efficient because miners are using them wrong. Hell even the ZYNQ FPGA on most bitmain control boards are being used wrong. As many know control board functions can be done by generic microprocessor like the TI Arm Processor on the begle bone and the A113D ARM processor, The programmable logic area is almost completely unused. But you know what, it’s still going to be powered on(it works because, you guessed it, there are two ARM CPU‘s built into every ZYNQ, The logs look familiar because it’s all ARM Linux), and you know what they call that, inefficiency. Do you know what would be a proper use of the FPGA, a miner that switched 10 different coins/algos in one day, because if you just tried to design an ASIC that could reconfigure itself for that many different algos, when you were done you’d realize you just designed an FPGA. They don’t have to be slower either, ZYNQ’s Goliath big brother Ultrascale is an absolute beast if you want to pay many thousand dollars for a single chip.

Any questions?

[nullama]

~snip~
Any questions?

Looks to me that you're saying that FPGAs can be faster than ASICs.

If that's the case, why would any company use ASICs instead of FPGAs?

[MinerMEDIC]

Cost and convenience.
Cost: When time is money especially for our purpose designing something and getting it running on a chip with just a few clicks of a button is huge. When you decide to take the final design from development to production the cost is rather shocking, to reinforce the first point you then have to get in line at one of the world’s fabs and wait for that process to complete. In the meantime you may already be shipping thousands of FPGA‘s running your design to clients(Who made later ask why did you ever ship FPGAs, they are so less efficient, lol). And that’s exactly what we see, when hashing moved from the CPU it spent a little time in FPGA‘s before the ASICS came out.
Convenience: When designing a chip, simulation is really slow, pushing it out to an FPGA for debug is just the most practical thing to do. Later when it’s out in the field (where it gets its name) sending out a tweak is an extremely valuable feature to have. There is programmable logic that is not reprogrammable that preceded FPGAs. It should be noted though they’re not infinitely reprogrammable in the same way ram is infinitely rewriteable.