[ANN] OpenBitASIC : The Open Source Bitcoin ASIC Initiative

[bulanula]

We are negotiating with 3 different ASIC's fabs at this moment, we expect to have the figures for a full ASIC implementation anytime soon. Right after that, we will come with an adapted plan to finance it. 

I personally see BFL's announce strategy only designed to make actual competition the highest possible damage.
So I will love to beat them both in price and time to market. 

Its time for a reality check; if you have yet to select a fab and process, you cant even have taped out yet, much less have a maskset. What you do have is an FPGA design that might be ported to a process, but that still needs to be done, the analog part probably still needs to be done, the design must be tested, characterized and validated for that process,  then you have to order the maskset, wait for it to be produced, then you have to order the wafers, wait for wafer processing, you have to get the chips cut, packaged and tested, design and order and test the PCBs, do Q&A, software, etc.

IOW, you are as far as BFL would have been 9 (or more likely 12) months ago. How in the world do you expect to beat them to market?

No offense Gusti, but by your own admission you have no experience in the semi conductor industry and you seem to be treating this as the purchase of a car or something, asking around quotes and expecting to place an order and be done with it. Even for a structured ASIC it wouldnt be quite that simple, but the development process of a custom asic is a lot more complicated than that, and I would feel a lot more confident in the outcome of your project if someone was involved that has any experience designing, producing and bringing to market a digital design of any kind. I know thats not you, nor Jason, so I would urge you to bring someone on board who has that experience. Now you could outsource all of that (prepare for a shock when you get the quote and tentative planning) but then you wouldnt be negotiating with fabs like you say you are.

As for the business aspect of this; you may call it opensource or community driven, but what does that even mean if you are simply a company that will fund the NRE to develop and sell another asic? I fail to see the big difference with BFL.  If the community aspect of this will be the funding, good luck raising the $1+M you would need to come to market with a product that will start a price war with BFL (and potentially others) who will already have recovered their NRE and because of their early sales, will have pushed up difficulty to a point where your asics will be worth only a fraction of what they could be worth today.

I may be missing something, and I hope Im wrong, but I just dont see how this is going to fly.

+1 for the voice of REASON.

This project will never fly as much as we all want it to.

BFL or nothing for me from now on !

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+1 for the voice of REASON.

This project will never fly as much as we all want it to.

BFL or nothing for me from now on !

Do you fluctuate your opinions on a daily basis?

[bulanula]

...

+1 for the voice of REASON.

This project will never fly as much as we all want it to.

BFL or nothing for me from now on !

Do you fluctuate your opinions on a daily basis?

Have a problem ?

I realised that BFL or quit is the only option for a GPU miner like me.

I will quit.

[rjk]

We are negotiating with 3 different ASIC's fabs at this moment, we expect to have the figures for a full ASIC implementation anytime soon. Right after that, we will come with an adapted plan to finance it. 

I personally see BFL's announce strategy only designed to make actual competition the highest possible damage.
So I will love to beat them both in price and time to market. 

Its time for a reality check; if you have yet to select a fab and process, you cant even have taped out yet, much less have a maskset. What you do have is an FPGA design that might be ported to a process, but that still needs to be done, the analog part probably still needs to be done, the design must be tested, characterized and validated for that process,  then you have to order the maskset, wait for it to be produced, then you have to order the wafers, wait for wafer processing, you have to get the chips cut, packaged and tested, design and order and test the PCBs, do Q&A, software, etc.

IOW, you are as far as BFL would have been 9 (or more likely 12) months ago. How in the world do you expect to beat them to market?

No offense Gusti, but by your own admission you have no experience in the semi conductor industry and you seem to be treating this as the purchase of a car or something, asking around quotes and expecting to place an order and be done with it. Even for a structured ASIC it wouldnt be quite that simple, but the development process of a custom asic is a lot more complicated than that, and I would feel a lot more confident in the outcome of your project if someone was involved that has any experience designing, producing and bringing to market a digital design of any kind. I know thats not you, nor Jason, so I would urge you to bring someone on board who has that experience. Now you could outsource all of that (prepare for a shock when you get the quote and tentative planning) but then you wouldnt be negotiating with fabs like you say you are.

As for the business aspect of this; you may call it opensource or community driven, but what does that even mean if you are simply a company that will fund the NRE to develop and sell another asic? I fail to see the big difference with BFL.  If the community aspect of this will be the funding, good luck raising the $1+M you would need to come to market with a product that will start a price war with BFL (and potentially others) who will already have recovered their NRE and because of their early sales, will have pushed up difficulty to a point where your asics will be worth only a fraction of what they could be worth today.

I may be missing something, and I hope Im wrong, but I just dont see how this is going to fly.

I think the idea is to produce something for a profit, and once the production is running with a working device, they will then open-source as much of the product as they are allowed to. Some parts may not be allowed to be open-sourced because of foundry NDAs, but anyone would be able to take the stuff that is open source and give it to the foundry to create a device.

[P4man]

I think the idea is to produce something for a profit, and once the production is running with a working device, they will then open-source as much of the product as they are allowed to. Some parts may not be allowed to be open-sourced because of foundry NDAs, but anyone would be able to take the stuff that is open source and give it to the foundry to create a device.

And whats the benefit of doing so, to anyone? The RTL we already have (well, more or less), anything beyond that like the synthesis and  place and route will be covered by NDAs, but even if they werent, it would only be useful at one specific fab using one particular process and its usefulness would be limited to someone nearly doubling the NRE by ordering pretty much the exact same maskset. If this chip arrives 6+ months after BFL, I would be surprised if they could recover the costs of one design and maskset, anyone trying to do the same another 6 months later is completely out of his mind. "Opensourcing" stuff like PCB design is almost equally pointless, the PCB will be utterly tied to the asic.

I think many people here would like to see BFLs bitstream and have people improve on it, and therefore think opensource hardware is somehow good, but that only works for FPGAs. Once this asic has taped out, any brilliant idea anyone might have to improve on it will be useless.

Anyway, I dont think this is the biggest hurdle this project has ahead of it. Im my mind, Ive started making a list of "bitcoin tops and flops of 2012", and I fear this project will feature in the latter list, along with Diablo's $1M Mining corporation, Vladimirs "huge" asic mining company, Pirates mega Ponzi and a few other pies in the sky. But I guess we'll see.

[bulanula]

I think the idea is to produce something for a profit, and once the production is running with a working device, they will then open-source as much of the product as they are allowed to. Some parts may not be allowed to be open-sourced because of foundry NDAs, but anyone would be able to take the stuff that is open source and give it to the foundry to create a device.

And whats the benefit of doing so, to anyone? The RTL we already have (well, more or less), anything beyond that like the synthesis and  place and route will be covered by NDAs, but even if they werent, it would only be useful at one specific fab using one particular process and its usefulness would be limited to someone nearly doubling the NRE by ordering pretty much the exact same maskset. If this chip arrives 6+ months after BFL, I would be surprised if they could recover the costs of one design and maskset, anyone trying to do the same another 6 months later is completely out of his mind. "Opensourcing" stuff like PCB design is almost equally pointless, the PCB will be utterly tied to the asic.

I think many people here would like to see BFLs bitstream and have people improve on it, and therefore think opensource hardware is somehow good, but that only works for FPGAs. Once this asic has taped out, any brilliant idea anyone might have to improve on it will be useless.

Anyway, I dont think this is the biggest hurdle this project has ahead of it. Im my mind, Ive started making a list of "bitcoin tops and flops of 2012", and I fear this project will feature in the latter list, along with Diablo's $1M Mining corporation, Vladimirs "huge" asic mining company and a few other pies in the sky. But I guess we'll see.

P4man please stop being so realistic. It hurts my eyes and brain !

Gotta start dreaming it up man !

BTC soon will go to $100 and all will be fine and everybody will be paid off and happy !

Think positive ...

[jjshabadoo]

P4Man brings up a lot of valiant points and I wish the community were really listening to him.

@P4Man, can you at least bring up a solution? or do you think there really isn't any except to let clueless miners just buy up BFL shit, etc. and let them go at it?

For the record, I am out of mining very shortly and my goal is to simply help the rest of the community who are trying to stay in the game because I understand the importance of securing the network in a DECENTRALIZED manner.

My focus will be on developing bitcoin businesses from now on or supporting valuable bitcoin related projects in mining, commerce, etc.

[rjk]

I think the idea is to produce something for a profit, and once the production is running with a working device, they will then open-source as much of the product as they are allowed to. Some parts may not be allowed to be open-sourced because of foundry NDAs, but anyone would be able to take the stuff that is open source and give it to the foundry to create a device.

And whats the benefit of doing so, to anyone? The RTL we already have (well, more or less), anything beyond that like the synthesis and  place and route will be covered by NDAs, but even if they werent, it would only be useful at one specific fab using one particular process and its usefulness would be limited to someone nearly doubling the NRE by ordering pretty much the exact same maskset. If this chip arrives 6+ months after BFL, I would be surprised if they could recover the costs of one design and maskset, anyone trying to do the same another 6 months later is completely out of his mind. "Opensourcing" stuff like PCB design is almost equally pointless, the PCB will be utterly tied to the asic.

I think many people here would like to see BFLs bitstream and have people improve on it, and therefore think opensource hardware is somehow good, but that only works for FPGAs. Once this asic has taped out, any brilliant idea anyone might have to improve on it will be useless.

Anyway, I dont think this is the biggest hurdle this project has ahead of it. Im my mind, Ive started making a list of "bitcoin tops and flops of 2012", and I fear this project will feature in the latter list, along with Diablo's $1M Mining corporation, Vladimirs "huge" asic mining company and a few other pies in the sky. But I guess we'll see.

It seems to me that doing this would allow others with different PCB designs to get on the ASIC bandwagon for cheap. Let's say for instance that OpenASIC plans to make a consumer-friendly low power device with one or 2 chips. Since they have already designed an ASIC, all I as a PCB designer would have to do is create a design around them to be whatever I wanted, such as a 1 or 2U rackmount unit with 42 processors, for instance. Is there some reason that this won't work?

I think what you may be saying is that each user that spins up will have to create a new mask; if this is true that would be a bit of a waste. However I don't know any reason that they couldn't just re-use an old mask, unless there is some limitation that I do not know about.

[P4man]

P4Man brings up a lot of valiant points and I wish the community were really listening to him.

@P4Man, can you at least bring up a solution?

You will have to define the problem first.

If your problem is that BFL is poised to make a killing, then, no, I dont see a "solution".
If your problem is that miners will get shafted, then its easy, dont buy in to those asics.
If your problem is BFL having a near monopoly on mining hardware for the foreseeable future; assuming BFL are sincere in their projections, then any real solution to that should have gotten started ~6 months ago. Perhaps largecoin or vladimir or someone else will surprise us, but if no one is well underway by now, then, nope, I dont see a solution.  I had hoped some kind of s-asic or gate array chip would be more competitive, but apparently thats not the case.

[P4man]

It seems to me that doing this would allow others with different PCB designs to get on the ASIC bandwagon for cheap. Let's say for instance that OpenASIC plans to make a consumer-friendly low power device with one or 2 chips. Since they have already designed an ASIC, all I as a PCB designer would have to do is create a design around them to be whatever I wanted, such as a 1 or 2U rackmount unit with 42 processors, for instance. Is there some reason that this won't work?

No, I cant see why that wouldnt work. In fact, if I had a chip development ongoing, thats precisely what I would do, let Nzang and the others build boards and solutions around it, but compared to the development of the asic itself,  the problem you are solving here is rather minuscule.

I think what you may be saying is that each user that spins up will have to create a new mask; if this is true that would be a bit of a waste. However I don't know any reason that they couldn't just re-use an old mask, unless there is some limitation that I do not know about.

Again, IM not sure I see the point. Say I plunged a few million dollar on making that maskset, and Im struggling to recover my investment. Why would I let you run a few wafers? Even if I did, and charged you an arm and a leg for it, since you have to run them through the same fab as me, its really the same thing as selling you the processed wafers, and assuming you dont want to duplicate the costs for testing, packaging etc, you would really just be buying my chips.

[rjk]

Again, IM not sure I see the point. Say I plunged a few million dollar on making that maskset, and Im struggling to recover my investment. Why would I let you run a few wafers? Even if I did, and charged you an arm and a leg for it, since you have to run them through the same fab as me, its really the same thing as selling you the processed wafers, and assuming you dont want to duplicate the costs for testing, packaging etc, you would really just be buying my chips.

Well even if it were possible, I'm fairly sure no sources will be released until the company is profitable, so that is a moot point.

[P4man]

P4Man brings up a lot of valiant points and I wish the community were really listening to him.

@P4Man, can you at least bring up a solution?

You will have to define the problem first.

If your problem is that BFL is poised to make a killing, then, no, I dont see a "solution".
If your problem is that miners will get shafted, then its easy, dont buy in to those asics.
If your problem is BFL having a near monopoly on mining hardware for the foreseeable future; assuming BFL are sincere in their projections, then any real solution to that should have gotten started ~6 months ago. Perhaps largecoin or vladimir or someone else will surprise us, but if no one is well underway by now, then, nope, I dont see a solution.  I had hoped some kind of s-asic or gate array chip would be more competitive, but apparently thats not the case.

One more thing on this. If BFL wanted to play "fair" and make sure its customers dont get shafted, what they could do is auction off their hardware in public auctions (heck, ebay) and sign a contract that clearly states how many devices or TH they will produce per month and per year.  That would allow fair bidding and customers could at least guestimate their ROI, assuming no competitor would emerge.

OTOH, if BFL wants to maximize their profits, they should still auction off their hardware but in a silent auction, one at a time, delay shipment as much as possible, and not say how many they are selling or will sell. This would pretty much guarantee that every buyer gets hosed.

[bulanula]

P4Man brings up a lot of valiant points and I wish the community were really listening to him.

@P4Man, can you at least bring up a solution?

You will have to define the problem first.

If your problem is that BFL is poised to make a killing, then, no, I dont see a "solution".
If your problem is that miners will get shafted, then its easy, dont buy in to those asics.
If your problem is BFL having a near monopoly on mining hardware for the foreseeable future; assuming BFL are sincere in their projections, then any real solution to that should have gotten started ~6 months ago. Perhaps largecoin or vladimir or someone else will surprise us, but if no one is well underway by now, then, nope, I dont see a solution.  I had hoped some kind of s-asic or gate array chip would be more competitive, but apparently thats not the case.

One more thing on this. If BFL wanted to play "fair" and make sure its customers dont get shafted, what they could do is auction of their hardware in public auctions (heck, ebay) and sign a contract that clearly states how many devices or TH they will produce per month and per year.  That would allow fair bidding and customers could at least guestimate their ROI, assuming no competitor would emerge.

OTOH, if BFL wants to maximize their profits, they should still auction off their hardware but in a silent auction, one at a time, delay shipment as much as possible, and not say how many they are selling or will sell. This would pretty much guarantee that every buyer gets hosed.

STOP giving them ideas ! Look at bitlane proposing the trade in is not 1:1 and how that turned out !

[Jason]

Gusti has been fielding questions here because I've been busy talking with a lot of different vendors about different options.  As we've mentioned before, we're trying to make a business out of this (e.g. we expect to earn a reasonable return on our efforts).  In light of the announcements by BFL, we have re-evaluated the direction we were going in (and we were pretty far down that path I might add) and are currently exploring alternatives.

Its time for a reality check; if you have yet to select a fab and process, you cant even have taped out yet, much less have a maskset. What you do have is an FPGA design that might be ported to a process, but that still needs to be done, the analog part probably still needs to be done, the design must be tested, characterized and validated for that process,  then you have to order the maskset, wait for it to be produced, then you have to order the wafers, wait for wafer processing, you have to get the chips cut, packaged and tested, design and order and test the PCBs, do Q&A, software, etc.

IOW, you are as far as BFL would have been 9 (or more likely 12) months ago. How in the world do you expect to beat them to market?

Actually, we had already selected a FAB and a process -- for a structured ASIC design.  As I said, we were already pretty far down that path when BFL made their announcement.  In fact, just weeks away from plunking down 50% of our NRE bill.

Had we gone down that path, we would have been able to produce mining hardware in the same price range as the current BFL singles, but with about 3-4 GH/s of performance.  Up until BFL's announcement, this seemed like a good direction to go.  Unfortunately, we didn't see any way to get this to market before the beginning of 2013 based on the most aggressive schedules we were able to negotiate.  So we decided to look at some alternatives.

At this point, we are negotiating with several potential partners to do a full custom ASIC.  Rather than working with companies in established markets with their high NREs and glacier-slow schedules, we have turned to several emerging markets.  I'm not prepared to go into any detail at the moment, but suffice it to say that we think we have found a way to do a full-custom ASIC without high NREs and without the usual (Western) time to market.  While there are some compromises in terms of not having access to the latest processes, these are more than made up for by lower costs and greater flexibility in other areas.

I seriously doubt BFL is using a 28nm process or even a 45nm process anyway.  So if we wind up using a 60nm or 90nm process, we should still have no difficulty being competitive.

Another question that has come up before:  If someone wants to build their own boards based on our chips, that is fine.  We will make our chips available (either through us or a distributor) and will provide full specifications as well as a reference design (e.g. the basic mining system we will sell).  However, we aren't going to provide a maskset so that anyone can go off and have their own chips made -- at least not right away.  We are still talking about spending many hundreds of thousands of dollars on NRE and need a way to recover that in order to avoid losing money.

[SgtSpike]

Gusti has been fielding questions here because I've been busy talking with a lot of different vendors about different options.  As we've mentioned before, we're trying to make a business out of this (e.g. we expect to earn a reasonable return on our efforts).  In light of the announcements by BFL, we have re-evaluated the direction we were going in (and we were pretty far down that path I might add) and are currently exploring alternatives.

Its time for a reality check; if you have yet to select a fab and process, you cant even have taped out yet, much less have a maskset. What you do have is an FPGA design that might be ported to a process, but that still needs to be done, the analog part probably still needs to be done, the design must be tested, characterized and validated for that process,  then you have to order the maskset, wait for it to be produced, then you have to order the wafers, wait for wafer processing, you have to get the chips cut, packaged and tested, design and order and test the PCBs, do Q&A, software, etc.

IOW, you are as far as BFL would have been 9 (or more likely 12) months ago. How in the world do you expect to beat them to market?

Actually, we had already selected a FAB and a process -- for a structured ASIC design.  As I said, we were already pretty far down that path when BFL made their announcement.  In fact, just weeks away from plunking down 50% of our NRE bill.

Had we gone down that path, we would have been able to produce mining hardware in the same price range as the current BFL singles, but with about 3-4 GH/s of performance.  Up until BFL's announcement, this seemed like a good direction to go.  Unfortunately, we didn't see any way to get this to market before the beginning of 2013 based on the most aggressive schedules we were able to negotiate.  So we decided to look at some alternatives.

At this point, we are negotiating with several potential partners to do a full custom ASIC.  Rather than working with companies in established markets with their high NREs and glacier-slow schedules, we have turned to several emerging markets.  I'm not prepared to go into any detail at the moment, but suffice it to say that we think we have found a way to do a full-custom ASIC without high NREs and without the usual (Western) time to market.  While there are some compromises in terms of not having access to the latest processes, these are more than made up for by lower costs and greater flexibility in other areas.

I seriously doubt BFL is using a 28nm process or even a 45nm process anyway.  So if we wind up using a 60nm or 90nm process, we should still have no difficulty being competitive.

Another question that has come up before:  If someone wants to build their own boards based on our chips, that is fine.  We will make our chips available (either through us or a distributor) and will provide full specifications as well as a reference design (e.g. the basic mining system we will sell).  However, we aren't going to provide a maskset so that anyone can go off and have their own chips made -- at least not right away.  We are still talking about spending many hundreds of thousands of dollars on NRE and need a way to recover that in order to avoid losing money.

And thus, the openASIC project is now the closedASIC project.

Best of luck though Jason @ crew.  More competition is never a bad thing.

[P4man]

Actually, we had already selected a FAB and a process -- for a structured ASIC design.  As I said, we were already pretty far down that path when BFL made their announcement.  In fact, just weeks away from plunking down 50% of our NRE bill.

Had we gone down that path, we would have been able to produce mining hardware in the same price range as the current BFL singles, but with about 3-4 GH/s of performance. 

Darn. If only you or someone else had listened to me 8 months ago .
Can you give an order of magnitude of NRE involved? I found that pretty impossible to find out.

I seriously doubt BFL is using a 28nm process or even a 45nm process anyway.  So if we wind up using a 60nm or 90nm process, we should still have no difficulty being competitive.

Well, I share your doubts and would put my money on 90 or 130nm, but do keep in mind, even if you are competitive with BFLs chip in all metrics, including cost, coming to market 6, 9 or more months later may prove absolutely deadly. By that time, the market may already be  saturated with per GH prices plummeting to the point where it might prove very tough to recover your investment.

I hope you will focus -more than BFL would have- on total cost of the device, putting as much on the asic as possible to keep your variable costs as low as possible when going large scale. Thats the only fighting chance you may have, and Im not betting on it, but good luck nonetheless.

[Jason]

And thus, the openASIC project is now the closedASIC project.

Best of luck though Jason @ crew.  More competition is never a bad thing.

We're making it as open as we can in a manner that is consistent with running a business.

In particular:

• The HDL code upon which the ASIC will be based will be released (and in fact can be used for a working FPGA prototype)
• The schematic of our mining hardware will be released
• Full specifications of the custom ASIC will be released so anyone may use it in their own design

I would love to be able to take a half million dollars of my own money, develop a maskset for a full custom ASIC mining chip, and then release it to the community as charity.  Unfortunately, I am not in a financial position to do that at the moment, though if I ever am, you can bet that I will be more than willing to donate to technology like this that empowers individuals.  If only we could convince one of the wealthy pioneers of the IT world to take up an interest in bitcoin, perhaps that could become a reality.

In the meantime, if you'd like to see a mostly-open-source bitcoin miner (everything except for the maskset), then stay tuned.

[gusti]

To what Jason says, let me add that :

- Anyone will be able to buy OpenASICS LTD. shares and be part of the company.
- Anyone will be able to purchase either chips or complete devices, in an open and transparent procedure.

@SgtSpike : I believe this is not a closed project at all ;-)

[Jason]

Actually, we had already selected a FAB and a process -- for a structured ASIC design.  As I said, we were already pretty far down that path when BFL made their announcement.  In fact, just weeks away from plunking down 50% of our NRE bill.

Had we gone down that path, we would have been able to produce mining hardware in the same price range as the current BFL singles, but with about 3-4 GH/s of performance.

Darn. If only you or someone else had listened to me 8 months ago .
Can you give an order of magnitude of NRE involved? I found that pretty impossible to find out.

Prices started around a few hundred thousand and went up from there.  Structured ASICs did not have nearly the speed or performance we had initially hoped for (not much better than the newest FPGAs), but they do have a big advantage in cost.  As a result, we could build a multi-chip ASIC design with the approximate performance listed above.

I seriously doubt BFL is using a 28nm process or even a 45nm process anyway.  So if we wind up using a 60nm or 90nm process, we should still have no difficulty being competitive.

Well, I share your doubts and would put my money on 90 or 130nm, but do keep in mind, even if you are competitive with BFLs chip in all metrics, including cost, coming to market 6, 9 or more months later may prove absolutely deadly. By that time, the market may already be  saturated with per GH prices plummeting to the point where it might prove very tough to recover your investment.

We are acutely aware of this and this is a key component of our present negotiations.  Western companies lack the flexibility required to make this happen, at least in the NRE range we can afford.

I hope you will focus -more than BFL would have- on total cost of the device, putting as much on the asic as possible to keep your variable costs as low as possible when going large scale. Thats the only fighting chance you may have, and Im not betting on it, but good luck nonetheless.

Everything possible will be on the ASIC.  Even the USB interface if possible.  The PC board shouldn't contain much more than connectors, passive components, an oscillator, and a couple of voltage regulator chips -- in addition to one or more ASICs of course.  We'll probably put a couple of LEDs on it and maybe even a cheap display if it doesn't add much to the cost.

The structured ASIC design was setup to be scalable -- you could run up to 64 chips in parallel assuming you could layout the data buses in such a way as to meet the timing requirements.  We'll probably do something similar with the full custom ASIC design too.

[rjk]

The structured ASIC design was setup to be scalable -- you could run up to 64 chips in parallel assuming you could layout the data buses in such a way as to meet the timing requirements.  We'll probably do something similar with the full custom ASIC design too.

winrar