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Author Topic: 7970 results with a kill-a-watt  (Read 3206 times)
AzN1337c0d3r
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May 31, 2012, 04:25:01 AM
 #21

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Please, someone explain. I am baffled.

Power consumption can be guessed by TDP * (current gpu volts / stock GPU volts)^2 * (current gpu speed / stock gpu speed).

Power is not proportional to the square of voltage. According to the Shockley Diode Equation, Current is exponentially proportional to the Voltage, so the power is actually something like P ~ V*e^cV.

Where c is some constant governed by device physics and temperature.


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But what is this? In this scenario, the owner listed that card to only be drawing 128 watts for the ENTIRE SYSTEM, but by my calculations, the card should be drawing 157 watts ALONE.

OP only has GPU plugged into the PSU he is measuring. Which is a bit skewed also due to not measuring power being drawn from PCI-E slot.


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May 31, 2012, 04:30:49 AM
 #22

OP only has GPU plugged into the PSU he is measuring. Which is a bit skewed also due to not measuring power being drawn from PCI-E slot.

Oh. I missed that part Smiley With that and the assumed thing that he isnt measuring power from PCI-E is interesting.. so looks like  it won't fit in just right unless the OP is powering the 12v, 5v, and 3.3v lines from the seasonic too, leaving only data lanes and PCI-E critical pins attached to the motherboard.

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May 31, 2012, 08:06:57 PM
 #23

OP, can you measure how low can you go with voltage even dropping core clock? Where is limit with undervolting?
My 6950 will no go lower than 0.987V no matter what core clock I set...

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May 31, 2012, 08:10:06 PM
 #24

OP, can you measure how low can you go with voltage even dropping core clock? Where is limit with undervolting?
My 6950 will no go lower than 0.987V no matter what core clock I set...

If you'd read his chart, it looks like he's already done that! .918 is stable at 925, but .900 isn't.

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June 01, 2012, 11:11:07 AM
 #25

OP, can you measure how low can you go with voltage even dropping core clock? Where is limit with undervolting?
My 6950 will no go lower than 0.987V no matter what core clock I set...

If you'd read his chart, it looks like he's already done that! .918 is stable at 925, but .900 isn't.
He didn't lower clock. I'm curious how low voltage can be set even sacrifying core clock (performance).

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June 02, 2012, 10:04:44 AM
 #26

I've plugged a 7970 into a seasonic 400x without anything else plugged into the psu and here are the results straight from the wall: (all settings done with afterburner - REMEMBER these numbers are only for one card not the system)

STOCK

core volt: 1.112
core clock: 925
mem volt: 1.600
mem clock: 1375
idle: 26.5w
load: 245w

MHash/s: 550

===============================================

core volts / core clock / mem volt / mem clock / load / mhash - mhash per watt

1.112 / 925 / 1.500 / 685 / 238w / 550 - 2.31
1.112 / 925 / 1.500 / 340 / 230w / 547 - 2.37
0.975 / 925 / 1.500 / 150 / 152w / 540 - 3.55
0.950 / 925 / 1.500 / 150 / 140w / 540 - 3.85
0.925 / 925 / 1.500 / 150 / 131w / 540 - 4.12
0.925 / 925 / 1.500 / 340 / 132w / 545 - 4.12
0.925 / 925 / 1.500 / 685 / 135w / 548 - 4.05
0.918 / 925 / 1.500 / 150 / 128w / 540 - 4.21 [MOST EFFICIENT]
0.918 / 925 / 1.500 / 340 / 130w / 545 - 4.19
0.900 / 925 / 1.500 / 150 / 000w / 000 [FAILED]
0.925 / 950 / 1.500 / 150 / 133w / 555 [FAILED after 30min+]
0.937 / 950 / 1.500 / 150 / 139w / 552 - 3.97
0.937 / 950 / 1.500 / 340 / 140w / 559 - 3.99
0.937 / 975 / 1.500 / 150 / 142w / 569 - 4.00
0.937 / 975 / 1.500 / 340 / 000w / 000 [FAILED]
0.943 / 975 / 1.500 / 150 / 144w / 570 - 3.95
0.943 / 975 / 1.500 / 340 / 146w / 575 - 3.93
0.943 / 1000 / 1.500 / 150 / 000w / 000 [FAILED]
0.956 / 1000 / 1.500 / 150 / 152w / 584 [FAILED after 30min+]
0.962 / 1000 / 1.500 / 150 / 146w / 584 [FAILED after 30min+]
0.975 / 1000 / 1.500 / 150 / 155w / 584 - 3.76
0.975 / 1000 / 1.500 / 340 / 158w / 590 - 3.73


What is the ASIC Quality % of the card that you tested to achieve the numbers above ?

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June 03, 2012, 05:19:29 AM
 #27

Quote from: bitlane

What is the ASIC Quality % of the card that you tested to achieve the numbers above ?


81%
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June 03, 2012, 09:17:15 AM
 #28

Power is not proportional to the square of voltage. According to the Shockley Diode Equation, Current is exponentially proportional to the Voltage, so the power is actually something like P ~ V*e^cV.

Where c is some constant governed by device physics and temperature.


Static power consumption is related to an exponential, but the dynamic power power usage is just related to f*Vcc^2 and makes up most of the power consumed by a GPU. Power might not scale exactly with the square of voltage, but it's a lot close the the SDE.

To the OP, I just used a PCIe riser and cut the 12V lines to the board and soldered it to a molex plug.
http://en.wikipedia.org/wiki/PCI_Express#Pinout
There might be some power drawn by the 3v3 lines, but it would be insignificant. You should be able to isolate the GPU pretty easily to test it.
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June 03, 2012, 10:27:02 AM
 #29

Dynamic power power usage is just related to f*Vcc^2 and makes up most of the power consumed by a GPU. Power might not scale exactly with the square of voltage, but it's a lot close the the SDE.

Dynamic power usage is indeed P = C * Vcc^2 * f, but it does not make up the majority of power consumed by devices on a high-performance 28 nm process such as the one employed on a 7970.

In fact, static leakage currents now dominate the power usage of modern ICs circa 65nm (note the log scale on the left of the 2nd slide) and is exactly the reason why we need to power-gate most of the chips when they are not in use (as opposed to clock-gating, which we did before and would be a viable solution if dynamic power dominated the power consumption).

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June 03, 2012, 01:30:04 PM
 #30

Dynamic power power usage is just related to f*Vcc^2 and makes up most of the power consumed by a GPU. Power might not scale exactly with the square of voltage, but it's a lot close the the SDE.

Dynamic power usage is indeed P = C * Vcc^2 * f, but it does not make up the majority of power consumed by devices on a high-performance 28 nm process such as the one employed on a 7970.

In fact, static leakage currents now dominate the power usage of modern ICs circa 65nm (note the log scale on the left of the 2nd slide) and is exactly the reason why we need to power-gate most of the chips when they are not in use (as opposed to clock-gating, which we did before and would be a viable solution if dynamic power dominated the power consumption).

That might be true with an SoC that has very low utilization, but a GPU that's mining will be near 100% utilization. If you think static power dominates dynamic below 65nm, fix the voltage of one of your 7970s at 975mV and run some mining software with 200core 200mem, and then with 1000core/200mem and report the results of the power draw for just the card.
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June 03, 2012, 01:59:24 PM
 #31

There's asic numbers on slide 5 that  indicate that its half and half at 65nm and the W/mm^2 numbers shows that the asic is near full utilization...

I am not sure what your suggestion of comparing clock frequency will do. If you set it so low, then static power consumption dominates. So when it goes back up to normal clock it would seem like dynamic power usage has super-linear influence at higher clock frequency, since a clock edge is now a significant part of a clock period and eating away as the time the transistor spends at static . The only way to accurately tell the static and dynamic power usage is to clock gate the device.

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