FPGA mining for fun and profit

[eturnerx]

From the sounds of things these sound like structured ASICs - somewhere between an FPGA and a normal ASIC in terms of performance but much cheaper to produce.  I could be wrong, but that's what it sounded like to me.

[1715587361]

1715587361

[molecular]

From the sounds of things these sound like structured ASICs - somewhere between an FPGA and a normal ASIC in terms of performance but much cheaper to produce.  I could be wrong, but that's what it sounded like to me.

That's what he said. Works sorta like fpga with pre-fabbed logic gates. Then, through some processing magic, connections are permanently made (something about metal). Well, you know better than I do how that works and what it is exactly, but I remember him describing them along these lines, so you're likely right.

[bitpop]

I'd be willing to finance engineers to build a solution then I will resell it,
but first i need to know what to tell them?

Can we use this board?
http://www.knjn.com/FPGA-PCIe.html

[ttul]

Also, you will not see a bitcoin ASIC. Complex ASICs required highly skilled (read: expensive) engineers and even more expensive processes to put them into place. When there is already a very good solution to the problem (GPUs) and an enormously volatile and unpredictable exchange rate, you're not going to see such an investment. Not to mention that investors in such a project would almost certainly demand immediate cashing out of mining proceeds to pay off their investment, which would put significant downward pressure on the exchange rate. ASIC mining is a pipe dream.

I hate to disappoint you...

Unless you're referring to those had to read your vague half sentence, I don't think you've disappointed anyone.

Are you suggesting that you know of someone putting millions of dollars into developing a custom ASIC for mining?

Sorry for being vague. Yes, it will be announced soon that someone is putting a great deal of capital into custom mining hardware. Getting a few ASICs produced using a shared wafer process is not particularly expensive. This is larger scale.

[Transisto]

At what price does an ASIC batch start at ?

(rough estimate please)

[kjj]

http://www.edaboard.com/thread115517.htm

That discussion is a couple of years old.

Also see this PDF, also a bit old:  http://www-ee.ccny.cuny.edu/www/web/xchen/StructuredASIC.pdf

[ttul]

At what price does an ASIC batch start at ?

(rough estimate please)

You can get a design into a shared wafer for as little as $25,000. In some countries there are academic fabs that make chips for student projects, etc.. and these can be had for much less, but you need the hookups. You also pay a lot less for older processes.

[film2240]

Is it possible to have an FPGA or ASIC board that runs independantly from a computer but has flash memory onboard,built in Wi-fi or Ethernet,and has it's own power supply as I wish to bypass the computer competely and save loads of energy while mining lots more.How much would these boards cost and for what performance/power use can I expect from them? Can yiu ship to UK? Do you have a shop?

[TeraMiner]

You guys might want to take a look at a new thread I started regarding a design that we're looking to sell. We think it is a very competitive offering but we don't have the time or energy to take this to market. Check out the highlights here and let me know what you think of the performance, power and cost numbers.

https://bitcointalk.org/index.php?topic=44391.0

[eldentyrell_old]

At what price does an ASIC batch start at ?

(rough estimate please)

You can get a design into a shared wafer for as little as $25,000. In some countries there are academic fabs that make chips for student projects, etc.. and these can be had for much less, but you need the hookups. You also pay a lot less for older processes.

FWIW I haven't been able to get a quote under $70,000 out of MOSIS, which handles the majority of academic chip fabbing.

Usually "the hookups" equals "fab has been hiring our lab's graduate students for a decade now and wants to keep the supply steady".  In which case there's actually more remuneration going on above and beyond dollars changing hands.

[ttul]

At what price does an ASIC batch start at ?

(rough estimate please)

You can get a design into a shared wafer for as little as $25,000. In some countries there are academic fabs that make chips for student projects, etc.. and these can be had for much less, but you need the hookups. You also pay a lot less for older processes.

FWIW I haven't been able to get a quote under $70,000 out of MOSIS, which handles the majority of academic chip fabbing.

Usually "the hookups" equals "fab has been hiring our lab's graduate students for a decade now and wants to keep the supply steady".  In which case there's actually more remuneration going on above and beyond dollars changing hands.

We've obviously looked at this a great deal at LargeCoin. The cost of fabbing a profitable Bitcoin ASIC is $500,000. This is the cost when you use a structure ASIC solution, and there isn't any way to get it below $500,000 - believe me, we have tried.

Structured ASIC processes definitely remove a lot of the complexity of ASIC fabrication versus standard cell or full custom processes. However, you are still dealing with the fabrication of an immensely complex integrated circuit with millions of tiny little wires in it. Getting the design right so that the first batch works means spending lots of money on sophisticated software and engineering talent - and that's just not cheap.

If you want to run off a few chips in an academic process, by all means go for it. That's a great hobby level activity. However, we found through our extensive analysis that nothing short of a structured ASIC process can give you the scale and volume that you need to generate enough money from your efforts to be well compensated for the investment.

[nmat]

We've obviously looked at this a great deal at LargeCoin. The cost of fabbing a profitable Bitcoin ASIC is $500,000. This is the cost when you use a structure ASIC solution, and there isn't any way to get it below $500,000 - believe me, we have tried.

Structured ASIC processes definitely remove a lot of the complexity of ASIC fabrication versus standard cell or full custom processes. However, you are still dealing with the fabrication of an immensely complex integrated circuit with millions of tiny little wires in it. Getting the design right so that the first batch works means spending lots of money on sophisticated software and engineering talent - and that's just not cheap.

If you want to run off a few chips in an academic process, by all means go for it. That's a great hobby level activity. However, we found through our extensive analysis that nothing short of a structured ASIC process can give you the scale and volume that you need to generate enough money from your efforts to be well compensated for the investment.

Are there any news regarding the progress of your product?

[ttul]

We've obviously looked at this a great deal at LargeCoin. The cost of fabbing a profitable Bitcoin ASIC is $500,000. This is the cost when you use a structure ASIC solution, and there isn't any way to get it below $500,000 - believe me, we have tried.

Structured ASIC processes definitely remove a lot of the complexity of ASIC fabrication versus standard cell or full custom processes. However, you are still dealing with the fabrication of an immensely complex integrated circuit with millions of tiny little wires in it. Getting the design right so that the first batch works means spending lots of money on sophisticated software and engineering talent - and that's just not cheap.

If you want to run off a few chips in an academic process, by all means go for it. That's a great hobby level activity. However, we found through our extensive analysis that nothing short of a structured ASIC process can give you the scale and volume that you need to generate enough money from your efforts to be well compensated for the investment.

Are there any news regarding the progress of your product?

Hard at work is all I can report.

[nmat]

Hard at work is all I can report.

I see... Good news then Good luck!

[ttul]

Hard at work is all I can report.

I see... Good news then Good luck!

Thanks. Sorry we've been so quiet. I'm glad to see that Bitcoin has turned the corner after the summers' scathing press coverage etc. The mainstream seems to be picking up on the actual utility of it, which is nice.

[Intention]

I'm actually curious about FPGA's is there like a list of component/design files floating around that anyone knows of?  I'd like to read more into it and maybe construct my own since I have access to a pcb mill and soldering tools.

[Enigma81]

Currently, the Xilinx Spartan 6 LX-150 is the most common FPGA used for bitcoin mining.  GITHUB has an open source FPGA Miner for this chip, and ztex.de does as well.

Unfortunately, you won't be making a PCB for the LX-150 on a mill.  It's a 484 pin BGA.  It pretty much demands a MINIMUM 4 layer PCB because of the split power needs (3.3V and 1.2V) and ground.

Enigma

[notme]

I'd be willing to finance engineers to build a solution then I will resell it,
but first i need to know what to tell them?

Can we use this board?
http://www.knjn.com/FPGA-PCIe.html

I have one of these for sale if anyone is interested.  Brand new, never used.  PM if interested.  I just never got around to that project.

[Intention]

Currently, the Xilinx Spartan 6 LX-150 is the most common FPGA used for bitcoin mining.  GITHUB has an open source FPGA Miner for this chip, and ztex.de does as well.

Unfortunately, you won't be making a PCB for the LX-150 on a mill.  It's a 484 pin BGA.  It pretty much demands a MINIMUM 4 layer PCB because of the split power needs (3.3V and 1.2V) and ground.

Enigma

Thanks for the heads up, I was just curious as to the process and what not my background is Comp Sci, not so much Comp/Electrical Eng so I don't know much about FPGA's.

[kjlimo]

Currently, the Xilinx Spartan 6 LX-150 is the most common FPGA used for bitcoin mining.  GITHUB has an open source FPGA Miner for this chip, and ztex.de does as well.

Unfortunately, you won't be making a PCB for the LX-150 on a mill.  It's a 484 pin BGA.  It pretty much demands a MINIMUM 4 layer PCB because of the split power needs (3.3V and 1.2V) and ground.

Enigma

Thanks for the heads up, I was just curious as to the process and what not my background is Comp Sci, not so much Comp/Electrical Eng so I don't know much about FPGA's.

I hope that at some point in 2012, I can come back and reread this post and understand what all of these words/letters/numbers mean, haha.