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I guess it is in relation with second big thing Yankee was talking about after wordpress. I guess we should GZ you already?
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whats wrong with "stash" or maybe "statoshi"?
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FGPA-urile, dar ai spus bine, momentan.
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si ASIC-urile nu or sa apara anul acesta, cel putin am vazut ca Tom a anuntat ca bASIC-ul nu o sa fie livrat mai devreme de mijlocul lui Ianuarie.
Probabil ca cei de la BFL o sa livreze nu mai devreme de mijlocul lui Februarie.
Sunt curios daca dificultatea o sa scada in urmatoarea saptamana.
Nu stiu daca o sa scada intr-o saptamana, sunt probabil multi cu GPU care nu stiu ca merg in pierdere. Cat despre BFL, "adding clock buffers" in general inseamna ca resintetizeaza tot circuitul, trebuie sa fie ei norocosi sa rezolve direct in fabrica. Dar poate ca sunt, cine stie.. |
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Nota:
De azi inainte, incepand cu blocul 209999 (sau 210000, depinde de implementare), rewardul s-a injumatatit. Asta inseamna ca o sa obtineti jumate din cat BTC primeati cu o zi inainte, folosind acelasi sistem.
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Block 209998, wake up eleuthria!
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The code is very simple, highly unlikely to be buggy.  // Subsidy is cut in half every 210000 blocks, which will occur approximately every 4 years nSubsidy >>= (nHeight / 210000); Ah ha.. >>= should be >=.. there is a bug.. quick where's Gavin! Nah, its right, means shift by x (in our case by one) which equals divide by 2^x. (I assume, I never read the code.) |
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To grandchildren: Back in my day you got 50btc per block.
Heh.. The truth is that I feel the way I felt when I turned 30s.. |
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https://www.btcfpga.com/forum/index.php?topic=125.0The other guy is giving refunds too.... According to the post I think all these companies were using the same designing company and further indicates (to me at least) that they're all coordinating their release dates to MAXimize their profits. Nope, BTCfpga have issues with their PCB board (or at least thats what they say). They tried to design it in USA. BFL have issues with their chip, designed in France (or at least that I understood) and produced in a secret location in Asia. |
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Almost a month after BFL. I'm sorry, I really am. I like the competition, but I'm glad I choose BFL.
Has BFL actually given a hard release date yet? No need, their voodoo dept is working 24/7 to push everybody else two three months in 2013.  |
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Until ASICs start shipping in volume, that batch of chips is like a pile of plutonium, just waiting for someone to make off with them and start hashing with them.
With 20k of those chips, even if they only perform at half their advertised speed, one could easily control > 50% of the network hashing power.
What about if they perform at 50MHz ? |
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chips don't exist?
...
add clock buffers.
What Nasser means is that over a certain clock frequency chips start to behave erratic and they fix it by adding clock buffers. There are steps in ASIC design which should prevent this, however. Even so, it's hard to decide who's fault is. I bet BFL consider its foundry fault. |
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Posters on BFL forums are reporting having received email from bASIC giving a new shipping date of January 2013.
Joke? |
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I don't want to fall asleep after the change (staying up all night just in case the network has good luck today), only to wake up with 0 BTC left in the wallet and a lot of people that have withdrawn 100+ coins more than they should've been able to . heh.. yeah, I remember a case.. |
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i should be finally getting mines in the mail tomorrow. i probably shouldn't use a microusb + usb to wall adapter as my power source huh?
If the usb to wall adapter supplies 700mAh at least, it should be ok (according to the producer). |
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Bridging polyfuses may not be necessary with later revisions, unless input amperage needs to be raised. http://elinux.org/Polyfuses_explainedAs of the end of August 2012 some users were reporting that newly arrived PI's were fitted with 0 Ohm resistors for the USB polyfuses F1 & F2, and Liz of the RPF foundation confirmed that it was official RPF policy to remove the offending fuses. However F3 still limits the total input current to about 1A. No F1 or F2 on my RPi only F3. I'm hoping I can get it to work with my incoming asics. Certified powered hub is next on my list. It arrived this last week. Do you have anything else to stress test the USB stack with? Is anyone in general aware if a powered hub fixes the rest of the problems? As for my tests a powered hub does not fix the issues with usb..... It could cause problems too. Remember that thing hates feedback power over the USB cable. Only cutting the power lanes of the USB cable helped a little. Still the device is not an option for me with my 18 Ztex boards... Are your boards bus powered? |
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