 Show Posts
|
|
Pages: [1] 2 »
|
Your a drain on the mining community, Vosk your only motive is money and to suck all your followers dry. Stop shilling on your youtube channel for these scam shitcoins that have no future.
You're a drain on the mining community, Vosk your only motive is money and to suck all your followers dry. Stop shilling on your youtube channel for these scam exotic coins that have no future There, I fixed it for you. Keep up the good work Vosk, you know you're doing something right when the haters are hating. |
|
|
|
I'm not he. No affiliation. Thought it pertinent to ask and for you to answer that question publicly. As a developer, I as sure that you agree that too many miners developers are taking GPL code and using it outside of the license and this is likely one of the reasons why you have had to close source yours and other developers like Imperdin may end up having to close sourcing his.
Thank you for coming here to tell me this.. But im curious, what does he have that he can close source ?  I wouldn't know. You get the point. You took offense to me asking if you used someone else's GPL code in a closed source project. Its an immature response considering that all closed source miners almost certainly contain open source code or code derived from open source projects and is precisely how crypto assets have come to be. Based on your response, I clearly wasn't the only one thinking it. If you take a more objective view, you may appreciate the opportunity to have publicly stated that you did not for anyone else that was wondering. |
|
|
|
V1.6.2
- Added support for Italocoin new algo (from block 55.000)
- Auto intensity for Vega cards improved, also managed to increase hashing speed on Vega cards for about ~1-1.5% (mainly on heavy algos)
- If user uses non existing GPU id in gpu_conf, it will be ignored, no error will be thrown
- Fixed miner crash when using a non AES capable CPU on some algos
- Added Windows version and build in log
- Added video driver version in log
- Added info about CPU AES support in log
- Statistics now shows number of stale shares that were accepted by pool
- Added parameter 'min_rig_speed_duration' that can set period for 'min_rig_speed' parameter (minimum is 30 sec), default is 5 min
+ I finally bought a Vega 56 card, so in the next releases i will try to improve the performance for Vegas. For now a little speedup of about 1-1.5% is achieved, mainly on Heavy based algos (Heavy, Haven, Bittube, Italo)
+ If you use a non existant id in gpu_conf, it will now be ignored, only id's that exist in your system will be used
+ There was a bug in soft AES that caused miner crash on Stellite and Haven algos, this is now fixed
+ Added accepted stale shares number in statistics. It can't know the number of real accepted stale shares on pool side, but the logic is simple, if a new job is received, but the miner sends a result in the mean time that is for the previous job, and this share gets accepted by the pool, miner will treat this like an accepted stale share.
+ min_rig_speed_duration can set the time you want to check the average hashrate for 'min_rig_speed' parameter. Default is 5 min.
Looks like you included Imperdin's heavy optimizations for that small bump. Did you include that GPL3 code in your miner? It just looks like, but dont worry imperdin, as i already told you i dont need to use your crazy insane mega giga optimisations. I already got even more speed increase since we talked, so if you plan releasing another mega giga optimisation please dont do it before i release the next version of miner. I'm not he. No affiliation. Thought it pertinent to ask and for you to answer that question publicly. As a developer, I as sure that you agree that too many miners developers are taking GPL code and using it outside of the license and this is likely one of the reasons why you have had to close source yours and other developers like Imperdin may end up having to close sourcing his. |
|
|
|
V1.6.2
- Added support for Italocoin new algo (from block 55.000)
- Auto intensity for Vega cards improved, also managed to increase hashing speed on Vega cards for about ~1-1.5% (mainly on heavy algos)
- If user uses non existing GPU id in gpu_conf, it will be ignored, no error will be thrown
- Fixed miner crash when using a non AES capable CPU on some algos
- Added Windows version and build in log
- Added video driver version in log
- Added info about CPU AES support in log
- Statistics now shows number of stale shares that were accepted by pool
- Added parameter 'min_rig_speed_duration' that can set period for 'min_rig_speed' parameter (minimum is 30 sec), default is 5 min
+ I finally bought a Vega 56 card, so in the next releases i will try to improve the performance for Vegas. For now a little speedup of about 1-1.5% is achieved, mainly on Heavy based algos (Heavy, Haven, Bittube, Italo)
+ If you use a non existant id in gpu_conf, it will now be ignored, only id's that exist in your system will be used
+ There was a bug in soft AES that caused miner crash on Stellite and Haven algos, this is now fixed
+ Added accepted stale shares number in statistics. It can't know the number of real accepted stale shares on pool side, but the logic is simple, if a new job is received, but the miner sends a result in the mean time that is for the previous job, and this share gets accepted by the pool, miner will treat this like an accepted stale share.
+ min_rig_speed_duration can set the time you want to check the average hashrate for 'min_rig_speed' parameter. Default is 5 min.
Looks like you included Imperdin's heavy optimizations for that small bump. Did you include that GPL3 code in your miner? |
|
|
|
|
Can we get a build for Cuda 9.0? This build wont run on smOS.
Thanks
|
|
|
|
For the Amazon FPGA rentals, you are only allowed to pull 85W on the FPGA (nearly nothing), making it very hard to make enough profit to pay for the rental. It is possible, but you won't make anywhere close as to what you can make with a real piece of hardware.
I fully expect it to not even cover the rental, but want to learn from seeing it running and work my way backwards before considering purchasing expensive hardware that I do not have the knowledge to make use of. |
|
|
|
There's a fairly new coin I'd like to mine on AWS but I'm not a programmer. I've been reading up on vhdl but I really don't know where start. Would anyone be willing to assist me?
If you don’t want to publically state the coin, pm me. If you’re not a programmer, or a hardware engineer, or an FPGA developer (very different from a programmer), you likely have a very steep slope to getting an efficient miner running a new algorithm. "User 'GPUHoarder' has not chosen to allow messages from newbies." Well that’s fun, as a relatively new member of this forum myself. Fixed. It probably did you a favor and saved you from a long message from me a week ago before you and others had shared a wealth of information with me. |
|
|
|
there were few posts related to AWS in another post related to FPGA mining and one person told that he does mine via AWS FPGA but someone also mentioned that actually amazon does not allow it and bans immediately once you get caught.
Exactly this. In the unlikely chance that you even get to use these FPGAs for crypto, AWS has automated monitoring bots that will find out you are mining. They will of course terminate your miner and your entire AWS account. I wouldn't want to go through all the hassle. If you're going to learn how to FPGA anyway just buy and invest in real machines instead. This is false information being circulated. See this post for some factual information. https://bitcointalk.org/index.php?topic=3459858.msg37024341#msg37024341 |
|
|
|
There's a fairly new coin I'd like to mine on AWS but I'm not a programmer. I've been reading up on vhdl but I really don't know where start. Would anyone be willing to assist me?
If you don’t want to publically state the coin, pm me. If you’re not a programmer, or a hardware engineer, or an FPGA developer (very different from a programmer), you likely have a very steep slope to getting an efficient miner running a new algorithm. "User 'GPUHoarder' has not chosen to allow messages from newbies." |
|
|
|
Hey,
Im looking for a all-in-one tutorial buy site + explanation how work FPGA
It is better to buy the version at 5k or 1k?
What tests were you able to do and how do you make it work?
Really thanks !!
Just curious. Say he gets a tutorial and learns some fpga programming. Dont you need knowledge of how hashing actualy works as well to implement it? Yes, the barrier to entry is far greater than any other popular form of mining and, currently, there is no community. That said a couple of members here are starting to have slightly open discussions that it seems even they are realizing benefits themselves in participating. Like fpga's the work on fpga mining is incredibly parallelized with each person interested having to solve the very same problems everyone else is solving or has already solved. Understandably greed is a stronger motive than the altruism that started the open source projects that this technology stands on the shoulders of. Ironically, for fpga's that parallelization is what makes them so efficient. The same cannot be said of the lack of community within fpga software development. |
|
|
|
@senseless - Yes I’ve got my own RTL and bitstreams - as well as some of my own hardware. I’m pondering your shell/publishing concept, but I haven’t decided if it makes sense yet. I can see the VCU1525 and derivatives being produced in much greater quantity once there is interest though, and that leads to price reductions and makes it difficult for other options to be competitive.
I am in talks with someone who's in the process of developing a 250-300A vccint version of the VCU1525. It's quite possible that may be the version that ends up getting sold. I would like it to be, but again, it just depends on how things go. I should know more in the next couple of weeks. The price should remain within the same ranges depending on QTY. The 9P is the most mass produced chip, there's no getting around the fact it will be the lowest cost / logic ratio in large quantity. If you have any questions RE the shell, send me a ping. Would love to hear your feedback and any problems you might have with it. I need to fire up an F1 instance and refamiliarize myself with how AWS does it. It has been sometime since I initially touched those and to be honest I never got deep into it. You can run the HDK on a much cheaper instance than the F1, do the dev work there and package the bitstream into an AFI (Amazon FPGA Image) that you load onto the F1 instance. This link is useful . https://aws.amazon.com/ec2/instance-types/f1/ |
|
|
|
Lol, I don't code bitstreams myself  -- I've got a basic understanding best case. It's also hard to stop from chattering when i'm so close to having half a purple coin. If you dont code bitstreams yourself, how did you start fpga mining on AWS? Hire help? Slightly pedantic, but bitstreams, from RTL via VHDL or Verilog are not strictly speaking “programmed” or “coded”. Designed and implemented are probably better terms. Code / programs are usually statements of instructions to be executed sequentially by a processor (after being compiled or interpreted). RTL describes the design of actual hardware interconnections / logic between registers, all of which happens essentially at the same time unless you setup clocks and registers to serialize iti. After being written (ok we can call it coded if you really want) and described in Verilog or VHDL it is synthesized, or turned into actual logic gates for the hardware in question - using the LUTs and flip-flops and such available on FPGAs or standard cells for ASICs. Once the synthesizer decides how the logic will be constructed, place and route figured out where to put it all on the chip and how to wire up the connections. The bitstream is actually just a list of every essentially possible connection point on an FPGA and whether or not it is connected. It isn’t executed or run like a program. Programming the bitstream onto the chip would be more like handing an electrician a wiring blueprint and having them connect all the appliances, lights, outlets, etc. with wires according to it. The more I learn, the more I realize how far I am from succeeding in fpga mining on AWS. I'll keep learning so that in a few weeks if the o.p follows through or the expert I have solicited to help becomes available, I'll at least know enough to have informed conversations. Thank you for continuing to post this useful information, I feel like a few more posts and you fpga guys may let me in on the secret handshake. |
|
|
|
Lol, I don't code bitstreams myself -- I've got a basic understanding best case. It's also hard to stop from chattering when i'm so close to having half a purple coin. If you dont code bitstreams yourself, how did you start fpga mining on AWS? Hire help? |
|
|
|
Can you experts please stop blabbering and start coding! Crypto community neads you to provide viable and usable Bitstreams that is early adoptors can use. Who ever release the first solution will most likely make back your development time 6 love...
Here’s an on-topic question. What bitstreams / algorithms does the community actually want? From my, limited, experience in the (voskcoin) gpu mining community, the community wants the most profitable algorithm for the available hardware. for AMD eth and Nvidia Equihash. From the original post, that looks to be PHI1612 for these fpga's. Personally, I'm just looking for something, anything, that will get me mining on an AWS EC2 F1 instance. Profitable or not, I'm interested to see it working. In 6 weeks I may find out from the dentist that I purchased on mturk  Just imagine what @GPUHoarder, @senseless, @2112 and others could do if they were to put their heads together... |
|
|
|
Thank you for the tip on the $99 fpga training kit. I was considering something like this myself and this is actually very useful. Can you recommend any sources of information on how mining is be achieved on an fpga?
Start with something simple like SHA256D used in Bitcoin: https://github.com/progranism/Open-Source-FPGA-Bitcoin-MinerOr something from the official Xilinx marketing publication: http://issuu.com/xcelljournal/docs/xcell_journal_issue_84/16Have fun! Edit: I forgot to include standard explanation about the difference between CPU programming and FPGA programming. CPUs have von Neumann architecture with linear memory, e.g. from 0 to 4294967296. Compiling and running your first 10 line program will take seconds on your typical usable computer with 4GB of RAM. FPGA have a completely generic two dimensional architecture that literally has kajilion of constraints. Most of those constraints are secret to the FPGA vendor. The XCVU9P FPGA discussed in this thread has about 2104 pads, just describing the pads that are actually connected with useful signals on the VCU1525 board is a file that has 25 pages in the manual. Those are the constraints that are visible and not secret. When compiling your first 10 line FPGA program the Xilinx toolchain will still have to process those constraints even if you use less than 1% of 1% of the whole VCU9P chip. On the other hand the small XC7A35T chip on the training board has much, much less internal constraints that needs to be read by the toolchain. You will observe that your small 10 line FPGA program will be completely compiled and done for a small device like like 7A35T while for the large device the Xilinx toolchain is still decrypting the secret VU9P constraints file. Amazon recommends that you run their FPGA development kit for VCU9P on a computer with 32GB of RAM to get sensible performance for nontrivial programs. Just be aware of the above. Edit2: Trying to learn logic design on a high-end device may seriously test your patience. Start with a low-end device. Edit3: Grammar fixes. I highly recommend Altera/Intel Quartus over Vivado for “learning”, despite using Xilinx for all my “professional” projects. Quartus requires less patience and is easier to fool around with. Get a Max10 dev kit, super easy way to test a lot of basic designs and you can fit one pipeline for most small things. SHA256 is actually imho harder than some of the SHA3 competition candidates. Keccak is actually pretty great as a first run - it can take about 2500 luts to implement a none-pipelines single round version. Getting enough UART Comm running to meaningfully get bits to hash on/off the chip takes more effort. I validated my Keccak RTL on a Max10 using Quartus simply because it could be done so easily and relatively quickly. Adapting and filling out all the pipelines on the VCU118 (Ultrascale+ Virtex VUP9) takes hours to synthesize route and place for every minor change on a very wel equipped development box. The Artix 7 200T version takes about 35 minutes a shot on my MacBook Pro (in a VM). Patience is the name of the game - or set web dev and app skills aside and actually spend some serious time planning and doing pencil + paper design validation and review, then use logic simulation and ultimately timing simulation before even putting anything on a chip. Right now I'm reading a couple of books, watching youtube video's and using the information given here. For others reading 'DIY FPGA' in the title and expecting to do it themselves. Intel are giving away 'fpga for dummies' if you sign up for their spam at https://plan.seek.intel.com/PSG_WW_NC_LPCD_FR_2018_FPGAforDummiesbook. Was hoping to use the AWS F1 instance with their fpga dev ami that has Xilinx SDx 2017.4, Free license for F1 FPGA development, but it sounds like that will be jumping in at the deep end. I saw a Keccak fpga project for Nexys 4 Artix-7 boards, it says that it uses an external frequency generator at 100Mhz and has a performance of 100Mh/s. https://github.com/0x2fed/FPGA-Keccak-MinerLastly, I am not seeing anything on Amazons ToS that forbids mining, senseless says he does (or has done) it yet the o.p. and others have said Amazon will ban you for it. I'll make that bet and report back if I can ever get or build a working AFI (bitstream). |
|
|
|
Thank you for the tip on the $99 fpga training kit. I was considering something like this myself and this is actually very useful. Can you recommend any sources of information on how mining is be achieved on an fpga?
Start with something simple like SHA256D used in Bitcoin: https://github.com/progranism/Open-Source-FPGA-Bitcoin-MinerOr something from the official Xilinx marketing publication: http://issuu.com/xcelljournal/docs/xcell_journal_issue_84/16Have fun! Edit: I forgot to include standard explanation about the difference between CPU programming and FPGA programming. CPUs have von Neumann architecture with linear memory, e.g. from 0 to 4294967296. Compiling and running your first 10 line program will take seconds on your typical usable computer with 4GB of RAM. FPGA have a completely generic two dimensional architecture that literally has kajilion of constraints. Most of those constraints are secret to the FPGA vendor. The XCVU9P FPGA discussed in this thread has about 2104 pads, just describing the pads that are actually connected with useful signals on the VCU1525 board is a file that has 25 pages in the manual. Those are the constraints that are visible and not secret. When compiling your first 10 line FPGA program the Xilinx toolchain will still have to process those constraints even if you use less than 1% of 1% of the whole VCU9P chip. On the other hand the small XC7A35T chip on the training board has much, much less internal constraints that needs to be read by the toolchain. You will observe that your small 10 line FPGA program will be completely compiled and done for a small device like like 7A35T while for the large device the Xilinx toolchain is still decrypting the secret VU9P constraints file. Amazon recommends that you run their FPGA development kit for VCU9P on a computer with 32GB of RAM to get sensible performance for nontrivial programs. Just be aware of the above. Edit2: Trying to learn logic design on a high-end device may seriously test your patience. Start with a low-end device. Edit3: Grammar fixes. Excellent information, thank you. I was just about to give in and get off your lawn and you go and hand me a fist full of cookies. |
|
|
|
Not at all angry. Attempted to make that clear on my last post.
My point here is that some very smart people here are making unproven claims. It is healthy to question those claims that others here are hoping to profit from.
If you truly do have a skill that has given you a competitive advantage, by all means keep it to yourself, you've earned it.
I'm not buying it. You just lack introspection. You don't talk like an investor. Investors are (generally) friendly or even overly friendly. Their suspiciousness is on the inquisitive side. Your suspiciousness is on the paranoid side. And it shows like a "tell" in poker. Read the past posts of the user senseless, he apparently wasted some considerable money doing a small world tour trying to solicit business, unsuccessfully. I bet that he now has some useful knowledge on how to distinguish gamblers from investors. In my experience for the casino gamblers the road to recovery may be through learning how to really compute their odds. For the cryptocurrency mining addicts the road to recovery may be through actually investing $99 in an FPGA training kit like Digilent Arty 7 and actually losing their logic design virginity. Edit: In order to effectively play a white knight here you actually need to show some knowledge, otherwise you just look funny. Ok, you have me misunderstood again. I appear to have led you to believe that I'm presenting myself as a white knight, gambler and/or investor. I am not claiming to be any of those things. I am a mining hobbyist. I do not have a significant investment in it and I do ok from my day job in an entirely different field. Thank you for the tip on the $99 fpga training kit. I was considering something like this myself and this is actually very useful. Can you recommend any sources of information on how mining can be achieved on an fpga? |
|
|
|
|
