The probability of colliding addresses is very low.

For 10 billion people with 1000 addresses each, the probability of 2 addresses colliding is less than 0.000000000000000000001%

ASICboost works by finding partial block header collisions for the transaction list. With colliding block headers, it is possible to test one nonce against multiple block headers, while sharing some of the computations. By sharing computations, the total energy requirement is reduced.

This can easily be done by using certain parts of the block header, such as the version bits, as a nonce. The disadvantage is that it's obvious you are using ASICboost. This would not be affected by segwit.

There is a hidden way of using ASICboost, which instead of using a nonce in the block header, the search is performed by randomizing the order of transactions.

In the absence of segwit, because of the tree structure, it is not necessary to hash every transaction to compute a new Merkle root; it is merely sufficient to swap branches, and recompute only the hashes further up the tree. This is much faster than recomputing the whole tree, as it replaces linear scaling with log scaling.

With Segwit, there are two Merkle trees, with the witness root, located in the first leaf of the main tree. The two trees must have the same order, so must both be shuffled and hashed together, and not only that, but you always have to recompute the hashes for the route to the first leaf of the tree. This vastly increases the computational effort to find the collisions needed to use the ASICboost technique.

An alternative strategy for hidden ASICboost is for the miner to include a transaction to themselves in each block. They then use that transaction as a nonce (e.g. by varying the transaction output values). However, this requires an ECDSA operation and recalculating the path through the Merkle tree to that transaction. Again, for a hash collision search, it is a considerable computational effort.

The short answer is that segwit does NOT render ASICboost useless. Visible ASICboost is not affected. However, hidden ASICboost is made more difficult.

You're right. Powering this type of ASIC is a real challenge. However, there are solutions available for CPUs and GPUs - typically, these are complex multi-phase systems with sophisticated feedback systems carefully tuned for the precise application. While you can buy the voltage controller ASIC off-the-shelf, you still need the inductors, switches, and compensation network, as well as a suitable circuit design.

One of the things that struck me when I first saw the PCB layouts for the alpha board was that they appeared to be using off-the-shelf , but very expensive ($50 each in 1k quantities), DC-DC modules for each group of 4 ASICs. This suggested to me that they either didn't want to fund the design of a DC-DC converter based around a CPU/GPU VRM ASIC, or that they did not have the expertise to be able to build such a converter.

The latest spins of the board appear to use Altera monolithic DC-DC converters - an impressive ASIC with integrated switches and integrated inductor! Again, suggestive of the fact that there is no will or capability to build a DC-DC solution in house. The Altera converters are even more expensive - $19 each in 1k quanitites - with 1 converter needed per viper ASIC. The other issue is that they seem desperate to keep the cost down, they've said that the viper ASIC needs 15A @ 1.2 V - so it's rather optimistic to use a monolithic DC-DC converter rated at a maximum current rating of 15 A.

This latest update from Alpha has delivered some wonderful satire - quite how it is possible to project manage as badly as this beggars belief.

They've had nearly a year with virtually no competition, and they've blown it all, with fail after fail after fail.
SFARDS (formerly gridseed) taped out their 2nd gen scrypt ASIC last month with an estimated power efficiency of 2W per MH/s.

I wonder if alpha will ship their 14.4 J/MH miners before SFARDS ship their 2 J/MH miners...

So, they've redesigned the board so that instead of 3 texas instruments pre-fabricated DC regulators at $50 each - they now use 12 Altera regulators at $22 each.

I doubt it. I reckon this is brand new news.

Developing hardware and testing ASICs and tweaking firmware takes time, a lot of time. Most of the companies building miners have had their engineers pulling all-nighters and working through weekends to debug - mainly because the engineers are investors in the company. They're roughly on-track with what I expected given the date of delivery of the chips - maybe a bit slower, but when you outsource stuff, it tends to be slow.

There is no sign that they are mining. If they were, it would be obvious from network hashrate and difficulty.

From their update it sounds like they have literally just got this board working. One of the chips appears to be dead, and the others have malfunctioning cores. They talk about MBIST (memory built in self test) possibly, they have installed more than 128 kB of RAM on each core, so that they have some spare RAM on each core which can be swapped in, in case some of the RAM is faulty.  Once they have fully tested all the chips, they may be able to "rescue" most of the cores, by swapping the memory around. However, if they're demoing a board which hasn't been fully memory mapped, then it suggests that it is literally the first time it has ever successfully booted up.

The whole thing all seems to fit with a very carefully, very conservatively engineered system: ASICs designed with powerful built-in self repair functions, likely with no clever tricks, just good-old reliable techniques. The PCB design is reasonable and uses high-end components. The problem is all this careful design takes time and costs money.  

If you look back at the winning BTC mining designs - it is the radical designs, that one or 2 students knocked up as their first ever ASIC (this is the case with the Bitfury chip - it's a 1-man effort, their first ever ASIC - it's a crazy design, extreme risk, but they got lucky and it worked first time). Most of the other scrypt ASICs have been designed on the cheap - no clever redundancy and self-repair - just the basics, small die sizes and low cost manufacture - if the yield is low, you can just drop the chips in the trash. The alpha/KNC method of going for big ASICs at the bleeding edge, needs a lot more finesse, and a lot more design. KNC appear to have shipped some real turkeys. It will be interesting to see just how much longer alpha need, although the end does now appear in sight.

Edit - HAHA. Wow. I've just noticed the hand-soldered, sticky-tape'd down bodge chips on the PCB. Someone screwed up the PCB design. That's probably why it's taken 4 weeks to get the board to boot up, and explains why they've had to get a new PCB designed.

The problem is that alpha is a limited company. That means that liability for any debt that the company has is limited to the company only. The directors, in person, are immune against any claim for money.

It is very, very difficult to make a claim against a director in person. You basically have to prove that they were stealing money from the company before the company disappeared.

Yes. That's basically correct. He's limited by the 100 A service (fuse, not circuit breaker).
His "in house" consumption is limited by the 80A rating of the RCD. However, if he is drawing substantial power in the garage, then it will be limited by the total load on the 100A main switch and fuse.

So, if he exceeds 100A, he will blow out the sealed service fuse, and then have to call the power company to come out, unseal it and replace the fuse and reseal.

The big problem he has in his house is the electric shower. As this has a 50 A dedicated circuit, this suggests that it is a 10.8 kW shower (45A operating load). That is a big load, and once you add lighting loads, kitchen loads, etc. a 40A mining load is starting to look infeasible.

One option is to upgrade the supply from a 230V (23 kW) supply to a 230/400V (70 kW) supply. If he asks his electricity supplier they will quote on the price of an upgrade (usually it's around £2000-£3000), and it'll be another £500-800 for an electrician to replace the fusebox with a 400 V one + another £few hundred for additional circuit installation. In reality, this probably isn't an economically viable option.

Yes. Neutral and ground are separate.
No. Delta is not used at low voltage. The final service voltage is 230/400V wye.  In Uk, most residential is single phase 100A @ 230V. Large residences and small commercial premises will usually have 3 phase 100A @ 230/400V.

Whether both neutral and ground are supplied by the sub-station depends on the type of service and cabling.
TN-S (separate earth supplied by substation), TN-C-S (combined neutral/earth supplied by substation, with redundant earthing in transit and separated at point of service drop) and TT (no earth connection provided by substation, customer provides earth rod at service entrance) are all common.


Maximum continuous load on a 40A circuit is 40 A. No derating is required for load duration (doesn't stop it being a good idea), and in general is not performed. For example, no specific derating is needed for a 3.1 kW storage heater which is designed to take full load for 7 hours to charge it's thermal store, and the closest circuit capacity available (16 A) can be used. Typical installation cable is 1.5 mm2 flex (for final connection) and 2.5 mm2 in-wall wiring (derated due to thermal insulation).

Derating is performed based upon ambient temperature, cable grouping, cable mounting surface and insulation.

That is correct. The CAD drawings of the case for the 250 MH miner show 15 hashing boards

Quite how they are connecting the boards to 10 power connections isn't clear. However, the boards have 2 power connectors - possibly they are connecting the boards in groups of 3, with the 1st and 3rd connecting to the power ports, and then the middle board connecting to boards 1 & 3.

That would explain why their test board only had 1 PCI-e connector attached. If it's not been used in a miner, and only used for testing, it only needs 1 power port.

Very doubtful that the board has been used much.

It looks like only 1 PCI-E power connector has been installed. The hand soldering is expected, because it is a through hole connector placed on the back of the board - a non-standard configuration. Normally, this type of board will be IR reflowed on the top and wave soldered on the bottom. This can't be done with a back-side connector in place, so the connector will have to be hand-soldered as the last step in assembly.

The discoloured areas are signal connectors - the PCB CAD files show that they are miles away from anything power related. Those are probably the coldest spots on the board, being well away from power circuits and from the ASICs. I cannot explain the discolouration.

The board is unlikely to be operable (at least at meaningful hash rate) without a large heatsink - there is no evidence of scratching on the heatsink mounting holes, which would be expected if a heatisnk had been installed and removed. There are no traces of heatsink compound left - so if the board had been used, it has been thoroughly solvent cleaned before photographing. Prolonged use at high temperatures also degrades heatsink compound, with a tendency to make it release silicone oil. Anyone who has serviced or rebuilt graphics cards in mining duty would have seen this. This silicone is very difficult to clean off, even with electronics solvents like IPA.

That board is over-engineered.

No idea what the discoloration at the right side is. It's unlikely to be due to use, as there is nothing there to get hot. The CAD files show that there is nothing there on the back.

The amazing this is the power supply modules - 3 on each board. These are high-end DC-DC converters which cost $50 each in wholesale quantities. With 15 viper boards per miner, that's $2250 for the DC-DC converters alone!

As one might have expected with being subbed out to a general engineering contractor - they've got a miner which is a workhorse, and is very expensive. Sadly, that isn't really what most miners want.

Looking at the size of the chips - I'd estimate that manufacturing cost of them is going to be about $25 each. At 180 chips per miner that's another $5k or so for the chips. (assumptions 250 mm2, 28nm, 50% yield)

If they have serious problems with their chips then it's game over.

You need $1million cash in hand and 3 months to tape-out and build a new batch of chips. Something tells me that alpha might not quite be in a position to do that.

Not normally a problem. The default position is that proof of postage can be taken as proof of receipt. This is the case, even if an item is returned to sender. The courts have been known to treat returned mail as "served".

Good luck with the elliptic curve point multiplication

I showed the paper to an ASIC designers and the reply was:

"Dual-rail domino logic is glitchy and fickle as f**k, and needs only the slightest excuse (e.g. you put a domino module next to another one) not to work. Clockless logic is interesting, but it's virtually impossible to debug it once you've got your silicon.  You could build the chips, and spend a decade debugging and still have no idea what went wrong"

I don't design ASICs, but I've tinkered with FPGAs a bit.

The optimisations listed in the paper all appear plausible. The omission of DRAM refresh is clever; I seem to recall having heard of a similar trick in the distant past, but I may be mistaken.

Domino logic is a technique for ultra fast, reduced power, reduced die-size logic design. It has a lot of pitfalls and is difficult to use and time-consuming to design. However, if your design has one particular circuit which is slower than all the others, and is the limiting factor for your clock speed (the so-called, critical path), then its benefits may be worth the effort. Salsa makes extremely heavy use of addition, so it's not surprising that the addition is a critical path.

The key thing about ASIC design is that it's one thing to design a digital circuit in an FPGA and port it to an ASIC. However, if you have enough time and enough experts, you can produce in-depth analysis of the circuit, and hand-draw the most critical parts, or use a variety of other clever tricks.

It's the difference between expert careful design and rapid turn-around design that you see between Bitfury's 55 nm ASIC and KNC's 20 nm ASIC - which have almost identical cost and performance.

It's less resistant from a technical perspective. I'd expect the gap between ASICs and GPU to be about 10x wider for neoscrypt, compared with scrypt.

From a practical perspective, only minor alts are going to be using neoscrypt, so there isn't going to be any significant money to be made; and more importantly, many of the coins using neoscrypt are switching from another algo. If they've switched algo once, they're probably going to switch again, so again ASICs won't be useful.

Neoscrypt also has big disadvantages, in that it is very slow for CPUs. This makes verifying the blockchain much slower, and may make it impractical for mobile devices which are power constrained.

If you want your coin to be ASIC resistant, then the easiest way to do it is to say that you will change the PoW algo when and if you feel like it. 

Raspberry Pi performance may be the problem. The Pi has to check the hash from the cubes.

SHA256 is a very easy hash to calculate. Scrypt is much harder. Raspberry pi takes about 30,000 times longer for a scrypt check, than a SHA256 check.

The main problem with alpha is that they are only middle men.

They don't seem to be doing any of the design or manufacturing work in house. From what I have been able to gather from what little they have said, is that all the design work has been subcontracted out.

Subcontracting work is always a risk, because the subcontractor may not understand the urgency or there may be misunderstandings. It's worth pointing out that one of alpha's early design documents (from July 2013) which basically describes how a scrypt miner might work, and how the process of mining works, was written not by alpha, but by a subcontractor (Dexcel - curiously, the author's username left in the document's metadata is Amit Sinha, Dexcel's CEO).

In my experience of electronic design, for anything critical, you need to give your subcontractor as tight a specification as possible, preferably with a proof-of-concept or reference design. From what I can tell, alpha went to their engineering contractor Dexcel, and basically said "make scypt miner, pls!".

You can see the lack of focus in the design of the miner. There is a very complex, expensive, "viper interface board". It looks very nicely designed for the task, and it must have taken hundreds of man-hours to design, and given its complexity is likely to be expensive to manufacture; they've then needed to do a lot of porting of software to their custom hardware. Everyone else has just used an off-the-shelf $20 single-board computer like a raspberry pi, or a beagleboard.

They've already said that the miners aren't going to be manufactuered by alpha. The manufacturing is going to be subcontracted to an assembler in India.