Open source ASIC design plans in Hardware Description Language (HDL) format?

[Geremia]

Are there any freely-available ("open source") ASIC design plans in, e.g., HDL or AHDL format(s)? (cf. the related Bitcoin StackExchange question)

[TheRealSteve]

Nope.  There's several open source board designs, but no open source ASIC.  Designing one for larger nodes isn't hard, you could easily do a hardcopy style from an FPGA design (that are available) - designing an efficient one is another matter of course

[Geremia]

There's several open source board designs, but no open source ASIC.

There's this, but, yes, technically FPGA ≠ ASIC.

[SpanishSoldier]

Are there any freely-available ("open source") ASIC design plans in, e.g., HDL or AHDL format(s)? (cf. the related Bitcoin StackExchange question)

There was a project regarding this: OpenBitASIC : The Open Source Bitcoin ASIC Initiative