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Author Topic: Hashing SHA-256 with ASICs and other mining hardware  (Read 2076 times)
valiron (OP)
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April 07, 2015, 01:17:22 PM
 #1

Hi everyone,

I want to use an ASIC or some mining hardware in order to speed up hashing of files (SHA-256).

Is this possible? Are there technical specifications for the available hardware in order to hash arbitrary files or are they tailored only to mine bitcoins (that is, hashing headers of blocks)?

Thank you for your input!
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April 07, 2015, 01:45:17 PM
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Covered many a time, here's a recent-ish thread:
https://bitcointalk.org/index.php?topic=988572
tl;dr: Not possible.

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April 07, 2015, 02:06:22 PM
 #3

Covered many a time, here's a recent-ish thread:
https://bitcointalk.org/index.php?topic=988572
tl;dr: Not possible.

Thank you!

This is what I found following your link.

Quote
The ASICs are made for hashing 80 bytes, where you give them the midstate from hashing the first chunk (64 bytes), and 12 bytes from the second chunk. They then try all variations of the last 4 bytes to try and find a hash that starts with 4 zero-bytes. Only values that result in the 4 zero-bytes are reported at all. That's basically what mining is.

Where can I find the technical specifications of the task performed by an ASIC?
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April 07, 2015, 02:20:31 PM
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Where can I find the technical specifications of the task performed by an ASIC?
That may be ASIC-specific - though most of them are going to follow exactly the bit that you quoted.  Just to emphasize - they're not returning the hash of those 80 bytes, but the nonce (and sometimes that's an offset nonce) that leads to a valid hash.

If you wanted to look at early technical approaches, I think you'd have to go way back in time to the FPGA designs.  The earliest ASICs were largely referencing those. ( Of course an FPGAs *could* perform limited general purpose hashing if you modify the code. )  Might even be GPU, though I'd think that on GPUs you might as well perform a full test, rather than a partial.

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April 07, 2015, 02:56:28 PM
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Where can I find the technical specifications of the task performed by an ASIC?
That may be ASIC-specific - though most of them are going to follow exactly the bit that you quoted.  Just to emphasize - they're not returning the hash of those 80 bytes, but the nonce (and sometimes that's an offset nonce) that leads to a valid hash.

If you wanted to look at early technical approaches, I think you'd have to go way back in time to the FPGA designs.  The earliest ASICs were largely referencing those. ( Of course an FPGAs *could* perform limited general purpose hashing if you modify the code. )  Might even be GPU, though I'd think that on GPUs you might as well perform a full test, rather than a partial.

Thanks again. You are being very helpful.

If it returns only the winning nounce then it can't be very useful for other purposes.

So I am going to dig into the old FPGA designs threads...
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April 16, 2015, 11:49:07 PM
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Where can I find the technical specifications of the task performed by an ASIC?
That may be ASIC-specific - though most of them are going to follow exactly the bit that you quoted.  Just to emphasize - they're not returning the hash of those 80 bytes, but the nonce (and sometimes that's an offset nonce) that leads to a valid hash.

If you wanted to look at early technical approaches, I think you'd have to go way back in time to the FPGA designs.  The earliest ASICs were largely referencing those. ( Of course an FPGAs *could* perform limited general purpose hashing if you modify the code. )  Might even be GPU, though I'd think that on GPUs you might as well perform a full test, rather than a partial.

Thanks again. You are being very helpful.

If it returns only the winning nounce then it can't be very useful for other purposes.

So I am going to dig into the old FPGA designs threads...
They aren't useful for ANY other purpose.  That's why they're called Application Specific... FPGA are useful for other things precisely because they're programmable.

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April 22, 2015, 09:12:07 AM
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Isn't the fact that they only return the nonce a matter of the software not the hardware? The hardware itself would be specific in the fact that it is chip tuned to perform Double SHA256 hashing extremely effectively. The chip itself can't return anything out of it other than a completed full hash.

If you could recode the software/firmware to spit out a full hash from the software side, you would have a valid SHA256 hash, so long as your input is specifically 80 Bytes. I mean is it not the firmware/software that has the logic coded in it to determine what is and is not below the target?
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April 22, 2015, 10:15:58 AM
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Isn't the fact that they only return the nonce a matter of the software not the hardware? The hardware itself would be specific in the fact that it is chip tuned to perform Double SHA256 hashing extremely effectively. The chip itself can't return anything out of it other than a completed full hash.

If you could recode the software/firmware to spit out a full hash from the software side, you would have a valid SHA256 hash, so long as your input is specifically 80 Bytes. I mean is it not the firmware/software that has the logic coded in it to determine what is and is not below the target?
No that's not how ASIC hardware works. It does indeed only return nonces since it doesn't even fully complete the double sha256.

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April 22, 2015, 01:22:26 PM
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Isn't the fact that they only return the nonce a matter of the software not the hardware? The hardware itself would be specific in the fact that it is chip tuned to perform Double SHA256 hashing extremely effectively. The chip itself can't return anything out of it other than a completed full hash.

If you could recode the software/firmware to spit out a full hash from the software side, you would have a valid SHA256 hash, so long as your input is specifically 80 Bytes. I mean is it not the firmware/software that has the logic coded in it to determine what is and is not below the target?
No that's not how ASIC hardware works. It does indeed only return nonces since it doesn't even fully complete the double sha256.

So then what the hell is it doing, if it's not completing a double SHA256? You've completely lost me on this. Again I have to ask... if it's not completing a double SHA how does it know that it's got any valid hash below the target?
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April 22, 2015, 02:11:45 PM
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So then what the hell is it doing, if it's not completing a double SHA256? You've completely lost me on this. Again I have to ask... if it's not completing a double SHA how does it know that it's got any valid hash below the target?
You don't need the last few steps in sha to examine the first few bytes.

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April 22, 2015, 11:42:13 PM
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So then what the hell is it doing, if it's not completing a double SHA256? You've completely lost me on this. Again I have to ask... if it's not completing a double SHA how does it know that it's got any valid hash below the target?
You don't need the last few steps in sha to examine the first few bytes.

So the ASIC is essentially "screening" POSSIBLE candidates for a solution? It rapidly discards impossible solutions and only alerts the upper level processor when it "might be onto something"?
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April 23, 2015, 12:02:48 AM
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So the ASIC is essentially "screening" POSSIBLE candidates for a solution? It rapidly discards impossible solutions and only alerts the upper level processor when it "might be onto something"?
No - there's no 'screening', as that would presume that it would somehow be able to tell that some inputs are more likely to yield a valid hash than other inputs.

Keep in mind that the hash needs to be below a certain value.  If you now look at the SHA2 function, you'll see there's several stages where you've already got a hash that exceeds that value, and don't need to perform any of the calculations after that point.

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May 01, 2015, 07:32:33 PM
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So then what the hell is it doing, if it's not completing a double SHA256? You've completely lost me on this. Again I have to ask... if it's not completing a double SHA how does it know that it's got any valid hash below the target?
You don't need the last few steps in sha to examine the first few bytes.

So the ASIC is essentially "screening" POSSIBLE candidates for a solution? It rapidly discards impossible solutions and only alerts the upper level processor when it "might be onto something"?

Because of the nature of SHA256 you can tell three steps from the end of the second hash if the highest 32 bits are at or below the difficulty target. Got a very good article that describes the whole process in simple to read form. Can't find it right now but I'll post it when I do.
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