tacotime
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March 21, 2013, 07:52:07 PM |
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ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
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jasinlee
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March 21, 2013, 08:03:21 PM |
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Speaking on subject, I read somewhere scrypt is too complicated to be done in ASIC, therefore FPGA is the only way to go. Is it true?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
There are a couple reasons, for one something you need to understand ASICs are basically FPGAs that were custom made to do the same task, rather than a semi generic device being used to do the same function. Next to find out how to make the ASIC, you have to create the FPGA in the first place. And then there is the price, ASICs since they are completely custom, they have to be designed from the ground up and the cost is much more.
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jasinlee
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March 21, 2013, 08:13:17 PM |
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ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
Not sure who you mean is alpha testing it, no one has the unit but the vhdl dev for the time being. And as noted before laSeek is only advising he is not the developer.
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SyRenity
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March 21, 2013, 08:25:18 PM |
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Thanks, more clear now and makes a business sense.
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shibaji
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March 21, 2013, 08:26:32 PM |
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jasinlee, let me know if I can help in any way - simulation/synthesis/functional verification. If needed, I can send you my credentials privately. Best wishes.
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Simran (OP)
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March 21, 2013, 08:32:14 PM |
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ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I turn 14 in September.
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tacotime
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March 21, 2013, 08:32:58 PM |
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ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
Not sure who you mean is alpha testing it, no one has the unit but the vhdl dev for the time being. And as noted before laSeek is only advising he is not the developer. Oh, he's the one I'd been getting info on about it before. Who is the actual dev? As far as alpha testing I'm talking about Simram, since he's suggesting in this thread one if the first units is going to him.
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tacotime
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March 21, 2013, 08:35:49 PM |
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I turn 14 in September.
Okay. I respect the fact that you spend a lot of time on Litecoin, but it'd be beneficial if you turned down the anti-gay/pot rhetoric and trolling a bit. Of course, this is coming from one if the former capital trolls here, but I've been trying to get a little more serious lately.
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jasinlee
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March 21, 2013, 08:37:07 PM |
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Still trying to squeeze a demo unit out of me huh? Just to be clear we are not done yet, but we are nearing completion. I am not giving out a bunch of details for now, partly due to competition and partly due to my knowledge of how the technical aspects being limited.
I figured everyone picked up on the sarcasm....simran much as I know it breaks your heart. You are not one of the alpha testers. So far there are only 2 and I am one of them.
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Simran (OP)
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March 21, 2013, 08:42:40 PM |
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Still trying to squeeze a demo unit out of me huh? Just to be clear we are not done yet, but we are nearing completion. I am not giving out a bunch of details for now, partly due to competition and partly due to my knowledge of how the technical aspects being limited.
I figured everyone picked up on the sarcasm....simran much as I know it breaks your heart. You are not one of the alpha testers. So far there are only 2 and I am one of them. ![Sad](https://bitcointalk.org/Smileys/default/sad.gif) I'm sure you and a few others do realize I'm trollan, and made this thread to get you some more attention before the release. Anyways, tacotime just mad cause he asked, but you said no, but he thought I was still finna test one LOL :trlf: Pm if you're in need of a reviewer who is well known here, I have meter devices to measure power draw too.
![Roll Eyes](https://bitcointalk.org/Smileys/default/rolleyes.gif) ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
umadese?
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jasinlee
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March 21, 2013, 08:46:58 PM |
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Stop poking fun at people Simran, change the title to like LTC FPGA discussion or something. I dont have a firm date so you dont for sure ![Tongue](https://bitcointalk.org/Smileys/default/tongue.gif)
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tacotime
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March 21, 2013, 08:48:46 PM |
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I'm never mad, just tired. Litecoin has gone from being a hobby to a major source of income for me now, as my graduate stipend is frankly awful as the gov't cuts more money from science and edlngineering, and my wife also has a disability that keeps her from working, so I'm starting to worry more about the health of the chain and of course I'd be worried if a scammy company like BFL would come out trying to sell Litecoin hardware.
The professionalism is my concern, not whether or not there are FPGAs or whatever. I can always sell my GPU rigs and buy FPGAs later.
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Simran (OP)
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March 21, 2013, 08:53:12 PM |
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I'm never mad, just tired. Litecoin has gone from being a hobby to a major source of income for me now, as my graduate stipend is frankly awful as the gov't cuts more money from science and edlngineering, and my wife also has a disability that keeps her from working, so I'm starting to worry more about the health of the chain and of course I'd be worried if a scammy company like BFL would come out trying to sell Litecoin hardware.
The professionalism is my concern, not whether or not there are FPGAs or whatever. I can always sell my GPU rigs and buy FPGAs later.
Nice, man! You know I'm just trolling lol <3 I got love for all of y'all! We don't need BFL touching LTC at all. BFL Josh can such my dick while I'm hollering "187"!
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SyRenity
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March 21, 2013, 09:02:10 PM |
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By the way, would it be possible to re-target this miner to alt. cryptos other then LTC? Then plugging it to this feed would make a great multi-miner machine: http://dustcoin.com/mining
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Simran (OP)
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March 21, 2013, 09:09:19 PM |
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By the way, would it be possible to re-target this miner to alt. cryptos other then LTC? Then plugging it to this feed would make a great multi-miner machine: http://dustcoin.com/miningIt should work for any sCrypt coin. Other than that, the other coins use SHA-256 which BTC FPGA/ASICs can mine.
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tgsrge
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March 21, 2013, 09:14:30 PM |
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By the way, would it be possible to re-target this miner to alt. cryptos other then LTC? Then plugging it to this feed would make a great multi-miner machine: http://dustcoin.com/miningSince the "engineers" only dabble in the most vague details my answer will have to do: Merge mine?No. Switching back and forth from scrypt (litecoin) to others like bitcoin? Depends. They would need to specifically account for it, and this will add some amount of complexity to their implementation. It's doable but not likely.
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2112
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March 21, 2013, 09:26:58 PM |
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External DRAM, needs to dedicate FPGA resources for refreshing circuitry but memory is a lot cheaper and there might be spare logic blocks anyway (so that what I did bet on)
Why would you even enable refresh for the scrypt(1024,1,1) scratchpad? What is the probability that given memory cell in the scratchpad RAM will not be accessed within its maximum refresh period?
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ElectricMucus
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March 21, 2013, 11:41:21 PM |
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External DRAM, needs to dedicate FPGA resources for refreshing circuitry but memory is a lot cheaper and there might be spare logic blocks anyway (so that what I did bet on)
Why would you even enable refresh for the scrypt(1024,1,1) scratchpad? What is the probability that given memory cell in the scratchpad RAM will not be accessed within its maximum refresh period? You are right, it should work without refreshing. The question then is what is greater: The amount of invalid shares due to memory errors from non-deterministic refresh or the overhead from the refreshing circuitry?
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2112
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March 21, 2013, 11:46:40 PM |
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You are right, it should work without refreshing. The question then is what is greater: The amount of invalid shares due to memory errors from non-deterministic refresh or the overhead from the refreshing circuitry?
I don't get it. Are you kidding? What memory errors? scrypt(1024,1,1) provides perfect memory refresh for free, unless you somehow slowed it down, e.g. by a breakpoint in debugging.
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ElectricMucus
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March 22, 2013, 12:00:22 AM |
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You are right, it should work without refreshing. The question then is what is greater: The amount of invalid shares due to memory errors from non-deterministic refresh or the overhead from the refreshing circuitry?
I don't get it. Are you kidding? What memory errors? scrypt(1024,1,1) provides perfect memory refresh for free, unless you somehow slowed it down, e.g. by a breakpoint in debugging. I suspected as much too but wasn't sure there wouldn't be any "holes" in it. Are you certain that every cell of memory is used each time?
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