Raspberry Coins - Cyclone V - 28nm based FPGA miner

[linlin]

NO! You are making big mistake. Scrypt runs 4096 iterations of salsa20_8 for calculation of ONE hash.

[J35st3r]

Good info and good thread - we could probably throw the Raspberry Coins CM-1 miner into the bunch of boards that are running the open-source code (might need to make some minor adjustments for the Raspberry Pi - SPI interface).

... So what makes Litecoin mining interesting is :
  - scrypt runs the SHA256 in a loop (1024 times)
  - uses about 128K of memory

... the end result is that scrypt rates are  slower (in the range of 1000+ KHash/sec) while bitcoin (using straight SHA256) is in the (1000+) MHash/sec areas.   As a result, the difficulty level should be lower for scrypt.  In addition, the Cyclone V appears to have more than enough memory to run scrypt without going external.  This makes mining Litecoin (and running scrypt) appear promising to me.

Well, you're going to have some competition (as a little googling would have shown) http://www.litecoinfpga.com/ (yes funny pic, but very serious dev guy, click on "you can ask here" for the forum).

[jasinlee]

NO! You are making big mistake. Scrypt runs 4096 iterations of salsa20_8 for calculation of ONE hash.

This is actually correct amazingly from the 11 post person lol.

https://github.com/litecoin-project/litecoin/blob/master/src/scrypt.c

Rows: 277 and 282

[J35st3r]

Well, you're going to have some competition (as a little googling would have shown) http://www.litecoinfpga.com/ (yes funny pic, but very serious dev guy, click on "you can ask here" for the forum).

And from a quick scan of that thread I come across a fantastically detailed post https://forum.litecoin.net/index.php/topic,2702.msg30526.html#msg30526

... in summary it looks like a couple of hundred kHask/sec scrypt for your board (the money quote is 55kHash/sec from 11 threads on an XC7K160T). So it doesn't look good using just the internal memory.

[Edit] ... except Jasinlee then goes and kyboshes it a few posts later https://forum.litecoin.net/index.php/topic,2702.msg30697.html#msg30697

Hmm, this site goes in my bookmarks, will need to get some popcorn 

[J35st3r]

NO! You are making big mistake. Scrypt runs 4096 iterations of salsa20_8 for calculation of ONE hash.

This is actually correct amazingly from the 11 post person lol.

https://github.com/litecoin-project/litecoin/blob/master/src/scrypt.c

Rows: 277 and 282

Oh, hi Jasinlee. THIS is the litecoin FPGA dev guy BTW!

[newmars]

interested in a Litecoin FPGA instead 

[LazyOtto]

Perhaps we should not have chosen the CM-1 as the name of our product.  I did not realize that somebody else had used those particular letters and numerals.

Ya think?

What I'm hearing here is that you did not bother to fully research the existing market before jumping into this.

IMO you are offering an unproven product at premium prices.

-- edit

Now, it may well be that you can't feasibly offer this at a substantially lower price. That doesn't make it a good deal, though.

The competition, all currently in stock and therefore available for delivery within a week is:

Raspberry Pi, power adapter and USB cable: $45 + $5 + $2 = $52
ASICMiner USB Block Eruptor * 3 = 6.3btc ~= $700
USB Hub = ~ $20

A total of roughly $772 for 1gh/s. (known / proven / delivered in a week)
In hand and hashing at about the next difficulty change.

(And, IMO, even that is a poor buy since those USB Block Eruptors might well never hit break-even at the 2btc each price point.)


Yes, you can tout the theoretical flexibility of FPGA reprogramming. But that is a very non-trivial effort and if you don't intend / expect to take advantage of that aspect you'll be paying for an unrealized benefit.

[jasinlee]

Well, you're going to have some competition (as a little googling would have shown) http://www.litecoinfpga.com/ (yes funny pic, but very serious dev guy, click on "you can ask here" for the forum).

And from a quick scan of that thread I come across a fantastically detailed post https://forum.litecoin.net/index.php/topic,2702.msg30526.html#msg30526

... in summary it looks like a couple of hundred kHask/sec scrypt for your board (the money quote is 55kHash/sec from 11 threads on an XC7K160T). So it doesn't look good using just the internal memory.

[Edit] ... except Jasinlee then goes and kyboshes it a few posts later https://forum.litecoin.net/index.php/topic,2702.msg30697.html#msg30697

Hmm, this site goes in my bookmarks, will need to get some popcorn 

Lol sorry didnt mean to squash your point >.<

[J35st3r]

Lol sorry didnt mean to squash your point >.<

No problem (I don't really understand all this stuff, but its interesting). Nice to hear your input, and good luck with the project.

[ranlo]

Reading through this... it's confusing me.

Is the selling point of this the BTC hashing or Scrypt hashing?

There's a few tangents here about Scrypt, but that's not what this is actually being sold for, right? If it is, and it works, then I think the price is more justified. If not, I stand by my previous statement that you might as well get USB ASIC's now, have them in 2-3 days, and get 30% more hash rate for the same money.

[tony_357]

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
 running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec.  This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex?  It is possible that the restricted fmax has to do an M10K.  According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec.  (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link    --- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec)  as a result.  ---  (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

[tony_357]

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
 running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec.  This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex?  It is possible that the restricted fmax has to do an M10K.  According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec.  (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link    --- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec)  as a result.  ---  (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V.  We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts.  Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA.  We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

[J35st3r]

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

Oh what sweet tongue'd self praise. You chose to compare your product against the most expensive ASIC product on the general market (relative to ROI), and you come out better. Give it up. 28nm FPGA's will never compete with realistically priced ASICs (and they will come to market, sooner or later, there is just so much profit being made by the manufacturers right now that real competition is bound to kick in, and soon).

[vm1990]

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
 running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec.  This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex?  It is possible that the restricted fmax has to do an M10K.  According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec.  (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link    --- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec)  as a result.  ---  (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V.  We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts.  Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA.  We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

pretty impressive people always bash new toys but im pretty interested in this and im sure alot of people will go crawling under the rocks again if you can get similar results on scrypt mining

the post has been book marked and will be watched closely

[LazyOtto]

that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

No.

It means they are theoretically more cost effective.

Have you built and tested / verified on a prototype unit yet?

-- edit

So far you have only talked about Quartus results.

No hard realities.

Shall we talk about BFL?

[bclcjunkie]

Tony it's good to see you're putting effort but i'm afraid you'll be wasting most of it by the time your product is ready... i know it feels like you're almost there but then you get pulled back... you're aware that there's a trainload of avalon diy miners coming onto market sometime in aug and sept right that will send difficulty to insane levels...soon 5gh/s klondike 16 boards will become a norm instead of FPGAs... IMHO you still have time to turn around and map a better venture... if i were you i'd plan about assembling miners from Avalon and BFL chips since you're already making contacts with those chip assembly companies...
 

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
 running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec.  This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex?  It is possible that the restricted fmax has to do an M10K.  According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec.  (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link    --- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec)  as a result.  ---  (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V.  We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts.  Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA.  We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

[dxtwo]

How is it better than http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm
 running it @ 1GH/s or more. And it had potential to mine LTC as well.

Thanks for this link it made me think a bit...

This is a Xilinx device with 325K LC and yet it achieves about 1GHash/sec.  This implies 500 MHz (internal) sustained operation (2 SHA256 cores running @500 MHz == 1 GHash/sec).

I was quoting about 960-1200 MHash/sec based on a restricted fmax of 240 MHz, so why should Cyclone V be significantly slower than Kintex?  It is possible that the restricted fmax has to do an M10K.  According to the electrical specs for Cyclone V from Altera, it appears that we should be able to get to around 480MHz (for the -8 (slow) speed grade).

At 480 MHz operation for 4 SHA256 cores (150K LC each - (two Cyclone V-A9's = 602K LC)), we should be able to get to approximately 1920 GHash/sec.  (At those clock rates, we'll be running fans (we've got some holes pre-drilled in the PCB - just in case) - fortunately our power supply options allow us to get to 12A per FPGA if needed)

... So, I'm going to do a bit of playing around in Quartus, and do a bit of looking at some timing paths, ...

Thanks for the link    --- It made me think, and it might be possible that I could significantly increase the fmax of the Raspberry Coins Coin Miner 1 (CM-1) (possibly to 1920 GHash/sec)  as a result.  ---  (since the Cyclone V Raspberry Coins - CM1 is 28nm technology like the Kintex demo board, but with almost twice the logic cells)

So, I did some playing around with Quartus, and looking at speeds...

We were previously running at a 240 MHz clock rate, on Cyclone V.  We can boost the clock frequency up to about 500MHz on the -8 (slow speed grade) parts.  Since we're running 2 SHA-256 cores per FPGA, that's 1000 MHash/sec/FPGA.  We have two FPGA's on the card, which means that each Coin Miner-1 card is running at 2000 MHash/sec.

From a pricing point, each Coin-Miner-1, FPGA card is going for $900 (there's an additional overhead of $100 for a single raspberry pi which can support up to 4 Coin-Miner-1 FPGA cards, but I'm not including that yet in this calculation), which translates to $0.45/MHash/sec.

With USB-ASIC miners selling on Ebay typically around $300 for 300 MHash/sec, that means these 28 nm FPGA miners http://www.raspberrycoins.com are now more cost effective than that ASIC solution.

I look forward to seeing what you can bring to the table, however you are a bit late and will have to think about pricing more closely. Even overpaying for a BFL Jalapeno 5GH/s @ $2500 right now is still a better deal; and once BFL catches up to sales (which is going fast now), they are only $274 for 5GH/s!

Your only hope is to build a litecoin fpga miner (and I'm in if you do so).

[CanaryInTheMine]

I hope to make a product that will exceed your expectations.

please don't waste your time.  you won't deliver anything cost effective anytime soon.  you have no idea what's coming to the market shortly.  

[gmaxwell]

And what, pray tell, is coming to the market shortly?

[jasinlee]

Inquiring minds want to know.