It has been a little while since I submitted an update on my progress, so here we go.
Area Improvement: <80K LUTs for 80MH/sI recently did another round of area optimization on one of my designs. As I suspected, it now successfully fits on a Cyclone3 C80 device. This is the 80MH/s design, so it achieves the theoretical 1MH/s = 1K LUT numbers that I had on the back of my napkin.
The next step is to synthesize for a Cyclone4 C75 device, which might be a very tight fit. The Cyclone 4s are a bit cheaper and use slightly less power. Also, if it does fit into 75K LUTs, then it is likely that
two of the same design will fit into a C150. That would achieve a total of
160MHash/s.
New Parts Coming InI have a Xilinx Spartan-6 LX150T-3 development board coming in soon. My goal here is to achieve 160MHash/s on this single chip. Estimates predict that it will be possible, but may be very difficult. We shall see.
Goals: Achieve 160MHash/s on a Spartan-6 LX150-3, which is a sub-$200 chip. That's $1.25USD per MH/s. The average cost of a complete GPU mining rig is $1 USD per MH/s. This goal would bring me very close to achieving GPU parity, and it most certainly will continue to exceed GPUs in power and temperature performance.
I also ordered an Ethernet module and hope to use it to make the FPGA miner completely independent. Plug and profit!
Power Consumption MeasuredI now have a Kill-a-Watt, which measures the amount of electricity drawn "at the wall" by any device. Using this, I measured the "at the wall" power consumption of my Cyclone-4 50MHash/s design. It was
8Watts. Quite impressive, considering that this is for the entire development kit and power inefficiency of the power supplies.
Also, the Cyclone-4 required no cooling. No fan, no heat sink. It chugged along happily.
Unlike my noisy mining rigs...