Can anyone tell me what chip is used in BFL single?

[abeaulieu]

The Single has a JTAG connector, but BFL have said on this forum that using JTAG won't help in any way in finding out which chip it is.
Which leads me to suspect that it is a programmable custom ASIC, originally intended for supercomputing / cryptography.
Something like a custom FPGA or a large array of microcontrollers.

I highly doubt that it is an ASIC. If you look at their website you'll see that they removed an mention of designing with ASIC's. Several months ago this was written right on their homepage. The relatively high power consumption also suggests that it's not an ASIC.

[1713552413]

1713552413

[1713552413]

1713552413

[1713552413]

1713552413

[1713552413]

1713552413

[bulanula]

The Single has a JTAG connector, but BFL have said on this forum that using JTAG won't help in any way in finding out which chip it is.
Which leads me to suspect that it is a programmable custom ASIC, originally intended for supercomputing / cryptography.
Something like a custom FPGA or a large array of microcontrollers.

LOL at the people still thinking it is an ASIC.

ASIC in the bitcoin world is long way away folks.

Largecoin or BFL is NOT ASIC just custom HardCopy solution maybe.

Nobody is stupid enough to invest $1 million into mining equipment like ASIC would require. Maybe the GOV

Let us be realistic now ...

[BR0KK]

Why hasn't someone done these x-Ray images like one big website (the do it to chips like the 7970, before that they sanded the top of. Don't remember who it was ) does it?

Ther has to be some kind of labeling underneath the metal shield hidden in the Silicium?

found it: http://www.chipworks.com/en/technical-competitive-analysis/resources/recent-teardowns/2012/02/inside-the-asus-amd-7970-graphics-card-tsmc-28-nm/
When i trust my eyes i can see some Names beneath the AMD Logo (CHIP Corner). I think every proud Dev puts an ester egg in his baby

Why not funding a BFL and ask Chipwork to do the job

[antirack]

After a little bit of reading, I found that protecting the JTAG port of an Altera FPGA seems to be a standard feature.

Anyway, since I had the chance to lay my hands on some BFL singles, here is the result of some JTAG probing.

JTAG1

Code:

jtag> detect
IR length: 5
Chain length: 1
Device Id: 10110001111011100011000000111111 (0x00000000B1EE303F)
  Manufacturer: Atmel
  Unknown part!
chain.c(149) Part 0 without active instruction
chain.c(200) Part 0 without active instruction
chain.c(149) Part 0 without active instruction
jtag> idcode
Reading 0 bytes if idcode
Read 00111111 00110000 11101110 10110001 00000000 00000000 00000000 00000000

jtag> idcode
Reading 0 bytes if idcode
Read 00111111 00110000 11101110 10110001 00000000 00000000 00000000 00000000

JTAG2

Code:

jtag> detect
Warning: TDO seems to be stuck at 1

jtag> idcode
Reading 0 bytes if idcode
Read 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111111
1 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111111
11 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111
111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1111
1111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 111
11111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11
111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 1
1111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
11111111 11111111 11111111 11111111 11111111

[mem]

now its getting interesting - subscribing.

[Garr255]

Indeed it is. I'll be following this.

[tgmarks]

I'm in also.

[abeaulieu]

How do you know you're probing the TDO pin?

[ElectricMucus]

After a little bit of reading, I found that protecting the JTAG port of an Altera FPGA seems to be a standard feature.

You wouldn't happen to be trolling?
maybe?  

Anyway the only chip which would be offered by atmel which would have the capabilities are their cell asics, which shouldn't even have a jtag port in the first place.

[antirack]

After a little bit of reading, I found that protecting the JTAG port of an Altera FPGA seems to be a standard feature.

You wouldn't happen to be trolling?
maybe?  

Anyway the only chip which would be offered by atmel which would have the capabilities are their cell asics, which shouldn't even have a jtag port in the first place.

Altera:

JTAG Threats
Another type of threat makes use of the JTAG port. Although the port is meant for board connectivity and basic
system-functionality testing, the flexibility of JTAG can be misused to determine the configuration of the FPGA.
Because in most FPGAs, JTAG is always enabled, uses dedicated pins, and overrides any other configuration
mechanism, it can be used to exercise the design systematically to reverse engineer the functionality, thereby stealing
the design. However, like timing analysis on an FPGA, this is an extremely laborious, time consuming, and rote
process, though it requires no specialized equipment.

JTAG-Port Protection Solution
Recognizing the susceptibility of JTAG, Cyclone III LS FPGAs take extra precautions by restricting access to the
JTAG port. Traditionally, the JTAG port always was enabled on FPGAs, and any instructions received on the JTAG
I/O pins would execute immediately. In Cyclone III LS FPGAs, the native state of JTAG is restricted to only those
instructions required for compliance to the IEEE specification. The JTAG port can be reset to accept the full
instruction set. However, resetting the JTAG port causes the Cyclone III LS FPGA automatically to erase all
configuration within itself (including the volatile AES key, if used), before allowing full access on the JTAG pins.
Therefore, a user cannot use the JTAG port to test or modify the design in any way.

If it's a standard feature of the Cyclone III LS FPGAs, I assume it's available on other Altera devices too (but what do I know?).

And no, I am not trolling.

But as I have already pointed out earlier, they may have just switched the pins around on JTAG2. Who knows. If it would be me trying to protect my design, I'd do that too.

[rjk]

Don't forget to email eldentyrell and ask for your 5 BTC.

[ElectricMucus]

It's ATMEL not altera, read it dammit'. I said nothing about FPGAs, so maybe Atmel cell asics have some diagnostics jtag port.
That's the only explanation. That or the whole thing is made up on the spot, upto the point of someone actually receiving a BFL single. (Yeah I am siding with mem here.)

[antirack]

The Atmel chip on the board is not a secret. It's the big chips that most of us were wondering.

[ElectricMucus]

So you posted the response of the microcontroller first? Who wanna know that, it even has a intact silkscreen.

If the second quote is from the "big chip" this means absolutely nothing, you could have connected it to a power pin and would have gotten the same response. I still think you are trolling.

[mem]

That or the whole thing is made up on the spot, upto the point of someone actually receiving a BFL single. (Yeah I am siding with mem here.)

Better put your flame suite on mate, questioning the almighty BFL will get you burned as a witch in these parts

[antirack]

And back on topic.

I noticed something strange with the JTAG header in this photo from BFL (original here):
http://image.bayimg.com/oaoolaade.jpg

Look at the left JTAG header (JTAG2). Is it just me or did they trim some of the pins?

It would seem that pins 3, 5, 7 and 9 are longer. Could that be it?

Also note how the LCD port has a header in this PCB. I know it's a bit far fetched, but does 5 pins for an LCD seem usual?

It's a bit blurry but it looks like a Rev C. The ones I have are Rev E.

[ElectricMucus]

That or the whole thing is made up on the spot, upto the point of someone actually receiving a BFL single. (Yeah I am siding with mem here.)

Better put your flame suite on mate, questioning the almighty BFL will get you burned as a witch in these parts

Can handle it I was labeled as a troll numerous times, someone even bothered to put me on a "list" as a public pillory of people to avoid.
Pretty hilarious.

And back on topic.

I noticed something strange with the JTAG header in this photo from BFL (original here):
http://image.bayimg.com/oaoolaade.jpg

Look at the left JTAG header (JTAG2). Is it just me or did they trim some of the pins?

Do you have a BFL or not? Are your pins trimmed?
That wouldn't stop anyone equipped with a soldering iron (about anybody who would even know what jtag is)

Which brings me to the next issue: How do you know it's a jtag port in the first place?

[antirack]

Come on. Of course I have a single otherwise how could I connect a JTAG cable? JTAG1 and JTAG2 is written right next to them. And if it wouldn't be a JTAG header I guess the Atmel MCU wouldn't be talking to it. And no, my pins are not trimmed, on any of my 10 units (you can directly look at the JTAG headers through the "grill")

If you have nothing to add to this thread, could you please move on?

[ElectricMucus]

Well then did you check if too short pins were an issue in your case? Did you check the right orientation? Did you use a logic analyzer to get more information?
But if you are capable (which we assume) that shouldn't even be part of the discussion. So you are right we should move on.

Still you didn't answer my question: Are your pins trimmed?

[antirack]

Pins not trimmed, orientation correct. And I'll leave the logic analyzer part to the pros such as yourself.