hexafraction
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August 02, 2015, 07:01:26 PM |
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The "RAM" will be persistent and the DRAM will be another cache layer above the persistent storage. To realize the full potential of the tech, the CPUs and OSes will need to be changed.
What's wrong with preserving the current CPU design, with onboard SRAM cache above DRAM, and DRAM above this "persistent RAM" made accessible by a high-speed interface such as wide PCIe, where the OS itself uses its paging/memory management mechanisms to move data to and from DRAM?
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Guy Corem
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August 02, 2015, 07:13:41 PM |
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The "RAM" will be persistent and the DRAM will be another cache layer above the persistent storage. To realize the full potential of the tech, the CPUs and OSes will need to be changed.
What's wrong with preserving the current CPU design, with onboard SRAM cache above DRAM, and DRAM above this "persistent RAM" made accessible by a high-speed interface such as wide PCIe, where the OS itself uses its paging/memory management mechanisms to move data to and from DRAM? I need to be careful here. Public info: https://www.google.com/patents/WO2012087471A2?cl=en
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AJRGale
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August 03, 2015, 06:40:40 AM |
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If anyone is interested in this "technology", this is a little spiel on his thoughts about it. http://thememoryguy.com/micronintel-3d-xpoint-raises-more-questions-than-answers/on the other hand Intel and Micron unveil 3D Xpoint™ technology and create the first new memory category in more than 25 years. [Citation needed]Over the last 25 years there has been many memory types been developed (eg:CBRAM, SONOS, RRAM, Racetrack memory, NRAM, Millipede memory and FJG) by not only intel, but basically all major memory companies, eg, Hynix, Sandisk, Corsair, etc.. now I thought this might of been a processor development (some quantum quadrant bit process) that may have just thrown Any calculation process to the dirt, Thank goodness I was wrong! i think the only thing that could throw the asic's for a 6 would be quantum processing.
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VirosaGITS
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August 03, 2015, 02:54:15 PM |
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If anyone is interested in this "technology", this is a little spiel on his thoughts about it. http://thememoryguy.com/micronintel-3d-xpoint-raises-more-questions-than-answers/on the other hand Intel and Micron unveil 3D Xpoint™ technology and create the first new memory category in more than 25 years. [Citation needed]Over the last 25 years there has been many memory types been developed (eg:CBRAM, SONOS, RRAM, Racetrack memory, NRAM, Millipede memory and FJG) by not only intel, but basically all major memory companies, eg, Hynix, Sandisk, Corsair, etc.. now I thought this might of been a processor development (some quantum quadrant bit process) that may have just thrown Any calculation process to the dirt, Thank goodness I was wrong! i think the only thing that could throw the asic's for a 6 would be quantum processing. I'm not sure who did it first, i first heard similar technology coming from AMD. A quick search found some articles such as; http://wccftech.com/amd-working-hynix-development-highbandwidth-3d-stacked-memory/And for quantum computing, i suppose if we had a true quantum processor able to emulate conventional computers software (base 8/binary), i believe that could indeed throw a wrench in current encryption of all kind. But such computers would be qualified strictly as military grade for the long foreseeable future, hopefully it would be done gradually as a sudden jump in technology always cause much chaos.
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Lauda
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August 03, 2015, 03:16:54 PM |
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I'm not sure who did it first, i first heard similar technology coming from AMD. A quick search found some articles such as; http://wccftech.com/amd-working-hynix-development-highbandwidth-3d-stacked-memory/And for quantum computing, i suppose if we had a true quantum processor able to emulate conventional computers software (base 8/binary), i believe that could indeed throw a wrench in current encryption of all kind. But such computers would be qualified strictly as military grade for the long foreseeable future, hopefully it would be done gradually as a sudden jump in technology always cause much chaos. HBM isn't comparable to 3D Xpoint because it is just not as fundamentally different to what we have today. However, it is much better than GDDR5. To simplify: "High Bandwidth Memory (HBM) is a high-performance RAM interface for 3D-stacked DRAM memory from AMD and Hynix. "HBM gen. 1 has already been released in commercial products (AMD Fury), and HBM gen. 2 is coming very soon. ![](https://ip.bitcointalk.org/?u=https%3A%2F%2Fi.imgur.com%2FQpnsAaP.png&t=665&c=Pn0cJjH53fDwJg) The image clearly shows the benefits for GPUs. We are also supposed to see generation 2 products in 2016.
Update: Some corrections.
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VirosaGITS
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August 03, 2015, 03:33:33 PM |
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I'm not sure who did it first, i first heard similar technology coming from AMD. A quick search found some articles such as; http://wccftech.com/amd-working-hynix-development-highbandwidth-3d-stacked-memory/And for quantum computing, i suppose if we had a true quantum processor able to emulate conventional computers software (base 8/binary), i believe that could indeed throw a wrench in current encryption of all kind. But such computers would be qualified strictly as military grade for the long foreseeable future, hopefully it would be done gradually as a sudden jump in technology always cause much chaos. HBM isn't comparable to 3D Xpoint because it is just not as fundamentally different to what we have today. However, it is much better than GDDR5. To simplify: "High Bandwidth Memory (HBM) is a high-performance RAM interface for 3D-stacked DRAM memory from AMD and Hynix. "HBM gen. 1 has already been released in commercial products (AMD Fury), and HBM gen. 2 is coming very soon. ![](https://ip.bitcointalk.org/?u=https%3A%2F%2Fi.imgur.com%2FQpnsAaP.png&t=665&c=Pn0cJjH53fDwJg) As the image clearly shows the benefits for GPUs are there and we are supposed to see generation 2 products in 2016.
Update: Some corrections. I see, i'm not sure how "fundamentally different" it is, it actually sound like it is just an evolutionary technology over AMD's HBM, for memory. 3D Xpoint is a still-in-development-phase technology true, but also happen to be coming right after AMD's HBM. It seem to me its Intel's project to keep in the race. The main article itself( link) mention the technology is also basically stacking chips on top of one another. Though i suppose i'll need to wait for a proper comparison of the completed systems to further comment. I just very much doubt it will stop at Ram for AMD and non volatile storage for Intel.
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baristor
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August 05, 2015, 11:21:59 PM |
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It wont unless intel sees a good market potential in bitcoin although one might say it might, as Asrock already advertise some of their boards working okok with bitcoins
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hexafraction
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August 05, 2015, 11:25:18 PM |
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It wont unless intel sees a good market potential in bitcoin although one might say it might, as Asrock already advertise some of their boards working okok with bitcoins
No, it won't work AT ALL for Bitcoin. It's NOT a mining technology, but rather a storage technology. It could possibly make sense for storing and reading the DAG for Ethereum, however.
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VirosaGITS
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August 06, 2015, 12:31:14 AM |
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It wont unless intel sees a good market potential in bitcoin although one might say it might, as Asrock already advertise some of their boards working okok with bitcoins
No, it won't work AT ALL for Bitcoin. It's NOT a mining technology, but rather a storage technology. It could possibly make sense for storing and reading the DAG for Ethereum, however. Hehh, the high bandwidth high cost version of storage isint going to be useful or efficient. The mining, blockchain and also Eth technology really isint built around the need for Ram-like bandwidth performance. The need for memory is very small and the need for storage vary, but the storage devices again don't make use of ram-like or better performance.
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hexafraction
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August 06, 2015, 12:33:16 AM |
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It wont unless intel sees a good market potential in bitcoin although one might say it might, as Asrock already advertise some of their boards working okok with bitcoins
No, it won't work AT ALL for Bitcoin. It's NOT a mining technology, but rather a storage technology. It could possibly make sense for storing and reading the DAG for Ethereum, however. Hehh, the high bandwidth high cost version of storage isint going to be useful or efficient. The mining, blockchain and also Eth technology really isint built around the need for Ram-like bandwidth performance. The need for memory is very small and the need for storage vary, but the storage devices again don't make use of ram-like or better performance. My bad; I'm not 100% familiar with the exact balance of storage vs fast memory vs large memory requirements of Eth yet. As long as DAG fits into normal DRAM, XPoint doesn't really have a useful effect.
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VirosaGITS
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August 06, 2015, 12:45:12 AM |
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It wont unless intel sees a good market potential in bitcoin although one might say it might, as Asrock already advertise some of their boards working okok with bitcoins
No, it won't work AT ALL for Bitcoin. It's NOT a mining technology, but rather a storage technology. It could possibly make sense for storing and reading the DAG for Ethereum, however. Hehh, the high bandwidth high cost version of storage isint going to be useful or efficient. The mining, blockchain and also Eth technology really isint built around the need for Ram-like bandwidth performance. The need for memory is very small and the need for storage vary, but the storage devices again don't make use of ram-like or better performance. My bad; I'm not 100% familiar with the exact balance of storage vs fast memory vs large memory requirements of Eth yet. As long as DAG fits into normal DRAM, XPoint doesn't really have a useful effect. Indeed. There is not much in term of specs released for Xpoint, so its hard to say and their technology is interesting for non volatile storage, for faster SSDs. But usually with high speed come a storage reduction and high prices. So in term of cost effectiveness, this won't be it, i suspect. But if you look at AMD's 3D stacked ram, you quickly see there's not much interest there in the world of crypto, currently. For gaming i would love that stuff and its very interesting for stuff like Graphic cards but now its just moving the bottleneck to something else. Like CPU response time. Which Mantle API looked to fix. Anyways, veering off topic.
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johnyj
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August 13, 2015, 07:20:19 PM |
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I think the more important is the production process in semi-conductor industry, it is going to be vast different in the coming years
KNC have claimed that they adopted 16nm Finfet 3d and achieved one magnitude of efficiency. So we can expect similar 3D process will all raise the efficiency dramatically in the coming years, but then it will be highly centralized in 1-2 semi-conductor factory
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Dexter770221
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August 14, 2015, 05:15:10 PM |
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LUT's in FPGA's are basically small RAM blocks. That's why you can program any logical function into it. So, this technology isn't designed to build SHA ASICS but it should be possible to build one. But I doubt it could have any advantage over regular ASIC.
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Under development Modular UPGRADEABLE Miner (MUM). Looking for investors. Changing one PCB with screwdriver and you have brand new miner in hand... Plug&Play, scalable from one module to thousands.
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hexafraction
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August 14, 2015, 05:28:02 PM |
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LUT's in FPGA's are basically small RAM blocks. That's why you can program any logical function into it. So, this technology isn't designed to build SHA ASICS but it should be possible to build one. But I doubt it could have any advantage over regular ASIC.
First, I'm not sure that XPoint works for SRAMs to begin with. Not sure about block RAM elements. There's not really that much of a benefit to LUTs since they're quite small. A LUT4 (as on older architectures such as spartan3e) contains 16 bits in a LUT, meaning 128 bits per CLB. Even newer architectures have around 64 bits in a LUT6, such as Xilinx 7 series. Making LUTs denser won't help since there are tons of other components such as dedicated gates, single registers, carry chain multiplexers, and so on. There are some optimizations in which a synchronously used function is implemented in a block RAM. It's more important to make faster routing and CLBs, as well as more CLBs.
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