ASIC shipping dates

[abeaulieu]

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

[MrTeal]

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

No, back in the day you would see PCBs were actually hand drawn.

[abeaulieu]

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

No, back in the day you would see PCBs were actually hand drawn.

I understand that, but that's not what they're talking about. (Even intel did the hand-drawing of their processors on giant blown up transparent film top seperate layers in the early days.)

[MrTeal]

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

http://makerbot-blog.s3.amazonaws.com/wp-content/uploads/2010/12/napkin-sketch.jpg

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

No, back in the day you would see PCBs were actually hand drawn.

I understand that, but that's not what they're talking about. (Even intel did the hand-drawing of their processors on giant blown up transparent film top seperate layers in the early days.)

Yeah, it is.

"Tape out" is the term for sending the design to the fab.  (Name has stuck from back in the days when a computer tape was sent by FedEx.

I always thought the name came from the fact that in the earliest integrated circuits the masks were produced by hand using an opaque sticky tape on a transparent film.  A process known as tape-out, which you obviously didn't start until you'd completed the design.

Tape-out refers to the final step in production immediately before the photomasks are made.

Your design can be at the foundry, but until they're ready to make the masks, it's not said to be at tape-out stage.

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

I'm guessing what they meant was that the place and route phase of the design was done manually instead of using automated tools. From a design perspective this implies higher performance but with additional risk of errors.

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.

The discussion was about where the term tape-out came from, it has nothing to do with autorouters.

[Morblias]

Updated Avalon:

https://bitcointalk.org/index.php?topic=120184.msg1397668#msg1397668

Let's be frank. We ran into a potential delay of 4-7 days.

I must say it will be difficulty for us to ship on Jan 14th, we however expect to ship around Jan 18 ~ 20.

[420]

Place your bets folks:

http://betsofbitco.in/item?id=1003
[No one will deliver an ASIC before February 1 2013]

[abeaulieu]

The discussion was about where the term tape-out came from, it has nothing to do with autorouters.

We weren't discussing tape-out...

Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?

BFL mentioned that a lot of their stuff had to be hand-routed because it was very dense, so we were discussing what that actually meant.

When pressed for a reason why, I have been told that because this is a very dense, hand routed design they are afraid of making a mistake and have required extra checking and sign offs which has slowed down the whole process considerably. They don't want to be on the hook financially for having to redo the whole order.

Am I misreading this, or does this sound like they won't be at tape-out until 30 days from now?  (What careful checking of hand routed design will you be doing once the masks are being printed?).

[bitboyben]

Well it is all very interesting none the less. Even if it is a bit off topic, sorry.

@ 420 what about that other company that is producing only for their own use not for resale do they count in that gamble?

[ewhenn]

Meanwhile in GPU land.....

 

[The-Real-Link]

Thanks for the no-nonsense and open thread regarding dates.  The race is on!

[420]

Well it is all very interesting none the less. Even if it is a bit off topic, sorry.

@ 420 what about that other company that is producing only for their own use not for resale do they count in that gamble?

if you read it you'd know, NOPE

what company is that?

[coinnewb]

Place your bets folks:

http://betsofbitco.in/item?id=1003
[No one will deliver an ASIC before February 1 2013]

How about betting on who will ship first?

http://betsofbitco.in/item?id=1016
[Butterfly Labs will start shipping ASIC miners before Avalon]

[bcpokey]

I wish a statistician would rack his brains to figure out the probability, given all the different design elements, various world locations, outsourcing, and what haveyou, that all 3 major ASIC manufacturers would end up releasing their product, roughly at the same time (currently all set for Middle January). Smacks of oddity.

[420]

Place your bets folks:

http://betsofbitco.in/item?id=1003
[No one will deliver an ASIC before February 1 2013]

How about betting on who will ship first?

http://betsofbitco.in/item?id=1016
[Butterfly Labs will start shipping ASIC miners before Avalon]

They don't allow multiple choice bets that I know

[420]

I wish a statistician would rack his brains to figure out the probability, given all the different design elements, various world locations, outsourcing, and what haveyou, that all 3 major ASIC manufacturers would end up releasing their product, roughly at the same time (currently all set for Middle January). Smacks of oddity.

Collusion...

maybe its for the all good

they don't want to have one company get a lot of cancels or two if one delivers first.

and they'll have the best competition trying to release similar performing products at the start (unless they purposefully underperform, which might be good for bitcoin actually)

just speculation /\

[Frizz23]

I think you can now savely update BFLs shipping date to: never

https://forums.butterflylabs.com/content/127-bfl-asic-delays-depth-expanation.html?postid=8237#comments_8237
BFL ASIC Delays - An In-Depth Explanation

Anticipation is running high at Butterfly Labs in advance of receipt of our chips from the foundry. The production of these very dense, hand-routed chips are the reason for the delay in the latest line of bitcoin mining machines. Unlike our competitors, Butterfly Labs ASIC chips are 100% custom. Producing custom chips requires foundry scheduling and forces us into the queue with other chip developers (from all industries). The design is complete. It’s just a matter of waiting for production and delivery. The boards, enclosures, and assembly teams are standing by, anxiously awaiting delivery of the chips so we can begin assembly and start shipping.
...

"The design is complete". That's where they are at the moment. The design might be borked. It might need a resign. It might never work. Who knows. They don't have a working prototype.

They said they ship in October. Now it's December and they say "design is complete".

[bitcoindaddy]

I think you can now savely update BFLs shipping date to: never

https://forums.butterflylabs.com/content/127-bfl-asic-delays-depth-expanation.html?postid=8237#comments_8237
BFL ASIC Delays - An In-Depth Explanation

Anticipation is running high at Butterfly Labs in advance of receipt of our chips from the foundry. The production of these very dense, hand-routed chips are the reason for the delay in the latest line of bitcoin mining machines. Unlike our competitors, Butterfly Labs ASIC chips are 100% custom. Producing custom chips requires foundry scheduling and forces us into the queue with other chip developers (from all industries). The design is complete. It’s just a matter of waiting for production and delivery. The boards, enclosures, and assembly teams are standing by, anxiously awaiting delivery of the chips so we can begin assembly and start shipping.
...

"The design is complete". That's where they are at the moment. The design might be borked. It might need a resign. It might never work. Who knows. They don't have a working prototype.

They said they ship in October. Now it's December and they say "design is complete".

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[mmortal03]

The bASIC product pages are now saying February: https://www.bitcoinasic.net/index.php?route=product/product&product_id=50

[creativex]

The bASIC product pages are now saying February: https://www.bitcoinasic.net/index.php?route=product/product&product_id=50

"2nd batch bASIC Mining boards are projected to ship in February of 2013."

It's always said that for 2nd batch boards. First batch boards were not sold on bitcoinasic.net btw, they were sold on the old site, BTCFPGA.com.

[ripper234]

Is the op kept with up-to-date information?
Are there only three ASICs due soon? I was under the impression there were a few more initiatives.