abeaulieu
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December 12, 2012, 04:59:55 PM |
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They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex.
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MrTeal
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December 12, 2012, 05:32:06 PM |
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They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex. No, back in the day you would see PCBs were actually hand drawn.
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abeaulieu
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December 12, 2012, 06:35:03 PM |
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They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex. No, back in the day you would see PCBs were actually hand drawn. I understand that, but that's not what they're talking about. (Even intel did the hand-drawing of their processors on giant blown up transparent film top seperate layers in the early days.)
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MrTeal
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December 12, 2012, 06:49:53 PM |
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They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex. No, back in the day you would see PCBs were actually hand drawn. I understand that, but that's not what they're talking about. (Even intel did the hand-drawing of their processors on giant blown up transparent film top seperate layers in the early days.) Yeah, it is. "Tape out" is the term for sending the design to the fab. (Name has stuck from back in the days when a computer tape was sent by FedEx.
I always thought the name came from the fact that in the earliest integrated circuits the masks were produced by hand using an opaque sticky tape on a transparent film. A process known as tape-out, which you obviously didn't start until you'd completed the design. Tape-out refers to the final step in production immediately before the photomasks are made. Your design can be at the foundry, but until they're ready to make the masks, it's not said to be at tape-out stage. Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?
I'm guessing what they meant was that the place and route phase of the design was done manually instead of using automated tools. From a design perspective this implies higher performance but with additional risk of errors. Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?
They're not using an autorouting tool to route the signal paths. In terms of PCB design, this is how things are done normally because even modern autorouters are simply not good enough at knowing about signal paths, power usage, parasitic capacitance, etc. The process of doing this in an ASIC should be quite similar, just on a smaller level and more complex. The discussion was about where the term tape-out came from, it has nothing to do with autorouters.
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420
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December 13, 2012, 08:49:35 PM |
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Place your bets folks: http://betsofbitco.in/item?id=1003[No one will deliver an ASIC before February 1 2013]
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Donations: 1JVhKjUKSjBd7fPXQJsBs5P3Yphk38AqPr - TIPS the hacks, the hacks, secure your bits!
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abeaulieu
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December 13, 2012, 10:56:23 PM |
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The discussion was about where the term tape-out came from, it has nothing to do with autorouters.
We weren't discussing tape-out... Would some one like to enlighten me to what they mean by the design was hand drawn? Is that even possible now days?
BFL mentioned that a lot of their stuff had to be hand-routed because it was very dense, so we were discussing what that actually meant. When pressed for a reason why, I have been told that because this is a very dense, hand routed design they are afraid of making a mistake and have required extra checking and sign offs which has slowed down the whole process considerably. They don't want to be on the hook financially for having to redo the whole order. Am I misreading this, or does this sound like they won't be at tape-out until 30 days from now? (What careful checking of hand routed design will you be doing once the masks are being printed?).
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bitboyben
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December 14, 2012, 02:19:49 AM |
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Well it is all very interesting none the less. Even if it is a bit off topic, sorry.
@ 420 what about that other company that is producing only for their own use not for resale do they count in that gamble?
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Why did I sell at $5! Come back to me my old bitcoin! 1GjeBGS4KrxKAeEVt8d1fTnuKgpKpMmL6S If you don't like the price of BTC come back in 8 hours.
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ewhenn
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December 14, 2012, 04:03:52 AM |
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Meanwhile in GPU land..... ![Cool](https://bitcointalk.org/Smileys/default/cool.gif)
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The-Real-Link
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December 14, 2012, 05:02:31 AM |
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Thanks for the no-nonsense and open thread regarding dates. The race is on!
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Oh Loaded, who art up in Mt. Gox, hallowed be thy name! Thy dollars rain, thy will be done, on BTCUSD. Give us this day our daily 10% 30%, and forgive the bears, as we have bought their bitcoins. And lead us into quadruple digits
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420
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December 14, 2012, 08:15:27 AM |
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Well it is all very interesting none the less. Even if it is a bit off topic, sorry.
@ 420 what about that other company that is producing only for their own use not for resale do they count in that gamble?
if you read it you'd know, NOPE what company is that?
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Donations: 1JVhKjUKSjBd7fPXQJsBs5P3Yphk38AqPr - TIPS the hacks, the hacks, secure your bits!
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bcpokey
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December 14, 2012, 11:54:22 AM |
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I wish a statistician would rack his brains to figure out the probability, given all the different design elements, various world locations, outsourcing, and what haveyou, that all 3 major ASIC manufacturers would end up releasing their product, roughly at the same time (currently all set for Middle January). Smacks of oddity.
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420
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December 14, 2012, 02:21:07 PM |
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They don't allow multiple choice bets that I know
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Donations: 1JVhKjUKSjBd7fPXQJsBs5P3Yphk38AqPr - TIPS the hacks, the hacks, secure your bits!
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420
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December 14, 2012, 02:23:27 PM |
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I wish a statistician would rack his brains to figure out the probability, given all the different design elements, various world locations, outsourcing, and what haveyou, that all 3 major ASIC manufacturers would end up releasing their product, roughly at the same time (currently all set for Middle January). Smacks of oddity.
Collusion... maybe its for the all good they don't want to have one company get a lot of cancels or two if one delivers first. and they'll have the best competition trying to release similar performing products at the start (unless they purposefully underperform, which might be good for bitcoin actually) just speculation /\
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Donations: 1JVhKjUKSjBd7fPXQJsBs5P3Yphk38AqPr - TIPS the hacks, the hacks, secure your bits!
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Frizz23
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December 14, 2012, 09:44:17 PM |
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I think you can now savely update BFLs shipping date to: neverhttps://forums.butterflylabs.com/content/127-bfl-asic-delays-depth-expanation.html?postid=8237#comments_8237BFL ASIC Delays - An In-Depth Explanation Anticipation is running high at Butterfly Labs in advance of receipt of our chips from the foundry. The production of these very dense, hand-routed chips are the reason for the delay in the latest line of bitcoin mining machines. Unlike our competitors, Butterfly Labs ASIC chips are 100% custom. Producing custom chips requires foundry scheduling and forces us into the queue with other chip developers (from all industries). The design is complete. It’s just a matter of waiting for production and delivery. The boards, enclosures, and assembly teams are standing by, anxiously awaiting delivery of the chips so we can begin assembly and start shipping. ... "The design is complete". That's where they are at the moment. The design might be borked. It might need a resign. It might never work. Who knows. They don't have a working prototype. They said they ship in October. Now it's December and they say "design is complete".
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Ξtherization⚡️First P2E 2016⚡️🏰💎🌈 etherization.org
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bitcoindaddy
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December 14, 2012, 09:51:35 PM |
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I think you can now savely update BFLs shipping date to: neverhttps://forums.butterflylabs.com/content/127-bfl-asic-delays-depth-expanation.html?postid=8237#comments_8237BFL ASIC Delays - An In-Depth Explanation Anticipation is running high at Butterfly Labs in advance of receipt of our chips from the foundry. The production of these very dense, hand-routed chips are the reason for the delay in the latest line of bitcoin mining machines. Unlike our competitors, Butterfly Labs ASIC chips are 100% custom. Producing custom chips requires foundry scheduling and forces us into the queue with other chip developers (from all industries). The design is complete. It’s just a matter of waiting for production and delivery. The boards, enclosures, and assembly teams are standing by, anxiously awaiting delivery of the chips so we can begin assembly and start shipping. ... "The design is complete". That's where they are at the moment. The design might be borked. It might need a resign. It might never work. Who knows. They don't have a working prototype. They said they ship in October. Now it's December and they say "design is complete". USE THE OFFICIAL BFL THREAD FOR ALL BFL TOPICSPlease limit your mention of BFL to the BFL threads only. Please limit yourself to single syllable words ,or if possible single letter words like "I", "U"=you, "Y"=Why, etc. This message brought to you by the Directorate of Forum Order, Office of thread obfuscation.
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mmortal03
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December 30, 2012, 11:40:55 AM |
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creativex
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December 30, 2012, 11:45:10 AM |
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" 2nd batch bASIC Mining boards are projected to ship in February of 2013." It's always said that for 2nd batch boards. First batch boards were not sold on bitcoinasic.net btw, they were sold on the old site, BTCFPGA.com.
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ripper234
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Ron Gross
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January 04, 2013, 07:32:35 AM |
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Is the op kept with up-to-date information? Are there only three ASICs due soon? I was under the impression there were a few more initiatives.
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