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Author Topic: [RELEASE] Avalon Reference  (Read 17402 times)
rassalas
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May 26, 2013, 03:53:09 PM
 #81

/topic as promised.

https://github.com/BitSyncom/avalon-ref

will be updated continuously within a next few days.

I have a burning question,  I've sifted through the Github docs, but am having a hard time figuring out what cad software was used to create the pcbdoc and the Schdoc files. 
I'm assuming the BOM files were also generated by the same Cad program.  Anyone know?
Rassalas
Altium Designer. They do have a free viewer for Windows on their web site. No Linux sadly.
  I don't think Altium is what was used.  We can't seem to load the SCHDOC nor the PCBDOC files with Altium designer.
If I'm wrong,  please do elaborate.
Thank you
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rassalas
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May 26, 2013, 04:17:41 PM
 #82

/topic as promised.

https://github.com/BitSyncom/avalon-ref

will be updated continuously within a next few days.

I have a burning question,  I've sifted through the Github docs, but am having a hard time figuring out what cad software was used to create the pcbdoc and the Schdoc files. 
I'm assuming the BOM files were also generated by the same Cad program.  Anyone know?
Rassalas
Altium Designer. They do have a free viewer for Windows on their web site. No Linux sadly.
  I don't think Altium is what was used.  We can't seem to load the SCHDOC nor the PCBDOC files with Altium designer.
If I'm wrong,  please do elaborate.
Thank you


I stand corrected.  We got them loaded.  looking nice.
ScaryHash
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May 27, 2013, 02:58:03 AM
 #83

What did you use? I tried KiCad, but it did not work... Huh
intron
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May 27, 2013, 01:19:42 PM
 #84

Can someone with enough knowledge tell me if a user that has avalon chips, can take this plans and let a company create a miner for him? Is it possible or is more needed?

Can it be done DIY, if you manage to get the parts?

And the software, firmware and so on is it freely available? I guess the miners that run with avalons would run with this miner too, right?

Today/this weekend, I'm going to investigate the building out of units based precisely on the reference design, and see if it'd be worth it to organize a group buy. This is hopefully assuming that Bitsyncom will be providing software. I haven't had a chance to look at the schematics in depth, but I didn't see a microcontroller, but rather an FPGA. Reverse-engineering what's happening inside it would probably prove to be a major pain.

An fpga sound expensive. The other miner developers dont need one. For example the klondike-project (see my signature). So im really wondering if the alternate design will be cheaper than the original one at the end. Interesting this all...

It's just for control and data pre-processing. It's not for hashing.

$24.27/pc in single quantities.
http://www.digikey.com/scripts/dksearch/dksus.dll?vendor=0&keywords=XC6SLX16-2FTG256C&stock=1

Is the verilog/VHDL code for the FPGA also open source? Very
curious how they did the communication with the ASICs.

intron

bits can go here: 1intronttqV6J1PLLeQ3X5i4PxyhpE1fP
ppcko
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May 27, 2013, 02:32:39 PM
 #85


Is the verilog/VHDL code for the FPGA also open source? Very
curious how they did the communication with the ASICs.

intron


Only binary version at this moment. Open source version of VHDL should be released later.
Also, check the git repository. Avalon datasheet is available there. Maybe you'll find what are you looking for in it.

From the readme file (https://github.com/BitSyncom/avalon-ref/blob/master/README.md):
disclaimer:
==========
current version of FPGA bitstream contains licensed parts we can not open source
 at the moment,
a licensed free version is being worked on that will be released in the future.



intron
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May 27, 2013, 02:41:20 PM
 #86


Is the verilog/VHDL code for the FPGA also open source? Very
curious how they did the communication with the ASICs.

intron


Only binary version at this moment. Open source version of VHDL should be released later.
Also, check the git repository. Avalon datasheet is available there. Maybe you'll find what are you looking for in it.

From the readme file (https://github.com/BitSyncom/avalon-ref/blob/master/README.md):
disclaimer:
==========
current version of FPGA bitstream contains licensed parts we can not open source
 at the moment,
a licensed free version is being worked on that will be released in the future.


The datasheet is rather vague on some points. The HDL
would help very much. Or probing a running ASIC on a board...Smiley

intron

bits can go here: 1intronttqV6J1PLLeQ3X5i4PxyhpE1fP
HorseRider
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June 03, 2013, 03:15:46 AM
 #87

anyone got any news on the sample chips??

16SvwJtQET7mkHZFFbJpgPaDA1Pxtmbm5P
daemondazz
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June 05, 2013, 06:15:02 AM
 #88

Sample chips will be big news when they start arriving.

Does anyone know an actual part number for the magnetic beads for each chip? The BOM says 60ohm@100MHz, but doesn't give a current rating.

Computers, Amateur Radio, Electronics, Aviation - 1dazzrAbMqNu6cUwh2dtYckNygG7jKs8S
ProfMac
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June 22, 2013, 06:58:41 PM
 #89

Let the hardware dev shitstorm commence!!!

Downloading altium viewer now  Sad

I just registered for the altium viewer.
Has anyone made a CadSoft EAGLE version of these documents?

I try to be respectful and informed.
RamirezX
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July 01, 2013, 09:14:57 PM
 #90

The datasheet is rather vague on some points. The HDL
would help very much. Or probing a running ASIC on a board...Smiley

intron
Yes .. i read datasheet and I couldn't find, how the report n, p timing is done.
Friend of mine has sample chip, he can send config and sample data into chip, it calculates golden nonce, but output has some strange timing. It look like it's derived of external oscillator frequency, but how?
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