New single ASIC miner board

[aauer1]

And on the issue of multiple chips per device, I'm pretty sure the power consumption would exceed the USB spec even with 2 chips and you would need an alternative power source.

You are absolutely right. USB spec defines 500mA as maximum supply current (means 2.5W). I think most of the USB hubs are able to supply a bit more current. But two Avalon chips would require 4 to 5W and this would mean 800mA to 1A of supply current at 5V. And this is for sure too much for USB (at least if you want to run it stable).
This was another reason for just using one Avalon chip (for the beginning). To keep it simple and stupid (KISS), I don't wanted an external power supply, just USB. And this limits the number of Avalon chips to a single one.

[Sy]

I personally think it's a bit big for just one chip but still nice, good thing that ppl are still working on ideas

USB 3.0 outputs some more watt, enough to run 2 chips?

[aauer1]

I personally think it's a bit big for just one chip but still nice, good thing that ppl are still working on ideas

USB 3.0 outputs some more watt, enough to run 2 chips?

It would be possible to make the board a bit smaller. As you can see on the 3D image, the mounting holes are adding some space mainly at the top and right border. If I remove the holes, the board would be smaller. But I like the holes because I can use them to stack multiple boards. And the spacing between the holes on the longer side (60mm side) matches the the spacing of 60mm fans. So, it would be possible to use the holes to mount a 60mm fan (e.g. with an angle bracket -  I don't know if this is the right English word).

USB 3.0 specifies 800mA of output current (= 4W). I think it should be possible to power 2 chips.

[sprint347]

You could run 2x USB cables like some external 2.5" sata hdds, so you can run 2 chips.

It'd give you a unique device with double the power of the other usb devices, without the need for a power supply.

[aauer1]

You could run 2x USB cables like some external 2.5" sata hdds, so you can run 2 chips.

It'd give you a unique device with double the power of the other usb devices, without the need for a power supply.

Yes, you are right. I will think about that! Maybe I change the board to have a better power supply on it and two avalon chips.

[btceic]

can these smaller boards be run via pcie, with multiple chips on them?

[aauer1]

Got some news:
SebastianJu sends two samples of Avalon chips to me. Thanks again SebastianJu.

So, I ordered some PCBs yesterday. I hope they will arrive soon!
I also modified the PCB layout a bit to save some board space and make the outlines of the board smaller. Right now, the board is 60mm x 45mm in size.

[Teka]

I'm very interested. Also, I swear that the raspberry pi is 5w and that runs off usb without any issue. I might be wrong.

[TheSwede75]

Got some news:
SebastianJu sends two samples of Avalon chips to me. Thanks again SebastianJu.

So, I ordered some PCBs yesterday. I hope they will arrive soon!
I also modified the PCB layout a bit to save some board space and make the outlines of the board smaller. Right now, the board is 60mm x 45mm in size.

I applaud you for your work and a reference design is always a great thing. I would if I were you however strongly consider a 1-4 chip design for the BFL 65nm chip if you are looking to make actual mining equipment.

This would of course require an external power source (PCIE?) but could produce a small and cheap 4-20gh/s miner that could prove far more viable for mining. Contact Canaryinthemine if you are serious as he already has BFL chips on order and will likely be some of the first to receive sample chips.

FYI: I would assume you need more advanced reflow to mount the more compact BFL chips though.

[turtle83]

I'm very interested. Also, I swear that the raspberry pi is 5w and that runs off usb without any issue. I might be wrong.

Yes you are.
http://en.wikipedia.org/wiki/Raspberry_Pi#Specifications

Power ratings: 700 mA (3.5 W)

I think thats the max power it can draw, probably accounting for USB devices drawing ~100ma per port.

[Teka]

I'm very interested. Also, I swear that the raspberry pi is 5w and that runs off usb without any issue. I might be wrong.

Yes you are.
http://en.wikipedia.org/wiki/Raspberry_Pi#Specifications

Power ratings: 700 mA (3.5 W)

I think thats the max power it can draw, probably accounting for USB devices drawing ~100ma per port.

Oh ok. I wasn't 100% sure thanks for the info.

[aauer1]

Got some news:
SebastianJu sends two samples of Avalon chips to me. Thanks again SebastianJu.

So, I ordered some PCBs yesterday. I hope they will arrive soon!
I also modified the PCB layout a bit to save some board space and make the outlines of the board smaller. Right now, the board is 60mm x 45mm in size.

I applaud you for your work and a reference design is always a great thing. I would if I were you however strongly consider a 1-4 chip design for the BFL 65nm chip if you are looking to make actual mining equipment.

This would of course require an external power source (PCIE?) but could produce a small and cheap 4-20gh/s miner that could prove far more viable for mining. Contact Canaryinthemine if you are serious as he already has BFL chips on order and will likely be some of the first to receive sample chips.

FYI: I would assume you need more advanced reflow to mount the more compact BFL chips though.

Thank you very much.
Seems that BFL chips are far more interesting for many people than the Avalon chips. I already took a look at the datasheet of the BFL ASICs. And you are absolutely right. The power supply must be far stronger for the BFL chip. And also the soldering of the chip isn't so easy because of the BGA package.
But I already have a small reflow oven (already did some BGA assembly for my FPGA miners). So, I think it should be possible to assemble the BFL chip with my reflow equipment.

I should really think about making a BFL miner 

[TheSwede75]

Got some news:
SebastianJu sends two samples of Avalon chips to me. Thanks again SebastianJu.

So, I ordered some PCBs yesterday. I hope they will arrive soon!
I also modified the PCB layout a bit to save some board space and make the outlines of the board smaller. Right now, the board is 60mm x 45mm in size.

I applaud you for your work and a reference design is always a great thing. I would if I were you however strongly consider a 1-4 chip design for the BFL 65nm chip if you are looking to make actual mining equipment.

This would of course require an external power source (PCIE?) but could produce a small and cheap 4-20gh/s miner that could prove far more viable for mining. Contact Canaryinthemine if you are serious as he already has BFL chips on order and will likely be some of the first to receive sample chips.

FYI: I would assume you need more advanced reflow to mount the more compact BFL chips though.

Thank you very much.
Seems that BFL chips are far more interesting for many people than the Avalon chips. I already took a look at the datasheet of the BFL ASICs. And you are absolutely right. The power supply must be far stronger for the BFL chip. And also the soldering of the chip isn't so easy because of the BGA package.
But I already have a small reflow oven (already did some BGA assembly for my FPGA miners). So, I think it should be possible to assemble the BFL chip with my reflow equipment.

I should really think about making a BFL miner 

If you solidify some plans for a 1, 2, 4 or more chip BFL chip miner I am willing to help finance prototype and can also facilitate chips for you. I have done business with Canaryinthemine for quite some time and I am sure we both would be interested in joining with you in creating miners using the 65nm chip. Feel free to PM me if/when you get started.

[af_newbie]

I should really think about making a BFL miner 

+1

Once BFL start shipping the chips, everybody and their mothers will want BFL miners not Avalons because of BFL's higher density and lower power consumption.  IMHO.

I would not bother with Avalons. 

The only question remains: Will BFL actually deliver?

[joeventura]

Interesting question! I heard alot, too. I have also got an offer from a Chinese company. They told me that they are able to ship 10 samples at July 15. But only if I order 240 pieces. And that is too much for me alone. Is anyone interested in that?

What company is that?

[aauer1]

Right now, I'm waiting for my PCBs for the Avalon miner. In the meantime, I thought I can try to make a board for BFL ASICs, too. So, I sat down and played around with my CAD software. And just a few minutes ago, I got the board routed. Have a look at the picture. Unfortunately, it's only a 2D image exported from the layout program. But I think you get an idea of what the board could look like.
On the left side, there is the power connector at the top (6-pin PCIe power connector) and the Mini USB connector at the bottom. The upper part of the PCB is mainly used for the power supply which should be able to deliver at least 10A at 1V. And the main space below the power supply is used by the BFL ASIC (mainly because of the heatsink). The heatsink I suggested to use is similar to the one on the ZTEX FPGA boards with 59mm hole distance. I think this kind of heatsinks are often used for chipset cooling.

The power supply and the decoupling capacitors around the BFL ASIC are the most critical parts. I think my design will work, but I'm not 100 percent sure. The BFL datasheet only states that 4.7uF capacitors should be used for decoupling. But they doesn't provide details about how many capacitors should be used and where they should be placed.
I already designed some boards with a strong power supply (e.g. for LED displays). But I haven't made a power supply with 10A output current. So, this is the first time for me .

[aauer1]

Back to the Avalon Single ASIC miner project. I read the datasheet and the communication protocol. And I have a question about the REPORT pins. Maybe, someone can help me with this.

Decoding the bits isn't the problem. But I have some concerns about the speed. The datasheet says that the duration for one bit is at least 250ns. Does anybody know if the speed of the report interface is always the same and always at the maximum speed of about 4 MHz? Or depends the speed on the clock settings? Maybe it is the clock frequency divided by R?! Would be nice if anybody has some infos about that!

Thanks,
Andreas

[cp1]

Back to the Avalon Single ASIC miner project. I read the datasheet and the communication protocol. And I have a question about the REPORT pins. Maybe, someone can help me with this.

Decoding the bits isn't the problem. But I have some concerns about the speed. The datasheet says that the duration for one bit is at least 250ns. Does anybody know if the speed of the report interface is always the same and always at the maximum speed of about 4 MHz? Or depends the speed on the clock settings? Maybe it is the clock frequency divided by R?! Would be nice if anybody has some infos about that!

Thanks,
Andreas

Check out the latest posts in BKK's thread -- he's finding that it's tied to the clock setting.  (If I read it correctly)

[Lohoris]

I'm very interested. Also, I swear that the raspberry pi is 5w and that runs off usb without any issue. I might be wrong.

dafuq

How can you combine in the same line "I swear that" and "I might be wrong", lol?

FYI: I would assume you need more advanced reflow to mount the more compact BFL chips though.

You can fit as many BFL chips as you want on any board, since they are invisible and magic and they don't exist.

[innovation]

Great work.