DIY FPGA Mining rig for any algorithm with fast ROI

[DigitalCruncher]

Which is the primary usage of Amazon AWS FPGA nodes? I mean, in the real life? I have and idea to find such application and build a FPGA-based blockchain around it.

Could it be bioinformatics?

https://aws.amazon.com/ec2/instance-types/f1/

• Genomics Research
• Financial Analytics
• Real Time Video Processing
• Big Data Search and Analytics
• Security

Well, I know that. It is marketing information, but I need some more details.
Speaking about genomic research for example - which algorithm and what parameters of solver?

[1714163067]

1714163067

[1714163067]

1714163067

[1714163067]

1714163067

[1714163067]

1714163067

[1714163067]

1714163067

[whitefire990]

whitefire990: really nice job in identifying & executing on this opportunity with FPGAs! I still have a bunch of Spartan6 LX150 FPGA hardware (from 2012, when FPGA-mining Bitcoin was a thing!) but I doubt this type of FPGA can be as profitable as your cards.

Do you have a particular process for identifying which PoW algos are the most profitable on FPGAs? For example you implemented Phi1612... it is not even implemented by tpruvot's cpuminer. It's used by LUXCoin which is a rather obscure coin (#458 on https://coinmarketcap.com). Did you manually examine hundreds of PoW algorithms to find the best opportunities?

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.  Coinosaurus pool can give you the JSON protocol to submit shares since Bismuth pools don't use stratum.

Regarding the algorithms I spent months analyzing every single one to determine which were most suitable to FPGA's.  I checked them all.

[netmonk]

whitefire990: really nice job in identifying & executing on this opportunity with FPGAs! I still have a bunch of Spartan6 LX150 FPGA hardware (from 2012, when FPGA-mining Bitcoin was a thing!) but I doubt this type of FPGA can be as profitable as your cards.

Do you have a particular process for identifying which PoW algos are the most profitable on FPGAs? For example you implemented Phi1612... it is not even implemented by tpruvot's cpuminer. It's used by LUXCoin which is a rather obscure coin (#458 on https://coinmarketcap.com). Did you manually examine hundreds of PoW algorithms to find the best opportunities?

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.  Coinosaurus pool can give you the JSON protocol to submit shares since Bismuth pools don't use stratum.

Regarding the algorithms I spent months analyzing every single one to determine which were most suitable to FPGA's.  I checked them all.

So is cryptonight and all its variant already studied and planned for release ? I think we are a bunch o people looking for real numbers about monero mining and fpga.
Thanks in advance

[HardwareCollector]

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.

This is not true, apparently you haven’t spent that much time looking at the code

[HardwareCollector]

Clarifying the projected hash rates
X17: 2 cards daisy chained get 600MH/s total
X16R: 2 cards daisy chained get 600MH/s total
Xevan: 4 Bittware cards daisy chained get 600MH/s total

This also is not true, it contradicts the previous statement.

I've lost confidence and I wish you all the best of luck; I hope that it works  out.

[DigitalCruncher]

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.

This is not true, apparently you haven’t spent that much time looking at the code

Why not. Basically I have made a miner for Bismuth, but stopped for a while because of lack of time, of good pools and ccminer's support.

In my opinion the biggest problem could be the finalizing of solution by searching "needle" in the "haystack", as it is called in the source code. But it may be solved.



The expected keccak hashrate of single LX150 is 250...500 MH/s depending on luck and efforts.

[HardwareCollector]

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.

This is not true, apparently you haven’t spent that much time looking at the code

Why not. Basically I have made a miner for Bismuth, but stopped for a while because of lack of time, of good pools and ccminer's support.

In my opinion the biggest problem could be the finalizing of solution by searching "needle" in the "haystack", as it is called in the source code. But it may be solved.



The expected keccak hashrate of single LX150 is 250...500 MH/s depending on luck and efforts.

I found this after digging around:
http://www.mic-journal.no/PDF/2017/MIC-2017-4-1.pdf

It is not a trivial modification, is it? Also what is your hash rate and how did you calculate it?

[DigitalCruncher]

If you have a Zetex 1.15y with four Spartan LX150, a tiny modification to the code will change it from SHA-256 to SHA-224 and it is quite profitable mining Bismuth.

This is not true, apparently you haven’t spent that much time looking at the code

Why not. Basically I have made a miner for Bismuth, but stopped for a while because of lack of time, of good pools and ccminer's support.

In my opinion the biggest problem could be the finalizing of solution by searching "needle" in the "haystack", as it is called in the source code. But it may be solved.

The expected keccak hashrate of single LX150 is 250...500 MH/s depending on luck and efforts.

I found this after digging around:
http://www.mic-journal.no/PDF/2017/MIC-2017-4-1.pdf

It is not a trivial modification, is it? Also what is your hash rate and how did you calculate it?

Yes, not as trivial, but still is  possible to try.
I have test implementation in Vivado, 2 cores * 350 MH/s  = 700 MH/s in K7 325t.
Is it a good hashrate?

[HardwareCollector]

Yes, not as trivial, but still is  possible to try.
I have test implementation in Vivado, 2 cores * 350 MH/s  = 700 MH/s in K7 325t.
Is it a good hashrate?

Yes, but not for a $1K board, GTX 1060 has a similar hash rate.

Did you get your design to PAR without errors? If so, how long did it take?

[DigitalCruncher]

Yes, not as trivial, but still is  possible to try.
I have test implementation in Vivado, 2 cores * 350 MH/s  = 700 MH/s in K7 325t.
Is it a good hashrate?

Yes, but not for a $1K board, GTX 1060 has a similar hash rate.

Did you get your design to PAR without errors? If so, how long did it take?

You can buy many 325t for 1k USD.
My design is built without PAR errors. It is counterproductive to have timing errors, since good shares an blocks could be lost.

[HardwareCollector]

This thread is clearly for geniuses and I am not one, so I wish you guys the best of luck.

[DigitalCruncher]

This thread is clearly for geniuses and I am not one, so I wish you guys the best of luck.

This is not about being genius. Terms of purchase of fpga and efforts to implement the project give different results to different people. That is all.

Regarding x16, x17 and xevan. I would suggest to use arrays of folded cores. Those folded cores are fast and small. It could be possible to make arrays of cores for all SHA3 candidates; balance those arrays to mantain the same hashrate; make a mux  in the front of cores.
Probably the monstrous setup with gigabit transceivers is not needed.

[jimmykl]

Which is the primary usage of Amazon AWS FPGA nodes? I mean, in the real life? I have and idea to find such application and build a FPGA-based blockchain around it.

Could it be bioinformatics?

https://aws.amazon.com/ec2/instance-types/f1/

• Genomics Research
• Financial Analytics
• Real Time Video Processing
• Big Data Search and Analytics
• Security

Well, I know that. It is marketing information, but I need some more details.
Speaking about genomic research for example - which algorithm and what parameters of solver?

Good luck with your research.

[senseless]

I'll roll if he releases a firmware that bricks the fpga cards. That would be the most epic trolling of all time. Give out some really high figures, get a bunch of people to spend a ton of money on hardware, then release a firmware that destroys the fpga  

I've destroyed an amazon node or 2 accidentally with power draw. Mining is the reason the shell now has that 150A limit.

[greyday]

I'll roll if he releases a firmware that bricks the fpga cards. That would be the most epic trolling of all time. Give out some really high figures, get a bunch of people to spend a ton of money on hardware, then release a firmware that destroys the fpga  

I've destroyed an amazon node or 2 accidentally with power draw. Mining is the reason the shell now has that 150A limit.

  Right? I mean, I'd be pissed if I was one of them, but I only play with tester boards, I'm not down with spending that much on something I can fry so easily...

Also GIRRRRRRRRR!

[Lunga Chung]

I'll roll if he releases a firmware that bricks the fpga cards. That would be the most epic trolling of all time. Give out some really high figures, get a bunch of people to spend a ton of money on hardware, then release a firmware that destroys the fpga  

I've destroyed an amazon node or 2 accidentally with power draw. Mining is the reason the shell now has that 150A limit.

nice FUD

[UrsaUrsa]

I'll roll if he releases a firmware that bricks the fpga cards. That would be the most epic trolling of all time. Give out some really high figures, get a bunch of people to spend a ton of money on hardware, then release a firmware that destroys the fpga  

I've destroyed an amazon node or 2 accidentally with power draw. Mining is the reason the shell now has that 150A limit.

nice FUD

It's a completely realistic scenario.

[Archangel9999]

Hello,

very intresting project. Sorry for the stupid question but on your video - the pci riser are not connected to the motherboard ? How is the pci fpga card bus communicating with the motherboard ?

Thanks

[EggdraSyl]

Hello,

very intresting project. Sorry for the stupid question but on your video - the pci riser are not connected to the motherboard ? How is the pci fpga card bus communicating with the motherboard ?

Thanks

pci bus is for power only, fpga communicates over usb

[ruplikminer]

Hello,

very intresting project. Sorry for the stupid question but on your video - the pci riser are not connected to the motherboard ? How is the pci fpga card bus communicating with the motherboard ?

Thanks

Normal USB ports