The Wasp Project Collective Information thread.

[derpberp]

This sounds like a very interesting project and I am interested in purchasing. I will keep this page bookmarked. Looking forward to seeing the prototype!

[Bicknellski]

http://www.coindesk.com/gavin-andresen-bitcoin-companies-support-open-source/

Lead developer Gavin Andresen chided the commercial bitcoin community for not getting involved enough in core bitcoin development and testing this week. In a mail to the bitcoin developers list updating the community on some bug fixes in the code, he called companies out for not giving back.

Time to give back?

But the community has to play ball, Andresen said, by helping to test the fixes out, rather than just running services on top of the latest version of the code and hoping that the team had fixed problems for them.

“Or, in other words: do not treat the core development team as if we were a commercial company that sold you a software library,” he wrote. “That is not how open source works; if you are making a profit using the software, you are expected to help develop, debug, test, and review it.”

-----

And in design news we have a little Wasp P0rn, buck regulator close up we can see light at the end of the design tunnel.

[topminingcontracts]

We are interested in support the project and to buy miners.

Please let us know how we can help.

All the best!

[Bicknellski]

Thanks!

Please contact Beastlymac via PM he will put you on the list to keep you in the loop on when we expect to release the gerbers and the BOM as well as the firmware and software to run the miners. Note that we are merely licensing our miners out others are producing these for the marketplace. If you would like to sit in at next weeks meeting with the EE and the rest of the WPC then contact Beastlymac and he can arrange it.

Our meeting yesterday was somewhat fruitful but there will be weeks not days until we have something to show that is production worthy. It seems many who are producing their own variants of the A1 miners are running into any number of issues with power and the PCB layout. It is a tricky one this mofo that anyone doing a design can atest to. From what I can surmise the only one that has "shipped" an A1 product based miner is Marto74. It goes without saying that this build will tax any team. Our issues haven't been with the hardware and getting it to work but getting our CAD software to play nice.

Our latest revision means a much more conservative 4 chip board, this simplifies our design work and time to fab prototypes, put into a 8 slot backplane for a 800 Gh/s machine that can be enclosed in a 4U size unit. We are looking at an 4 week hard date to get these units done because the EE is taking some much needed vacation time in the tropics! We are also going to do a revision after we get this initial miner done with a larger 6 chip board into the the 8 slot backplane for 1200 Gh/s machine. Multiple server PSU's will be required especially for the 1.2 Th/s rig. We are also contemplating an Ice Wasp module for cooling. We are hopeful that we will soon enough have some hardware to touch taste and feel as well as send to the Firmware team members for to work on that.

The reasoning behind a more conservative chip number per board is simply an inductance issue and where adding more  chips to our design and limited space doesn't play well. We have opted for a modular design so that we can adjust board sizes accordingly but ultimately we are looking at the black arrow and future chips that will require more power in the same square footage and that means we have to make allowances in our current design for future chips without having to change too much other than the chip traces. Anyhow we are happy that some of our CAD issues seems to have cleared up and we are back on track after losing weeks and nearly a month to CAD crashes etc.

As far as the provision server and licensing we are close to having that being tested in emulated form soon as well. Our website is waiting for that to be completed and then our pool is still being tweaked and revised and we hope to have that available to public this month.

[ZBC3]

How are you getting that much hashing power out of so few bitfury chips?

I

BitFury Wasp Prototype

+  16 to 24 chips  for 300 gh/s to 440 gh/s depending on the configuration.
+  4U Server configuration
+  Design for the power on the Wasp currently being down so 3d renders for the prototype are a week away.
+  By December the prototype testing video should be out.
+  By December the prototypes shipped to a datacenter for longer term testing and troubleshooting.
+  The DIY & Licenced Production could start as early as January for these units should there be a market for them.

[Bicknellski]

How are you getting that much hashing power out of so few bitfury chips?

I

BitFury Wasp Prototype

+  16 to 24 chips  for 300 gh/s to 440 gh/s depending on the configuration.
+  4U Server configuration
+  Design for the power on the Wasp currently being down so 3d renders for the prototype are a week away.
+  By December the prototype testing video should be out.
+  By December the prototypes shipped to a datacenter for longer term testing and troubleshooting.
+  The DIY & Licenced Production could start as early as January for these units should there be a market for them.

We are using A1 Chips. No bitfury chips currently in our design we had to shelve the multiple chip design for the prototypes and go with the A1s as we have that as priority for the WPC have chips in hand and we need them made into miners ASAP. We have lost weeks fighting with the CAD software so we have had to drop a few things to get things done sooner. We will probably revisit and build a Bitfury Wasp if chips go back on sale. Still none to see right?


4 Chip 4U Modular Design

25 gh/s per chip.

4 chips per Wasp.

8 Wasps per Hive.

32 chips x 25 Gh/s = 800 Gh/s estimate 4U (Our module holds the Hive and the Wasps and will fit 4U.)


6 Chip 5U Modular Design

25 Gh/s per chip.

6 chips per Wasp.

8 Wasps per Hive.

48 chips x 25 Gh/s = 1200 Gh/s.

We are looking to work on the "modules" and an Ice Wasp that could potentially allow for overclocking up to the 40 Gh/s if we can keep the Wasps cool enough. We will keep everyone informed as we proceed with that. We are still keen on getting hold of Black Arrow chips and work those into our larger 5U Wasp concept.

[xzempt]

megabigpower.com just added chips for $15 each,    2700 available....   still refuse to price 25ghs hashing boads according to difficulty and other miners on the market.....     just ordered 2 more antminers with the money i had ear marked for bitfury expansion....



 

[Bicknellski]

megabigpower.com just added chips for $15 each,    2700 available....   still refuse to price 25ghs hashing boads according to difficulty and other miners on the market.....     just ordered 2 more antminers with the money i had ear marked for bitfury expansion....



 

Ya 15$ is too high really. Was hoping to see a proper discount. We don't need to order chips we have enough to prototype a Wasp after we are done with the A1. If more chips are still available in March we will probably have a BitFury Wasp available but not sure how many people will be interested in building those. Antminer is certainly cleaning up. Shipping as soon as you pay the way it has to be.

[S4VV4S]

megabigpower.com just added chips for $15 each,    2700 available....   still refuse to price 25ghs hashing boads according to difficulty and other miners on the market.....     just ordered 2 more antminers with the money i had ear marked for bitfury expansion....



 

Ya 15$ is too high really. Was hoping to see a proper discount. We don't need to order chips we have enough to prototype a Wasp after we are done with the A1. If more chips are still available in March we will probably have a BitFury Wasp available but not sure how many people will be interested in building those. Antminer is certainly cleaning up. Shipping as soon as you pay the way it has to be.

Have you guys tried getting your hands on Bitmain Antminer chips?
It would be nice if you could use them in your project as well

[Bicknellski]

megabigpower.com just added chips for $15 each,    2700 available....   still refuse to price 25ghs hashing boads according to difficulty and other miners on the market.....     just ordered 2 more antminers with the money i had ear marked for bitfury expansion....



 

Ya 15$ is too high really. Was hoping to see a proper discount. We don't need to order chips we have enough to prototype a Wasp after we are done with the A1. If more chips are still available in March we will probably have a BitFury Wasp available but not sure how many people will be interested in building those. Antminer is certainly cleaning up. Shipping as soon as you pay the way it has to be.

Have you guys tried getting your hands on Bitmain Antminer chips?
It would be nice if you could use them in your project as well

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

[loshia]

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

Bicknellski ,

There is no such thing like reasonable prices and quantities in ASIC world.  This is monopoly. I can fully understand how big and risky the investment to manufacture a single ASIC chip is. But i can not understand the demand. We are ready to pay any price like it is a drug and our life depends on it. And unless we as community act as one and refuse to pay ridiculous margins to chip suppliers nothing will change. I am trying to say that you have to be prepared to work on everything upfront with loss in terms of time and money invested. Then wait for your moment to come.

I wish you and your project success.
For instance take some Bitfury and avalon 2 chips. According to rumors next gen is coming which will be almost equal to old gens in terms of communication and pin out. Do you design test it. Make sure that it works and be prepared not to discover the wheel when you need to act fast. As long as you are going to make some profit from your know how as long as we pay the chip price it is not your concern.

[Bicknellski]

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

Bicknellski ,

There is no such thing like reasonable prices and quantities in ASIC world.  This is monopoly. I can fully understand how big and risky the investment to manufacture a single ASIC chip is. But i can not understand the demand. We are ready to pay any price like it is a drug and our life depends on it. And unless we as community act as one and refuse to pay ridiculous margins to chip suppliers nothing will change. I am trying to say that you have to be prepared to work on everything upfront with loss in terms of time invested and money. Then wait for your moment to come.

I wish you and your project success.

Thanks,

There is reasonable there is price gouging. We might agree on the idea of "monopoly" if there was only one fabricator of ASIC chips. We are working on everything upfront. The designs we release are our best efforts to get boards married to ASICs that give the best value given the market. There really is no reason to fabricate 110nm Avalon Gen I Wasps given there is no ready supply of chips. What is left of the community at this point of DIYers need to pool resources and build an ASIC chip that is Open Source so that we can continue working on miners. Otherwise the "monopolies" will continue.

Chip prices are our concern. WPC members are very concerned and they will be interested in making boards locally. So as a design team we want to make sure that the WPC members and the community get the best deal they can. There is really no reason to build with chips that are over priced unless someone wants to forward chips to us and then we can make miners fit that chip. Given the difficulty that Bitmine is having say with the A1 it is interesting that our alternative open source designs or others could be used to bolster their own stable of miners. We are not just dumping designs on the market we are keen as members in the WPC to be active in cloud mining, pools as well as miner design which means we look at chip prices and adapt to the market.

First and foremost this is not about the profit at this point. We are looking to start with a design that will change the way miners are brought to market. We are not racing to be first with an A1 because there are some pretty nasty pitfalls pushing these chips to boards without a few respins of the boards. You I am sure are aware of this with Marto's boards and watching what Bitmine is going through with their boards. We are not releasing anything until we are happy and are ready to put our own A1 chips we purchased on our boards. This being our first run is challenging but our goal is not a single one off board as you well know we are looking at the Black Arrow chips coming out and we have lines on other chips not even being discussed in this forum as well.

[loshia]

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

Bicknellski ,

There is no such thing like reasonable prices and quantities in ASIC world.  This is monopoly. I can fully understand how big and risky the investment to manufacture a single ASIC chip is. But i can not understand the demand. We are ready to pay any price like it is a drug and our life depends on it. And unless we as community act as one and refuse to pay ridiculous margins to chip suppliers nothing will change. I am trying to say that you have to be prepared to work on everything upfront with loss in terms of time invested and money. Then wait for your moment to come.

I wish you and your project success.

There is reasonable there is price gouging. We might agree on the idea of "monopoly" if there was only one fabricator of ASIC chips. We are working on everything upfront. The designs we release are our best efforts to get boards married to ASICs that give the best value given the market. There really is no reason to fabricate 110nm Avalon Gen I Wasps given there is no ready supply of chips. What is left of the community at this point of DIYers need to pool resources and build an ASIC chip that is Open Source so that we can continue working on miners. Otherwise the "monopolies" will continue.

Chip prices are our concern. WPC members are very concerned and they will be interested in making boards locally. So as a design team we want to make sure that the WPC members and the community get the best deal they can. There is really no reason to build with chips that are over priced unless someone wants to forward chips to us and then we can make miners fit that chip. Given the difficulty that Bitmine is having say with the A1 it is interesting that our alternative open source designs or others could be used to bolster their own stable of miners. We are not just dumping designs on the market we are keen as members in the WPC to be active in cloud mining, pools as well as miner design which means we look at chip prices and adapt to the market.

Sounds great expect "Chip prices are our concern" unless you are not planning to be an asic manufacturer.
I am looking closely to chip prices - Bitfury gen1 chips 3GH top 17 USD if i recall correctly the info from yesterday. Great adaption. Avalon2 2500/13BTC = 0.0052 each x 580 USD = 3USD for 1.8 GH BTC ROI is 6 weeks away just to pay chip price
And so on.

[Bicknellski]

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

Bicknellski ,

There is no such thing like reasonable prices and quantities in ASIC world.  This is monopoly. I can fully understand how big and risky the investment to manufacture a single ASIC chip is. But i can not understand the demand. We are ready to pay any price like it is a drug and our life depends on it. And unless we as community act as one and refuse to pay ridiculous margins to chip suppliers nothing will change. I am trying to say that you have to be prepared to work on everything upfront with loss in terms of time invested and money. Then wait for your moment to come.

I wish you and your project success.

There is reasonable there is price gouging. We might agree on the idea of "monopoly" if there was only one fabricator of ASIC chips. We are working on everything upfront. The designs we release are our best efforts to get boards married to ASICs that give the best value given the market. There really is no reason to fabricate 110nm Avalon Gen I Wasps given there is no ready supply of chips. What is left of the community at this point of DIYers need to pool resources and build an ASIC chip that is Open Source so that we can continue working on miners. Otherwise the "monopolies" will continue.

Chip prices are our concern. WPC members are very concerned and they will be interested in making boards locally. So as a design team we want to make sure that the WPC members and the community get the best deal they can. There is really no reason to build with chips that are over priced unless someone wants to forward chips to us and then we can make miners fit that chip. Given the difficulty that Bitmine is having say with the A1 it is interesting that our alternative open source designs or others could be used to bolster their own stable of miners. We are not just dumping designs on the market we are keen as members in the WPC to be active in cloud mining, pools as well as miner design which means we look at chip prices and adapt to the market.

Sounds great expect "Chip prices are our concern" unless you are not planning to be an asic manufacturer.
I am looking closely to chip prices - Bitfury gen1 chips 3GH top 17 USD if i recall correctly the info from yesterday. Great adaption. Avalon2 2500/13BTC = 0.0052 each x 580 USD = 3USD for 1.8 GH BTC ROI is 6 weeks away just to pay chip price
And so on.

Avalon Gen II not really that cost effective, BitFury at 17 USD is not the best pricing as I said we were hoping for something that was more competitive. $ per GH/s is the coming down but these "old" chips certainly haven't really come down enough have they to meet what say the Minion or A1 chips costs or have I missed the numbers? We have Bitfury chips and will make a BitFury Wasp after we clear the A1 off the decks first. And as I edited you may have missed it we are also in talks for chips that are not even on the radar here in BitCointalk land so we prefer to move forward rather than look backward at chips that are no longer price point or efficiency competitive. Asicminers potentially new chips might be great as well but let us see if they release or sell those.

[loshia]

I believe price and quantity was an issue. Again though we will work on anything into a wasp if there are reasonable prices and quantities of ASICs available.

Bicknellski ,

There is no such thing like reasonable prices and quantities in ASIC world.  This is monopoly. I can fully understand how big and risky the investment to manufacture a single ASIC chip is. But i can not understand the demand. We are ready to pay any price like it is a drug and our life depends on it. And unless we as community act as one and refuse to pay ridiculous margins to chip suppliers nothing will change. I am trying to say that you have to be prepared to work on everything upfront with loss in terms of time invested and money. Then wait for your moment to come.

I wish you and your project success.

There is reasonable there is price gouging. We might agree on the idea of "monopoly" if there was only one fabricator of ASIC chips. We are working on everything upfront. The designs we release are our best efforts to get boards married to ASICs that give the best value given the market. There really is no reason to fabricate 110nm Avalon Gen I Wasps given there is no ready supply of chips. What is left of the community at this point of DIYers need to pool resources and build an ASIC chip that is Open Source so that we can continue working on miners. Otherwise the "monopolies" will continue.

Chip prices are our concern. WPC members are very concerned and they will be interested in making boards locally. So as a design team we want to make sure that the WPC members and the community get the best deal they can. There is really no reason to build with chips that are over priced unless someone wants to forward chips to us and then we can make miners fit that chip. Given the difficulty that Bitmine is having say with the A1 it is interesting that our alternative open source designs or others could be used to bolster their own stable of miners. We are not just dumping designs on the market we are keen as members in the WPC to be active in cloud mining, pools as well as miner design which means we look at chip prices and adapt to the market.

Sounds great expect "Chip prices are our concern" unless you are not planning to be an asic manufacturer.
I am looking closely to chip prices - Bitfury gen1 chips 3GH top 17 USD if i recall correctly the info from yesterday. Great adaption. Avalon2 2500/13BTC = 0.0052 each x 580 USD = 3USD for 1.8 GH BTC ROI is 6 weeks away just to pay chip price
And so on.

Avalon Gen II not really that cost effective, BitFury at 17 USD is not the best pricing as I said we were hoping for something that was more competitive. $ per GH/s is the coming down but these "old" chips certainly haven't really come down enough have they to meet what say the Minion or A1 chips costs or have I missed the numbers? We have Bitfury chips and will make a BitFury Wasp after we clear the A1 off the decks first.

Wise

[Bicknellski]

Wasp Update:

Board is completed. We have moved to onto the thieving tests and layout.

Example of Thieving:

Code:

Copper dots (or grid/solid fill) are used mainly to balance the thermal properties of the board, 
to minimize twist and warp as the board goes through the thermal cycling associated with reflow and 
improving yield.

A secondary purpose for them is to reduce the amount of copper that needs to be etched away 
from the board, balancing the etching rates across the board and helping to make the etching solution 
last longer.

If the PCB designer did not explicitly "pour" copper fill into the open areas of the board's outer layers, 
the fabrication house will often add the small disconnected dots, because these will have the least effect 
on the electrical properties of the board.

The reaction rate of any etching process is limited by local current densities, access of the reactants into 
the reaction area and clearance of the reaction products away from the reaction area. Since board etching 
is essentially a planar or two dimensional process this places further limits on etching performance with 
reactant delivery and reaction products actively interfering with each other for access to the surface.

While always present in processes, where the problem arises is in the differential etch rates across the board. 
This can cause thin traces to be etched at a different rate than wider traces. For example, etching a relief 
from around a fine trace within a background of a ground plane is very different in loading than etching a 
thin trace with no background ground plane.

This can be corrected for by ensuring that in the design the pattern density remains fairly constant per 
unit area across the board. Thieving is one way to do this. Some manufacturers will actually place 
sacrificial elements within the tanks and along side the board to ensure proper yield of different line 
thicknesses.

Mixing and agitation of the tanks during etch will also help mitigate the differential etch issues.

Then the EE will get in contact with Orcad to ensure that the negative plane ground remains out of the edge connector area, and ensure that all the ground vias are in fact connecting. Pictures of the Wasp design will be forthcoming after this is done meaning we will have bring up boards soon.

Although this has been a long and hard process we are happy that our EE team has finally got something to produce and if it weren't for the latest buggy version of Orcard/Allegro we would have been here 3 possibly 4 weeks ago. There is still plenty to do firmware wise as well as testing prototype boards but we are optimistic we have turned the corner and will move our A1 chips into our own production prototype run miners for the WPC. Meaning we will be releasing the designs for licensing at the same time. We will update more on this next week after our meeting on Saturday. We hope to get a few things working like our website and WPC pool next week or the week after.

[Bicknellski]

Latest WPC Update:

Initial bring up boards are on order.
The EE is also doing a local bring up board to be fabbed on Sunday in Seattle.
WPC Pool is nearly done should be ready for soft opening next week.
Website & Provisioning Server will be tested this coming week ready to roll out as soon as the design and software / firmware is ready for public download.


Wasp P0rn:

Note this image taken from the Wasp 2 x A1 gerbers bring up board that will be used for SW/FW development.



Hive P0rn:

Note that the Hive has changed somewhat this is an older version of the beta design but you can see the modular bracing concept.

[Micky25]

Great project and progress. Well managed. I wish you all the very best!

[Bit-Tech]

Great progress guys , whats the prospects of overclocking the A1 on your existing design ?

[Bicknellski]

Great progress guys , whats the prospects of overclocking the A1 on your existing design ?

Two factors for anyone overclocking any A1 designed board.

You must cool it.
The design must account for impedance and where possible in the design provide "controlled impedance".

At this point anyone that can overclock an A1 design, must provide both a substantial solution in terms of cooling and must address the issue with impedance in the traces.

We will know how well we have done on the issue of impedance after proper testing of the Wasp and it will probably need some or a lot of rework of the board to improve this characteristic.

We do not have a water block or immersion cooling solution yet and that is something we are tempted to resolve before the Black Arrow Minion Wasp is developed but we will see. So in short no this design won't be overclocking unless we have a cooling solution even if we get the impedance characteristics set perfectly, at least that is my current understanding and I will be listening carefully at the meeting in a few hours for any insight into this area. My feeling is any chips like the A1 or Minion etc will require these things to ever "overclock".

http://www.pcbdesign007.com/pages/zone.cgi?a=79869

Code:

What is Trace Impedance and Why Do We Care?
Wednesday, October 26, 2011 | Douglas Brooks, PhD.


Background

All wires and traces have impedance and offer a moderate impedance to the current flowing 
from a driver. That seems like an astounding sentence given that (1) most wires and traces 
are made from copper, and (2) copper has the second-lowest resistivity of any known element 
(see Note 1.) Copper wires and traces seem almost like perfect conductors. After all, if you 
place an ohm meter across a trace, the DC resistance is extremely low. We almost always
ignore it in circuit calculations.

But impedance, of course, is an AC characteristic. That is, impedance is related to frequency. 
Resistance is not. So what we mean is that wires and traces present an AC impedance to the 
drivers driving them (see Note 2.) It is generally true (but not always) that from a practical 
sense the rise time of our signals must be relatively fast before this impedance becomes an issue. 
But the fact that trace impedance exists at all must be taken as a given.

So when we hear the term “controlled impedance” trace, our first confusion might come from 
the question: Why does a trace have any impedance at all? And if it does, what does it mean 
that we somehow control it?

Nature of Trace Impedance

So how is it that a trace has a potentially significant AC impedance? Well, we can develop the 
argument like this:

Every trace has series inductance. It is distributed along the trace and is inversely related to 
the cross-sectional area of the trace. It is admittedly small, but it is non-zero. Therefore, for 
fast enough rise times, the impedance it offers can be significant.

Every trace has capacitance between the trace and the return path of the signal on the trace, 
wherever that return path might be. It is distributed (see Note 3) and is related to the width 
(or diameter) of the trace and to the dielectric of the material(s) between the trace and the 
signal return path. It is inversely related to the distance to the return path. It is admittedly small, 
but it is non-zero. Therefore, for fast enough rise times, the impedance it offers can be significant. 
It is the current path through this capacitance that allows current to flow as the signal propagates 
along the trace (see Note 4.)

If we assume that any trace resistance is small in relation to this distributed inductance and 
capacitance (a reasonable assumption unless we want to talk about lossy transmission lines), 
then we see that every trace looks like a distributed LC circuit to the driver driving it. The (AC) 
impedance of the trace derives from this distributed LC circuit (Note 5.)

Unless we have carefully designed the trace and its environment, this AC impedance is “uncontrolled.” 
That is, the distributed inductance and capacitance can (and probably does) vary in value from point 
to point along the trace. Therefore, the AC impedance varies from point to point along the trace. 
In a great many cases this impedance is of no consequence and we ignore it.

There are a few cases where control over this impedance is important. For us board designers this is 
usually when we want to make the trace look like a transmission line (so we can terminate it in its 
characteristic impedance to avoid reflections.) When we do this we have designed a “controlled 
impedance” trace or a “controlled impedance” transmission line. This is in contrast to the 
“uncontrolled” situation referred to in point 4 above.

Controlled Impedance

“Controlled impedance” in this context means that the impedance is constant at every point along the trace.
The primary way we control the impedance of a wire or trace is to control its geometry and its environment. 
There are three primary (and one secondary) aspects to the overall geometry that must be controlled:

The width of the trace
The spacing between the signal trace and the signal return path (This is one reason why we use planes, 
it makes control over this spacing much easier.)
The relative dielectric coefficient of the material that surrounds the trace, and
(Secondarily) the thickness of the trace.
Coaxial cables are excellent examples of controlled impedance transmission lines where these variables 
are tightly controlled. The old “twin lead” cables are also examples of controlled impedance transmission lines.

“Controlled impedance” does not imply that these aspects cannot change along the trace. It means that the 
important relationship between them must not change. For example, if we change the width of a trace, then 
at least one other aspect must also change in order to maintain the correct overall relationship between the four aspects (and therefore maintain a constant impedance).

Scaling

It is not often clear to designers that the overall scaling of a trace can change without changing its 
impedance. For example, consider a microstrip trace with the following stackup:

W  = 10  mils
Th  = 1 oz.
H  = 12 mils above the plane
Er = 4.3 below the trace
Er = 1.0 (air) above the trace
Zo = 73.8 ohms

The characteristic impedance of this trace is 73.8 Ohms according to the Polar Instruments Quicksolver calculator (see Note 6).

The above trace will have the same impedance as one whose dimensions are exactly half:

W  = 5  mils
Th  = .5 oz.
H  = 6 mils above the plane
Er = 4.3 below the trace
Er = 1.0 (air) above the trace
Zo = 73.8 ohms

One way to envision why this is so is to look at the electromagnetic field surrounding each of these traces. 
Mentor Graphic’s HyperLynx simulation tool is one tool that will give an “image” of the field surrounding 
a trace. Such a field is shown in Figure 1.

Figure 1. Note the electromagnetic field lines around the traces. (Source: HyperLynx Simulation Tool)

Etc... you can read the whole article if you like but that is what our EE is going to be working on as soon as he has the Wasps back from the fab.