BFL ASIC is bogus

[OmegaNemesis28]

just placed my order on a BFL SC 40GH/s , now just to wait patiently while all my 6990's cook in my basement 

Same boat, almost :3

[1714657116]

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[punningclan]

My point being: BFL the way it is presented to us certainly hasn't got the resources and funds to develop custom chips.

They do now.  

By custom chips I mean Full Custom ASICs, that is what they are claiming they are making. That costs about 10M USD for starters.
There might be some way to get it cheaper if you have the ties but unless whoever behind BFL is some engineering wizard he doesn't even have the means to develop it.

If you know how the process of semiconductor manufacturing actually works the notation of a BFL custom ASIC is ridiculous.
To get an idea what kind of people pulled this thing off in the past... (Ninja Style ASIC development using selfwritten software), he did it: http://en.wikipedia.org/wiki/Charles_H._Moore

They're not making a CPU just a random number generator, I'm not sure it gets any simpler than that?

[Coinoisseur]

1) Make incredible claims about your future product promise 1 to 1 trade ins on your currently sold product
2) Point all your PR tools to talking favorably about your future product and minimizing your previous failure to meet pre-release numbers
3) Take peoples $ for future orders, this combined with money not spent due to uncertainty reduces your competitors sales and thus available funds to develop their future products
4) Some profit
5) Plow some of that money into developing something that at least might, perhaps come close to your seat of the pants PR numbers
6) ??
7) More profit

[runeks]

Another thing that makes the BFL announcement rather
hard to believe is the very large performance increase
they claim to be able to achieve on an ASIC as compared
to the existing FPGA solutions.

I'd have expected maybe a x3 improvement on - say - the
MH/s/Watts numbers, but the numbers they've announced
are hard to stomach.

I would love for someone really knowledgeable on this topic
(how much more efficient can a chip be made when moving
from FPGA from full custom ASIC).

Someone has actually already made a chip capable of SHA-256 on an IBM 130nm process:
http://rijndael.ece.vt.edu/sha3/chip/sha3-asic-datasheet.pdf
If I understand the paper correctly, it does 2.95 MH/s (1.51 Gbps / 256 bit / 2) (divided by two because it's double-SHA-256) while consuming 5 mW (0.005 W) running at 50 MHz. So that's about 3 GH/s at 5 W on a 130nm process.

Here's more info: http://rijndael.ece.vt.edu/sha3/sha3chip.html

[MrTeal]

Another thing that makes the BFL announcement rather
hard to believe is the very large performance increase
they claim to be able to achieve on an ASIC as compared
to the existing FPGA solutions.

I'd have expected maybe a x3 improvement on - say - the
MH/s/Watts numbers, but the numbers they've announced
are hard to stomach.

I would love for someone really knowledgeable on this topic
(how much more efficient can a chip be made when moving
from FPGA from full custom ASIC).

Someone has actually already made a chip capable of SHA-256 on an IBM 130nm process:
http://rijndael.ece.vt.edu/sha3/chip/sha3-asic-datasheet.pdf
If I understand the paper correctly, it does 2.95 MH/s (1.51 Gbps / 256 bit / 2) (divided by two because it's double-SHA-256) while consuming 5 mW (0.005 W) running at 50 MHz. So that's about 3 GH/s at 5 W on a 130nm process.

Here's more info: http://rijndael.ece.vt.edu/sha3/sha3chip.html

That shows Tp at the max frequency I think, while the power is at 50MHz. If you look at mJ/Gbit, that's the same as mW/Gbps. 5.18mW given 13.76mJ/Gbit would be 0.374Gbps at 50MHz. That corresponds perfectly with 1.51Gbps@200MHz.

Looking at that paper and comparing areas, it looks like the single round of SHA2 is about 3.4% of the total die size of 5mm^2, or 0.17mm^2. Think about how many rounds of SHA2 you would need at 130nm to get 3.5GH/s.
With a full custom design you'd be able to trim off some fat because you don't need to transmit every hash out, but 3.5GH/s @~5W seems very aggressive.

[sadpandatech]

Another thing that makes the BFL announcement rather
hard to believe is the very large performance increase
they claim to be able to achieve on an ASIC as compared
to the existing FPGA solutions.

I'd have expected maybe a x3 improvement on - say - the
MH/s/Watts numbers, but the numbers they've announced
are hard to stomach.

I would love for someone really knowledgeable on this topic
(how much more efficient can a chip be made when moving
from FPGA from full custom ASIC).

Someone has actually already made a chip capable of SHA-256 on an IBM 130nm process:
http://rijndael.ece.vt.edu/sha3/chip/sha3-asic-datasheet.pdf
If I understand the paper correctly, it does 2.95 MH/s (1.51 Gbps / 256 bit / 2) (divided by two because it's double-SHA-256) while consuming 5 mW (0.005 W) running at 50 MHz. So that's about 3 GH/s at 5 W on a 130nm process.

Here's more info: http://rijndael.ece.vt.edu/sha3/sha3chip.html

That shows Tp at the max frequency I think, while the power is at 50MHz. If you look at mJ/Gbit, that's the same as mW/Gbps. 5.18mW given 13.76mJ/Gbit would be 0.374Gbps at 50MHz. That corresponds perfectly with 1.51Gbps@200MHz.

Looking at that paper and comparing areas, it looks like the single round of SHA2 is about 3.4% of the total die size of 5mm^2, or 0.17mm^2. Think about how many rounds of SHA2 you would need at 130nm to get 3.5GH/s.
With a full custom design you'd be able to trim off some fat because you don't need to transmit every hash out, but 3.5GH/s @~5W seems very aggressive.

1,169.893~ rounds?

[Coinoisseur]

Block size is actually 512 bit so it's basically 1.51 Gbps / 1024 or 1.47 MH/s
Also power goes up in a non-linear fashion as die size and clockspeed increase.

Another thing that makes the BFL announcement rather
hard to believe is the very large performance increase
they claim to be able to achieve on an ASIC as compared
to the existing FPGA solutions.

I'd have expected maybe a x3 improvement on - say - the
MH/s/Watts numbers, but the numbers they've announced
are hard to stomach.

I would love for someone really knowledgeable on this topic
(how much more efficient can a chip be made when moving
from FPGA from full custom ASIC).

Someone has actually already made a chip capable of SHA-256 on an IBM 130nm process:
http://rijndael.ece.vt.edu/sha3/chip/sha3-asic-datasheet.pdf
If I understand the paper correctly, it does 2.95 MH/s (1.51 Gbps / 256 bit / 2) (divided by two because it's double-SHA-256) while consuming 5 mW (0.005 W) running at 50 MHz. So that's about 3 GH/s at 5 W on a 130nm process.

Here's more info: http://rijndael.ece.vt.edu/sha3/sha3chip.html

[runeks]

So if it consumes 13.76 mJ/Gbit and 3.5 GH/s equals 3584 Gbit/s (512 bits block size and two of these because of double SHA-256) then a 3.5 GH/s unit running at 50 MHz would consume 49.3W - without taking into account the added power draw from a die size about ten thousand times (0.374 Gbit/s at 50 MHz vs 3584 Gbit/s) the size of the SHA-3 chip, which would be 1700mm², or 41x41mm?

Now this is 130nm, so if we're optimistic and say they have access to a 28 nm process (is this at least somewhat realistic?), then this could be reduced to 8.8x8.8mm or 78mm². Would anyone venture a guess as to what the reduced power draw from going 120nm to 28nm would be? If it's a factor 10 and, again, we ignore the added power draw from the huge die, then that gets us down to ~5W.

Or is 28nm processes currently only reserved for companies spitting out chips in the tens of millions?

[Coinoisseur]

28nm is not realistic at all, 130nm down to 65nm is most likely by far.

[deepDown]

According to this:  www.xilinx.com/support/documentation/white_papers/wp298.pdf

Going from 130nm to 65 or even 45nm would give you savings at ~40-50%

Hence, the ballpark is 25-50W. No way it is going to be 5W )

if it ever materializes that is.

[arklan]

i wonder what they're back up plan is for the "oh crap we can't meet our stated stats, and we promised..." situation...

[sadpandatech]

i wonder what they're back up plan is for the "oh crap we can't meet our stated stats, and we promised..." situation...

they would probably just point to the obscure statements they like to make that generalize instead of actually making any promises...

[MrTeal]

i wonder what they're back up plan is for the "oh crap we can't meet our stated stats, and we promised..." situation...

they would probably just point to the obscure statements they like to make that generalize instead of actually making any promises...

BFL would never do such a thing.

I really dislike being drawn into these discussions but in this case it's necessary to correct you.  BF Labs has never gone on record claiming it's previous generation processors are pure ASIC.  Never.  Forum members simply came to their own conclusions based on our FAQ (which did not say it was pure ASIC, just left it ambiguous).

[BR0KK]

ill keep asking myself: how could a 2.5 watt coffee warmer keep my Caffein warm? isn't that way to less power?

[AzN1337c0d3r]

ill keep asking myself: how could a 2.5 watt coffee warmer keep my Caffein warm? isn't that way to less power?

Depends on how insulating your coffee mug is =P

To start off, some facts:

A. Specific heat of water is 4.1813 Joules/(grams*Kelvins).
B. 2.5 watts = 2.5 Joules per second.

Now we make 2 assumptions:

1. We assume your coffee is mostly water (most are 98-99%) and that you have 250 mL (1 cup).
2. Your coffee mug is perfectly insulating.

From the volumetric density of water, we know that 250 mL of water has mass of 250g. Crunch the math and that would make it ~1050 J/K.

At 2.5 watts, it would take ~7 minutes just to raise your coffee by 1 degree assuming your coffee mug is perfect. I dont know how that thing is going to keep your coffee appreciably above room temperature if you have to account for heat loss.

[rjk]

Wait, if it's perfectly insulating, how would it let heat through to the liquid?

Also, USB coffee warmers have been around, but can anyone that has tried one let us know whether they work?

[BR0KK]

They work .....and kill your USB Ports :d

[AzN1337c0d3r]

Wait, if it's perfectly insulating, how would it let heat through to the liquid?

Also, USB coffee warmers have been around, but can anyone that has tried one let us know whether they work?

For argument sake let's just say you submerged the ASIC in your coffee =P

Doesn't work according to Amazon for lack of heating power.

[Dargo]

Does anyone *really* care whether the Jalapenos work as coffee warmers or not?

[Bitcoin Oz]

Im going to buy two to keep my feet warm in winter while sitting at the computer