Best demonstrated efficiency: 1290 Mhash/Joule

[Keefe]

https://www.btcfpga.com/forum/index.php?topic=4.msg132#msg132

We are expecting the 27Gh/s units to use between 50-60 watts and the 54Gh/s units to use between 100-120 watts give or take

this is estimated data - and will not be completely correct but it gives you a ballpark and as close as an estimate as our competitor friends have on their units

[1714120088]

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[mrb]

Ok. Assuming 120W for the 54 Ghash/sec device, that's 450 Mhash/Joule at 90nm.
Therefore Tom's standard-cell ASIC should in theory scale to 450 / ((65**2)/(90**2)) = 863 Mhash/Joule at 65nm.
If Tom went further and made it full custom, he would need a mere extra 16% efficiency gain to match BFL's 1000 Mhash/Joule.
But I would assume that making it full custom would have a lot more potential than a +16% efficiency gain.

So it seems:
- (1) either Tom's power efficiency estimates are optimistic
- (2) or BFL's power efficiency estimates are pessimistic
- (3) or BFL's full custom design has not been that well optimized after all
- (4) or Tom's standard cell design is extremely well optimized for being standard cell tech

I would say (4) is very likely since he hired state-of-the-art ASIC design firms. Knowing he had a very well optimized implementation would also explain why he initially did not believe BFL's 1000 Mhash/s claim as he probably assumed they were using std cell tech, and 65nm std cell tech should only be capable of 863 Mhash/Joule.

[mrb]

Time to refresh this thread. Avalon demonstrated 150 Mhash/Joule. This is twice better than the second best chip, developed by Virginia Tech, achieving 73 Mhash/Joule (obviously not Bitcoin-optimized).

[MrTeal]

Time to refresh this thread. Avalon demonstrated 150 Mhash/Joule. This is twice better than the second best chip, developed by Virginia Tech, achieving 73 Mhash/Joule (obviously not Bitcoin-optimized).

Did Jeff post power consumption numbers somewhere?

[mrb]

No, Jeff did not. However Yifu quoted a very narrow range of 6.6-6.7 Watt per Ghash/s. So presumably he measured this on a real Avalon. I am sure Jeff will confirm soon.

[crazyates]

https://bitcointalk.org/index.php?topic=140539.msg1497042#msg1497042

OP and title need to be corrected: It's closer to 100MH/s/J. It seems that Avalon uses 620w, not the 400W they've been claiming.

[MrTeal]

https://bitcointalk.org/index.php?topic=140539.msg1497042#msg1497042

OP and title need to be corrected: It's closer to 100MH/s/J. It seems that Avalon uses 620w, not the 400W they've been claiming.

Holy. That is not what I was expecting at all. Has Avalon said whether they're using a standard cell or structured ASIC?

[jgarzik]

https://bitcointalk.org/index.php?topic=140539.msg1497042#msg1497042

OP and title need to be corrected: It's closer to 100MH/s/J. It seems that Avalon uses 620w, not the 400W they've been claiming.

See ngzhang's post here before updating.

Consider PSU efficiency etc.

[crazyates]

https://bitcointalk.org/index.php?topic=140539.msg1497042#msg1497042

OP and title need to be corrected: It's closer to 100MH/s/J. It seems that Avalon uses 620w, not the 400W they've been claiming.

See ngzhang's post here before updating.

Consider PSU efficiency etc.

That is taking into account PSU inefficiencies. But that's an excuse for false advertising.

[mrb]

Alright, jgarzik measured 620 Watt at the wall. And taking into account ngzhang information, we determine that the power consumed by the chips is:

(620 (Watt at the wall) * .82 (AC/DC PSU efficiency) - 5 (Watt minimum for the fans)) * .87 (DC/DC PSU efficiency) = 438 Watt

At 66.3 Ghash/s, that is 66300/438 = 151 Mhash/Joule. So this confirms ngzhang's original claim of 6.6-6.7 Watt per Ghash/s for the chips.

[DeathAndTaxes]

Which is just idiotic.  Why is the standard now "at the chip".  We have been measuring MH/J since CPU days and never once has anything been measured "at the chip".  Is the miner going to pay "at the chip" electrical rates?

I mean say Avalon releases a version 3 with even WORSE DC/DC regulator which is only 70% efficient thus making the cost to operate 20%+ higher will that still be viewed as 151 MH/J.  FPGA custom boards were measured at the wall.  Why suddenly the change in metrics now?

[mrb]

I agree that miners should look at the consumption at the wall to calculate their real cost. But the purpose of this thread, my thread, is to compare consumption at the chip level.

And FYI, FPGA board vendors don't talk about power consumption at the wall, but at the 12V level, after the AC/DC PSU.

[jgarzik]

Alright, jgarzik measured 620 Watt at the wall.

At the UPS socket not wall, to be specific.

[E]

One thing to keep in mind while interpreting BFL schedule performance and customer communication about schedule:

(TSMC) has equipped a state-of-the-art supply chain management system that improves both our customers' forecast processes and TSMC's delivery schedule accuracy. In 2009, the Company made 98 percent of scheduled deliveries within one day.

[makomk]

And FYI, FPGA board vendors don't talk about power consumption at the wall, but at the 12V level, after the AC/DC PSU.

BFL's FPGA power consumption figures are at the wall; you can get better-than-quoted power usage by using a more efficient PSU. As far as I know, the only vendors that measure power consumption at the 12V input are the ones which make you supply your own PSU. Icarus had both options and gave both power consumption stats:

After months of work, finally I build a FPGA mining cluster using the board "Icarus".
each board has 2 XC6SLX150 -2FGG484I on it, generates a 380MH/s hashing power. 19.2W (full load working) / 3.4W (idle) power consuming (board input, without fan). here a detail spec table:

Technology: Spartan6 -LX150 -2I (or -3C)
speed (MH/s): 380
$: 569 (1) / 469$ (multiple of 30) (-5$ if you do not need the adapter, recommend for bulk orders, they are heavy)
W: 4.5 for idle / 21 for full load. (notice this is the on wall power, include the adapter losses and fan)

Also, all FPGA vendors which reported board-level power consumption did so for the whole board including power wasted in the onboard DC-DC converters, not the chip power usage as Avalon is doing. It's not like you can really unsolder the chips and put them in your own board with more efficient power circuitry, after all!

[mrb]

Updated OP with ASICMINER's 167 Mhash/J number.

[punin]

Wanna update BFL's numbers too? Latest is ~170MH/J.

[arklan]

Wanna update BFL's numbers too? Latest is ~170MH/J.

yea, when they ship...

[MrTeal]

ASICMINER's auction of a 10.75GH/s blade claims 83W, including the DC/DC conversion. That gives 130MH/J not inclusive of the AC/DC conversion to be compared with Avalon's 151MH/J. The 167MH/J is therefore most likely just the chips, which agrees with Friedcat's claim that just the chips are between 6-8J/GH depending on voltage and clock speed.

That still makes ASICMINER a little more efficient design than Avalon, as 151MH/J * (110/130)^2 is 108MH/J.

[RHA]

Wanna update BFL's numbers too? Latest is ~170MH/J.

yea, when they ship...

The thread title is "shipped efficiency" or "demonstrated efficiency"?
If "shipped", ASICminer hasn't shipped yet as well. Apart of dividends, no one received a unit yet.