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Author Topic: Best demonstrated efficiency: 1290 Mhash/Joule  (Read 20531 times)
mrb (OP)
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April 17, 2013, 07:23:45 PM
 #101

Thanks for the notice guys. Note that all my numbers are at the chip level. I added to the OP:

~230 Mhash/Joule (NOT FINAL) as estimated from BFL's 65nm ASIC prototype. They claim 170 Mhash/Joule at the wall. Both Avalon and Bitfountain/ASICMINER/friedcat lose ~25% of the power in AC/DC and DC/DC conversion and other elements, so if BFL experiences a comparable loss, we can infer 170/.75 = ~230 Mhash/Joule at the chip level.

I will update the thread title once the number is final.
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mrb (OP)
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July 25, 2013, 10:19:48 AM
 #102

Updated best result by bitfury's 55nm chip (1290 Mh/J at chip level!) This is roughly 65x more efficient than BFL's 40nm (Stratix II) FPGA-based Mini-Rig (20 Mh/J)!

Some people said a year ago that such then theoretical improvements would be plain absurd - well bitfury proves them wrong...
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March 17, 2014, 11:55:31 AM
 #103

We just released a rev2 of our chip Smiley It would be nice to have this topic updated with latest info!

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March 22, 2014, 11:30:23 PM
 #104

We just released a rev2 of our chip Smiley It would be nice to have this topic updated with latest info!

Bump. Let's see some updates. Energy efficiency is starting to become a factor in profitability.

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mrb (OP)
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November 26, 2014, 06:40:33 AM
 #105

We just released a rev2 of our chip Smiley It would be nice to have this topic updated with latest info!

Sure, what are your Mhash/Joule numbers?

PS: sorry I have not been monitoring this thread for a while.
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November 26, 2014, 07:16:48 AM
 #106

We just released a rev2 of our chip Smiley It would be nice to have this topic updated with latest info!

Sure, what are your Mhash/Joule numbers?

PS: sorry I have not been monitoring this thread for a while.
Can we have all the numbers also shown as J / GH?
It's a more common measurement these days.

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