 ^ Right from the horse's mouth!  20nm will only start being price competitive in ~2015 and will have hardly any price advantage over 28nm, since there are various manufacturing process constraints which raise the cost a lot. |
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I've just contacted Ukyo about this and asked if he could take over the AMC-TENDER transfer as well.
Ukyo should take his time to code the process correctly, unless you would like the risk of a screw-up? Also, he should not take over the AMC-TENDER transfer, since he does not have access to Ken's email. Why the hurry? If anything, there has been a lot of caution involved in this whole process to make sure everything is done properly and safely. Your shares aren't going to suddenly turn into smoke. |
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The posted information is just the initial information provided by Sam. In the next few days there will be more information posted directly by the Development team. I just talked to Sam and he is setting this up with the developers today.
Thanks! Let me say I am quite eager to see those chip specs!  |
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1. Chip specifications
There are substantial differences in the way the BFL chip is produced. They do employ a standard cell ASIC, while we went for a custom design with a focus on performances, achieved via a complex place & route procedure, which took our team almost one full-immersion month of work to complete.
We do confirm that we're expecting to obtain the initially declared performances with the 130nm round, but we will wait for the ICs to be ready, to better assess the yield quality in terms of chip grades.
2. 130 nm vs. newer technology
While 28nm technology is indeed superior, if fully taken advantage of, the NRE costs are enormously different, and so are the skills needed to design a working chip. We don't have the required resources, and we do not think the results obtainable are worth the costs right now, this is a strategy we will explore in the future.
We are happy with the obtained high performances and low consumptions with 130nm and we will show another breaktru' when the 65nm design is ready.
3. ETA
130nm IC is estimated to be delivered in early September and to be mining 7-10 days later.
65nm IC is still under development and no ETA is available yet.
4. General timeline
The following days we will focus on Q/A session and on the normal activities pertaining to our project.
As per your request of more pictures, here are some images of our test environment, with the WR703N router working as real world interface for the simulated IC running on the fpga.
Please provide detailed chip specs. Remember you are stating that you are able to get chips working at 4.8GH/s on a 130nm node (that's the equivalent of ~17 Avalon chips, which are built on a smaller die size of 110nm), using minimal power. What is the process? Die size? Voltages? Frequency? Etc? I'm sure you already have most of these specs set in stone since you are aiming for an early September delivery. Has the order been done with TSMC already? Please also show a pic/video of the prototype FPGA hashing at 4.8GH/s. Example of detailed chip specs: Avalon chip
Technology Summary:
TSMC 0.11- micron G process
5 Metal
Core Voltage: 1.2 V
I/O Voltage: 3.3 V
Core Frequency: 256+ MHz
Number of Pads: 48
8 Data
40+1 Power
Package Type: QFN48 -0.5 Pitch
Packaged Chip Size: 7 mm x 7 mm
Chip Interface
Data Pins (8 in total):
Clock i
Serial Data In [2] i
Serial Data Out [2] o
Serial Data Bypass [2] o
Reserved [1] -
Chip power efficienty: 6.6W/GHs @ 1.15 V
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If the founders own the other 3million, why are they issued on the exchange at all? The can keep those shares privately held and still earn the dividends form them. With the shares issued on the exchange as they are, the founders could cash out their shares at any point and noone would be any the wiser.
I agree. I guess they haven't realised this, but who knows. It would be nice for them to address this problem. Maybe they could share their btct.co portfolio? |
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Just FYI This company has a BTC forum in Chinese (like Bitcointalk, but much more smaller of course). The address is ( http://bbs.btcman.com/forum.php). The earliest post in that forum posted in late 2012. It also has a BTC exchange in Chinese (like Coinbase, but much more smaller of course). The past 24 hrs trading volume was 1100 coins. The address is ( https://btcsea.com). In other words, this company isn't the kind of team suddenly come to public from nowhere. It has been in this industry for really a while. That's probably why there are some guys threw 500+ coins to buy their shares. I know it needs a lot faith to put your hard earned coins (ok, maybe not that hard) in such a huge IPO with so much uncertainty, especially when the PR here is kind of arrogant and lack of proper communication skill. Also there is significant language barrier. And I really doubt that he care about answering questions from potential investor. The only thing I believe is that this project might turn out to be failure, but its not a scam. Also FYI, I am a shareholder and my opinion above is clearly not independent. I really don't think this is a "scam", there is clearly effort put in the hardware design. What I find hard to believe is the chip performance specs/power consumption. The current ASICs by different manufacturers have shown power efficiency to be heavily correlated to die shrink, especially because of using lower voltages. Respectively, by power efficiency: Bitfury (55nm), BFL (65nm), Asicminer (110nm) and Avalon (110nm). They are doing a 130nm chip, that's all fine (maybe they can get them at extremely low costs) but I expect it to have less power efficiency, not better. Anyone claiming better power efficiency on 130nm really needs to show how they achieved that, since it's anything less than trivial. |
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Update: an video of our FPGA prototype : http://www.btcgarden.com/videos.jsp We had finished this in May although the video was just made 2 hours ago by our engineers at Xi`An BTW : YOUTUBE is blocked in mainland china for a long long time,so all chinese shareholders please wait for a youku version later at btcman ,sry  Here s a pic of it Thanks for the video and the update. But why is it hashing at ~500MH/s now? The pic posted by dxxw makes much more sense to me, as that one is showing ~363MH/s, which is more in-line with your chip specs? Could you also give some more details on the 130nm process you chose to build the chips and final specs? This is very important. You are estimating 1.5W/chip (3.75W/GH) but your chip uses 1.25V@400MH/s (vs 1.2V of an 110nm Avalon for example, and power usage increases by the square of voltage and linearly with frequency, P=C*V^2*f) and I find it intriguing why you need 64 pads if not for extra power? b) ASIC brief introduction
SMIC 0.13um;
Core Voltage: 1.2V;
I/O: Voltage: 3.3V;
Core Frequencey: 400MH/s;( @vdd 1.25V);
Number of Pads; 64;
Package lqfp64;
Avalon chip specs
Technology Summary:
TSMC 0.11- micron G process
5 Metal
Core Voltage: 1.2 V
I/O Voltage: 3.3 V
Core Frequency: 256+ MHz
Number of Pads: 48
8 Data
40+1 Power
Package Type: QFN48 -0.5 Pitch
Packaged Chip Size: 7 mm x 7 mm
Chip Interface
Data Pins (8 in total):
Clock i
Serial Data In [2] i
Serial Data Out [2] o
Serial Data Bypass [2] o
Reserved [1] -
Chip power efficienty: 6.6W/GHs @ 1.15 V
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UPDATE:
I just talked to Sam Noi and he is scheduling a Q/A session with chip developer/designer in the next 1-2 days. I will leave it to Sam to comment here with date/time for a developer to log in and take questions, etc.
Great! Now, can you please comment on the Q4 2013 delivery schedule? |
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Wont tendering all AMC shares put the overall amount of ActiveMining shares well over 25,000,000?
Nope, since all AMC shares in the "AMC-TENDER" account will have to be de-issued first. The final total of ActM shares should be ~9.7M. |
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I did ask several questions (chip specs & chip delivery) around page 7... Yesterday...  Are you talking about that NVidia graphic that people kept reposting? That was responded too - the break-even points listed there were for massive orders of the type NVidia and AMD would be making, ignoring the initial R&D costs, which are lower for smaller feature sizes. People who didn't seem to know much about chip design seemed to be randomly re-posting it with statements like "GIVE US ANSWERS ON THIS!!!!" even though an answer had been given. Those break-even points have nothing to do with orders, they are just showing where the transistor cost allows for savings by migrating to a newer technology. In fact, the current 28nm fab capacity has grown so much, that most 28nm fabs will have to cut on prices to increase demand. I would recommend reading from an informed source, to understand the issue I raised: http://www.eetimes.com/author.asp?section_id=36&doc_id=1286363 |
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It's astonishing how all the important questions are asked after IPO and the security pushed to quadruple...
Anyways, official answers should be really though through at this point, or this could turn into a big Charlie Foxtrot.
I did ask several questions (chip specs & chip delivery) around page 7... Yesterday... |
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The question that needs to be answered most quickly is the expected time for chip delivery. From their TSMC documents, the estimate is in the October to December time-frame. This has a huge weight on profitability calculations. |
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(...) Tech Exhibitiona) Project Milestone i. March 15th: Signed the confidential contract with the IC manufacture and got the library for synthesis and layout. ii. April 10th:RTL design, optimization and simulation were finished. Data to predict the specification of actual chips generated.  (...) What is cgminer mining on here then? Air?  Simulation on what? Judging from the ICA 0 driver used and hashrate it looks like an Asicminer Block Erupter USB...? |
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TheSwede75,
Thanks for the update. Leaving aside the specific hardware questions, can you elaborate on the foundry estimated chip delivery of Q4 2013?
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Just looking for some clarity here, as I understand it, the July 31 deadline for tendering AMC shares is moot, and they are supposedly going to be automatically converted on BitFunder now?
I have a few thousand still in the tender, but after the long wait, haven't put the rest there.
Is my understanding correct?
Yep! Any current AMC shares will be tendered automatically by Ukyo (BitFunder's Admin) and any already sent to Ken will be manually tendered by him, as usual. |
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The biggest quote ever! BFL made some mistakes in their design IMHO. So BFL probably isn't the best product to compare it to. That said, it does look like labcoin is HIGHLY exaggerating what their chip will be capable of doing. Since people will keep using bitcoin miners until they only breakeven, the lowest power consumption will win in the long run and at this point that is looking like go 28nm or go home. Since KNC is a full custom ASIC chip (standard cell) if it works it will have the best power to hash rate efficiency. However, they are rushing it out the door really, really fast with minimal testing, so it could also be a total dud. ActiveMining is using a structured cell ASIC which gives them shorter time to market (within a couple weeks of KNC I think), the advantage here is that they don't need to do as much testing as 98% of the chip is pre-engineered and they can migrate over to a "standard cell" design ~6 months from now since they are working with eASIC, however out of the gate their chip won't be quite as fast or efficient as a standard cell ASIC could be.
Unrelated to the current thread, but just to clarify, eASIC allows for both the structured asic and standard cell to be developed by them in parallel, and this is what ActiveMining is probably going to do: http://www.easic.com/migration-to-cell-based-asic/migration-to-cell-based-asic-simple-design-flow/But let's discuss Labcoin here please. |
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Wow, stable cheap shares on BTC-T. We should make an IRC channel for this.
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(...)
As of July 2013, bitcoin net hashrate is at 200TH, 1000TH is a reasonable estimate at the end of 2013. We will concentrate on deploying our devices for self-mining till we reach 350TH, we expect to reach that milestone around end of the 2013 which will give us 35% occupancy of the whole net. We have already taken a big risk to tapeout our first batch of 200TH directly(without sample chips & prototype) since we have enough confidence on our Layout design. Furthermore, we will order the second batch of 300TH or more immediately after we receive/test pass our first batch. Therefore, to compare with those potential competitors, we could have a very big advantage on production capacity in this year. There are undoubtfully some risks involved with this approach, but the risk/reward ratio is highly favorable if we succeed. All shareholders will then be the main beneficiaries.
(...)
A 200TH order of untested chips, just on "confidence"?  (...) Tech Exhibitiona) Project Milestone i. March 15th: Signed the confidential contract with the IC manufacture and got the library for synthesis and layout. ii. April 10th:RTL design, optimization and simulation were finished. Data to predict the specification of actual chips generated. (...) What is cgminer mining on here then? Air? |
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Since there is a current trend of new 110/130nm appearing everyday saying that 28nm is such a bad deal, I'll just leave this here. http://semimd.com/blog/2013/02/21/foundry-arms-race-under-way/A year ago, chipmakers were reeling from a severe shortage of 28nm foundry capacity, prompting foundries to ramp up their fabs at a staggering pace. At the time, foundries were unable to keep up with huge and unforeseen demand for mobile chips. The shortfall was also caused by low yields and the overall lack of installed 28nm capacity. Today, the 28nm crunch is largely over. The foundries have caught up with the demand and customers no longer are feeling the pinch. And as it turns out, 28nm is a sweet spot for many devices and the technology will remain a long-lasting node. However, the overzealous foundries may have expanded too fast. In fact, there are some signs of a possible foundry glut, and falling fab utilization rates, for 28nm and other processes in 2013. “I don’t see a shortage problem,” said Samuel Wang, an analyst at Gartner. “But overall utilization rates for advanced technologies will go down this year.” Bottom line: there is currently already more supply than demand for manufacturing 28nm chips. |
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Now that the heat is down, can we actually discuss the real stuff? @TheSwede75 As the person in charge of PR/communication at the moment, can you please address the following posts? They are important claims/questions that need to be answered so that possible investors can get a better sense of the potential of your venture. TECHNICAL ASPECTS (needs to be addressed by a dev):If those are the correct specs, then I'm sorry but... LOL!!! For that to be possible, not only each Labcoin core would have to be ~42% smaller [65/130*(6.5^2)/(7.1^2)] than each BFL core but also the Labcoin chip would magically operate at a higher frequency (300MHz vs 250MHz) while keeping the same power draw...  Since there are several new companies going for the 130nm route with the excuse that manufacturing costs are much cheaper, might as well burst that bubble too: It's not. Nothing beats going 28nm now, except for the fact that the upfront NRE cost is much higher. ACTM wait up to six months. . LOL. . . Time is money It is of course up to all investors to draw their own conclusions and believe what they want regarding what density (130, 110, 65, 55 or 28 nm) deliver the best ROI over time. labcoin has made the choice to go with 130 nm as gen 1 and 65 nm as gen 2 for several reasons. Some of these reasons are NRE costs, fabrication costs, available developer resources, capital procurement and availability of Foundry shuttles and production slots. We are certainly not claiming that 28 nm is a "bad choice" by default, but for a smaller project not wanting to be forced to raise millions of dollars and bet "everything" on a single development project or risk total failure (Bitfury did this, and it seems they were lucky enough to actually come out with positive results). Then staying with lesser density that is cheaper and offer far more flexible production options just makes sense. Maybe worth pointing out that the graph you pasted has almost no relation to ANY ASIC manufacturer as it refers to large scale generalized production of IC. As as much as I would like to think that Labcoin shortly will be ordering $100 million dollar IC production runs I doubt that is very closely connected with reality. The only real difference is NRE cost and having the expertise to develop on 28nm, that's the real bet. Bitfury went full-custom standard cell and it worked OK for them, but that's the risk of going full-custom at first. You have the same risk, since your 130nm chip has a lot of sketchy specs. I would rather you commented on those, especially on the part where you claim to develop a faster and more power efficient chip than BFL (also standard cell) with transistors that have DOUBLE the size (130nm vs 65nm) and require much higher voltages ( power consumption scales with the square of voltage). The graph above is for ANY ASIC manufacturer, as it compares a Normalized Transistor Cost (wafer cost + packaging + etc) to a timeline, based on yields/wafer, die sizes and wafer cost. The production costs on new die sizes quickly go down after some time. And you make a valid point, really. The question is timing. Look at BFL and potentially KnC. Avalon and ASICMiner went with the larger die size. ASICMiner deployed en mass first. Avalon shipped their miners first. Sure, go for the 28 nm but if it takes you 2-4 months longer to receive and deploy, do you still have the advantage? Those that chose the larger die have been mining and now have funds for more R & D. Pick your poison.
Indeed, time to market is very important (especially with bigger dies), but their 130nm delivery estimates are on Q4 2013, right where every 28nm chip maker is also going also... The last months of 2013 are going to be pretty interesting indeed. http://labcoin.com/docs/2.jpg |
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