Nope, nothing new, just a PR on their site about that deal.
Yes, it's just vaporware until we hear about a tape-out.  Really out of context. That was the quote I made to HashFast on the 14th August.  For HashFast, Uniquity had already published a signed letter confirming the deal much earlier, so a PR on Uniquity's website carried almost no weight. In this case, this is the first official confirmation from eAsic. |
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Dude, I dumped my ActM Shares for AM what do you not understand?
Dammit, I was trying to help the trolls lower the price so I could get more cheap shares  I actually didn't sell any you gullible fuckheads <3 Appropriate Star Trek image:  |
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Heads up!  |
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Heads up! |
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VBS coming out with the hard facts as always, love it. Can you estimate the W/mm^2 for the eAsic chips, or do we lack enough specs to calculate it? Obviously not. NDA, remember? Although likely their dies will be huge because of their FPGA->ASIC process, so the W/mm 2 should be pretty low. The problem, of course, is that the $/chip will be pretty high. Using as reference the Nextreme-2 N2X740 (largest number of eCells), on a FC672 (27×27mm) package and Ken's GH/s/W quoted on the pcie cards on the website, let's say 12.5W per chip. 12.5/(27*27) = 0.0171W/mm2, 42% less than one Avalon chip. $/chip is a fallacy, as it's $/GH/s that matters, not $/chip. The issue is that while a 28nm wafer cost is higher than for older tech,  the actual price per transistor (x'tor) is lower, since each wafer can now hold much more (smaller!) transistors:  Even in eAsic's website you can see that the price on their Nextreme product line keeps decreasing with volume, at 300-900k units the price per unit is already ~25% lower than initial.  |
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You left heat dissipation out of all your math. Most of these designs will require cooling solutions that are much more expensive than the price of the chip itself. ActM's chips at <15W will only require something like this per chip:  That's nice. Of course, Bitfury chips don't require any cooling at all. If Labcoin chips need individual cooling they can also use a shared heatsink like the ones used in Avalon systems. They'll be the same design with the heat pad on the bottom. Bitfury chips require cooling to operate at acceptable levels, you can check their thread for info on that, for example, https://bitcointalk.org/index.php?topic=228677.msg2974755#msg2974755 and https://bitcointalk.org/index.php?topic=228677.660 or https://bitcointalk.org/index.php?topic=228677.msg3067513#msg3067513Labcoin chips have very different heat dissipation requirements than Avalon chips. Avalon chips at 300MH/s would dissipate 1.98W in a 7x7mm area, i.e., 1.98/(7*7) = 0.0404 W/mm^2, while Labcoin chips need 12.8/(6.5*6.5) = 0.3030 W/mm^2. This means that a Labcoin chip needs a cooling solution that is 7.5x more efficient in removing heat than one for an Avalon chip. |
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If we assume the network hash rate is at 1 PH/s by beginning of November,
Anyone entering into a debate on projections with this creep is only helping him plan his strategic attack on the ACtM share price. If you hold ACtM shares and chat to this guy you are as good as burning your own money. Actually, if they would have took my advice when I first offered it, they would be significantly better off now because ActM has decreased in price and LC has increased since then. Those who ignored my advice are the ones who have burned their own money. Yup. It's kind of amazing, arguing that simply engaging in an open discussion will bring down the price pretty much proves he knows the argument against ActM airtight. Anyway, here's some math. Labcoin's chip are each supposed to be about 2-2.5Gh/s (based on their 2,000 chips, 4-5Th estimates) They're 6.5x6.5mm. HashFast's chips are supposed to be 400Gh/s at 19x19mm. So, HashFast's chips are about 8 the area, and 21x the feature density. So, the HashFast chip should have about 179 times as many 'features'. And it's supposedly about 200 times as fast. So, not counting the transistor switch time, the numbers actually add up pretty closely. Now, let's look at the ActiveMining chip. Supposedly, it's only 20Gh/s. 1/20th as fast as HashFast's. In order to be as space efficient, it would need to be about 4.24x4.24mm. Which is pretty small. Of course, we don't know how big the die actually is, that's all under NDA, of course. But if it's much bigger then 4.24mm then it's not going to be cost competitive with HashFast/Cointerra's designs. You left heat dissipation out of all your math. Most of these designs will require cooling solutions that are much more expensive than the price of the chip itself. ActM's chips at <15W will only require something like this per chip: |
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Mabsy, you can't seriously still be trying to talk about ActM on the Labcoin thread, right? Because this is clearly not the place to have that conversation. Please show some respect to the conversation at hand and talk about the appropriate security in the appropriate thread.
You quoted VBS, an ActM board member, highlighting that Labcoin hasn't shown working chips to anyone. I'm just highlighting that VBS is obviously biased and his example applies even more so to ActM given that they won't even have samples till early-mid October at the earliest. Why are you bringing ActM here? That's a whole different discussion. I would most certainly shut up before asking eAsic's engineers to prove their expertise.  The issue here is that the Labcoin devs are still proving their engineering skills, so showing comprehensive chip simulation results with as much data as possible is a must to instill confidence. |
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These chips are not going to be that hard to simulate. The design should be pretty simple. Every ASIC released to date has been worse than simulation. BFL, Avalon, ASICMiner, and Bitfury. Some by small amounts and some (BFL cough cough) not even in the right ballpark. Lots of smart people on lots of teams all ended up high on clockrate and low on power consumption. Even KNC designed their boards to handle 320W despite the nominal power consumption being 250W because it isn't that easy to simulate power consumption. Those DC to DC supplies aren't cheap and the overengineering adds $50+ to the cost of each board ($200 for a Jupiter). Nobody spends $200 extra per unit without a reason. The reason is that accurately simulating power consumption has proven to be very difficult. When you consider that 2.7 J/GH is less than half of what either Avalon's (6.6 J/GH) or ASICMiner's (6.9 J/GH) final silicon ended up using it shows there might be some risk to their simulation being too optimistic. I've asked several times for their final simulation results with 16 miners per chip, but didn't find any? Anyone knows if they showed those? All that I've found is the figures for 1 core multiplied by 16 (hashrate, power, area). This is like... |
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This isn't an endorsement but I think you are worried about the wrong thing.
Bitcoin is an "embarrassingly parallel" problem (google it). The specs you cited contained no die size. Even if there was no change in the hashing engine design, the 180nm design could have consisted of 1 hashing engine per chip (@ 250 MH/s nominal) and the 130nm design consist of 16 hashing engines (16*250MH/s nominal) per chip. Obviously the die size would be 8x larger (16*(130/180)^2) and use more power but without more details like die size, estimate marginal cost, and power consumption of both the 180nm & 130nm it is not possible to draw any conclusions on the realism of the specs.
They've simulated one thing and then chose to manufacture another.  (...) 2) Post simulations yielded positive results on a 130nm, 300Mhz, Power 0.8W, 6.5x6.5mm design. The team is working on HDL optimizations to get 16 cores for chip. Some math, quoted from the tech team "300M*16=4.8G, 0.8*16=12.8W, Area=130,0000*16=2080,0000, make the utilization ratio to 50%, the chip size will be about 4160,0000um2, about 6.5mm x 6.5mm"
"Power consumption per GHash is 12.8W/4.8G=2.7W/GHash"
"Estimated selling price for chip, 8-9 USD"
(...) |
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I guess its fair to say that I'm a bit nervous about Labcoin; a result of having a lot invested and not getting any of the fundamental questions answered.. Did anyone figure out an explanation/theory to the following already? Quoting from the somewhat dated http://www.labcoin.com/presentation.html page, the initial road map was to have a 180nm chip with estimated ~250Mhash performance ready in August/September, and their second generation chip of 65nm at estimated 4-5 ghash at a later date... And from that they went to 130nm but with the same hash speed they targeted for the second generation chip? I guess my gut feeling tells me that the chips will not perform even close to the 4ghash performance announced, however, it might still be profitable.. just not as profitable as projected.. The technology, version 1
Specifications:
Feature size : 180nm
Core voltage : 1.8V
I/O voltage : 3.3V
Core Frequency: 250 Mhz - vdd 1.8~1.85V
Number of Pads : 44
Package : LQFP or equivalent
Chip size : 5mm x 5mm
Power consumption (variable) : 1.4~1.8W
Hashing power (variable): 220~280 MH/second
I/O interface : USB / Serial
Estimated tape-out : Within the first half of July
The technology, version 2
Specifications:
Feature size : 65nm
Core voltage : n/a
I/O voltage : n/a
Core Frequency: n/a
Number of Pads : n/a
Package : n/a
Chip size : n/a
Power consumption (variable) : n/a
Hashing power (variable): estimated 4~5 GH/second
I/O interface : USB / Serial
Estimated tape-out : n/a
That's an easy one! Just simulate for 300MH/s and then multiply everything by 16 and you're done, since it all scales flawlessly! Today we have a very important update, the Chinese team is simulating a lot of design simultaneously and worked almost non-stop for the last 48 hours targeting different process sizes. The results are more than positive, i will try to outline them in the clearest way possible. 1) The 65nm 500Mhz is still undergoing post-verification phase, while another simulation is ongoing at 600Mhz and we're waiting for the results. 2) Post simulations yielded positive results on a 130nm, 300Mhz, Power 0.8W, 6.5x6.5mm design. The team is working on HDL optimizations to get 16 cores for chip. Some math, quoted from the tech team "300M*16=4.8G, 0.8*16=12.8W, Area=130,0000*16=2080,0000, make the utilization ratio to 50%, the chip size will be about 4160,0000um2, about 6.5mm x 6.5mm"
"Power consumption per GHash is 12.8W/4.8G=2.7W/GHash"
"Estimated selling price for chip, 8-9 USD"
What does this mean ? i think it's not hard to get. 130nm process and 5GH speed at slightly higher power consumption, but competitive prices. Shoot any question guys Sam Labcoin team Power usage scaling linearly... Love it!  |
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If hashing power means crap, then why are you investing in a company that produces hashing power? Why would people buy chips if hashing power means nothing?
Also, in order to sell chips, you actually have to have chips to sell. So, how many chips do you think are likely to be had from the sample batch in November? How many from low volume production in December?
Meanwhile LC will have been hashing with 4 TH/s from the 10th September at the latest and increasing that to 50 TH/s in October. You can mock that hashing power as being meaningless as much as you want, but it'll represent at least 5% of the network hash rate. If ActM had any chance of paying meaningful divs before December, you'd be singing a different tune.
Mindlessly buying hashing power is a sure-fire way to lose money. Just ask anyone that paid BTC1.99 for a block erupter. Again, you are just speculating on the dates. ActM may also have it's high-volume process already at 100% in December, depending on NRE pay date. LC is a whole different gamble than ActM. Have you even seen a working LC chip yet? I haven't. They are receiving untested chips and untested PCB's, relying 100% on "simulation" results. How nice. They've designed a chip using a sea-of-gates methodology similar to what BitFury did. BitFury even "simulated" their chip to reach 10GH/s! You might wanna go find out what it actually ended up working at! |
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I'm not talking about Avalon chips, I'm talking about the 28nm chips. Samples from them will arrive around the beginning of November. Low volume production will start around the beginning of December and normal volume production will start around the beginning of February.
Until ActM get those samples in November, they're stuck at 430 Gh/s and have no mining hardware to sell apart from the 6 Avalons producing that 430 Gh/s. So, where exactly is this 50K/month going to be coming from when they don't have any ASIC yet and won't have any significant quantity till December?
No, you are just (wrongly) speculating on the dates. See post #2 on this thread. |
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Perhaps one of you lunatics can explain something? Why do you think ActM is worth more than 0.001 BTC while LC is worth less than 0.01 BTC and will have 10x the hashing power within the next week?
Because hashing power means crap in a scenario where diff rises at ~1.7%/day, like we have currently. In 60 days LC's hashrate will be worth ~1/(1.017^60) = ~36% of what it's worth today. Chip sales revenue will beat any of that, especially efficient 28nm chips. |
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28 nm isn't a magical thing.
If your chip is a copy-paste of a FPGA, it's not going to be very good, 28 nm or not.
For example, BitFury's chips, at 55 nm, might be better.
And then there's the cost of production.
Vbs mentions that eAsic's 28 nm is "mature". Yet no one claimed it isn't. Classical fallacy: criticize what isn't the opinion of your opponents, to appear right.
BitFury's 3GH chip at 55nm is going to outperform ActM's 28nm eAsic chip? keep dreaming kiddo I wouldn't be so sure about that. My (little) understanding of eASIC tech, and the reason why ActM went for eASIC was fast build (to production) of the ASIC chip, be cheaper and more efficient than FPGA. Its as if eASIC has has 'APIs' built to go from requirements to build fast, unlike full custom. This means they would lack in other areas, such as performance and power usage compared to full custom. To me its eASIC is like .net or Java, vs full custom which is like C or assembler. You have to take into consideration that they didn't grow 980% in 2012 out of speculation. Their process is very real and is efficient "enough" to have heavy tech partners wanting to do chips with them. If any of those weren't satisfied they would have jumped ship a long time ago. It's a semi-custom process more like "C vs ASM" and they are already on their 3rd chip design revision (Nextreme-3@28nm) with several patents on their process. |
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So you have nothing to say but "lol" to valid concerns? And you're supposed to be the knowledgeable guy of this thread?  You didn't raise any "valid concern" that wasn't already replied before extensively.  |
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28 nm isn't a magical thing.
If your chip is a copy-paste of a FPGA, it's not going to be very good, 28 nm or not.
For example, BitFury's chips, at 55 nm, might be better.
And then there's the cost of production.
Vbs mentions that eAsic's 28 nm is "mature". Yet no one claimed it isn't. Classical fallacy: criticize what isn't the opinion of your opponents, to appear right.
Copy/paste of an FPGA? LOL! You should try to understand first how are ASICs designed! Sure, eAsic doesn't want to disclose much about it's 28nm technology. Probably because it's not very mature. For all we know, it might not work that well yet.
But whatever. The NDA shouldn't prevent anyone from talking about PCBs, pin-outs for the chip, packaging, facilities, and all the other thing that are going to be needed to get these systems up and hashing.
I see that after a week out the thread didn't move much! eAsic's 28nm not very mature? Lol! eAsic has been working on 28nm at least since 2010. Also, Seagate just announced their investment with them on the 28nm tech, but of course, what would Seagate know, right? Classical reading comprehension fail. |
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Sure, eAsic doesn't want to disclose much about it's 28nm technology. Probably because it's not very mature. For all we know, it might not work that well yet.
But whatever. The NDA shouldn't prevent anyone from talking about PCBs, pin-outs for the chip, packaging, facilities, and all the other thing that are going to be needed to get these systems up and hashing.
I see that after a week out the thread didn't move much! eAsic's 28nm not very mature? Lol! eAsic has been working on 28nm at least since 2010. Also, Seagate just announced their investment with them on the 28nm tech, but of course, what would Seagate know, right? |
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one point (although it might be a perceived one) that icebreaker makes is that it is probably worth it for ActiveMining to scrap the avalon clone assembly and take those chips/materials/clones and sell them sooner than later. ActiveMining might actually be able to sell them for a profit (or hopefully break even at least). and then not have the infrastructure costs (racks, power, etc) to have to cover for those machines, nor have to deal with the rising difficulty that reduces any payout these will give. even if that means that the dividends wont go up, if you are indeed in this long-term then the short-term dividend increase is LITERALLY pennies, and when compared to either reinvesting that capital elsewhere or returning it to shareholders seems to be unwise. it would seem that would be a strategy/idea to at least discuss and/or put up to shareholder vote. if we all believe in the long-term viability of ActiveMining then it will come from it's own chips, not some old technology that prob wont have an ROI.
I think you're right. From my perspective, the Avalon chips already served their purpose. They provided legitimacy for AMC while Ken raised the $1mil. Having them on order and plans in place to put them online showed investors that he's already got stuff happening. But at this point, if we can just flip 'em for a good price and avoid all the extra costs/work that come with bringing them online, I think that could be a totally viable strategy. This is a decision to be made when the chips arrive and the machines are being assembled, so that their ROI can be calculated with much less error than today. |
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