Custom RAM Timings for GPU's with GDDR5 - DOWNLOAD LINKS - UPDATED

[Zorg33]

We are curious about your results

I didnt have time in the past few days to continue experimenting, but hopefuly at the weekend.

[1714635280]

1714635280

[1714635280]

1714635280

[maxmad_x]

Code:

$ ./strap -c trc:60 -c trcdw:13 -c trcdwa:13 -c trrd:5 -c tcl:20 -c tr2w:28 -c tw2r:15 -c trfc:145 -c trprda:11 -c trpwra:46
  REGISTER        KEY    VALUE NEWVALUE
       RAS        trc       61       60
       RAS      trcdr       20       20
       RAS     trcdra       20       20
       RAS      trcdw       14       13
       RAS     trcdwa       14       13
       RAS       trrd        6        5
       RAS    unused1        0        0
       CAS        tcl       18       20
       CAS      tnopr        0        0
       CAS      tnopw        0        0
       CAS       tr2r        5        5
       CAS       tr2w       25       28
       CAS       tw2r       17       15
       CAS    unused1        2        2
       CAS    unused2        0        0
       CAS    unused3        0        0
      MISC       trfc      148      145
      MISC        trp        9        9
      MISC     trprda       11       11
      MISC     trpwra       48       46
      MISC    unused1        0        0
      MISC    unused2        1        1
      MISC    unused3        0        0
Old Strap => 777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A002003120150F292F94273116
New Strap => 777000000000000022339D00AD515A3CC0550F142ECB1409004AE600740114206A8900A002003120150F292F94273116

What could possibly go wrong!   

shouldn't we be decreasing tcl to make it tighter?

[dallase]

We are curious about your results

I didnt have time in the past few days to continue experimenting, but hopefuly at the weekend.

Only real test I've done so far is running eth+dcr under the regular 1500 straps then under the modded 1500 straps.

1101/1921/1500str => 27.03 eth
1101/1921/1500mod => 27.19 eth

Just a bit better.

[dallase]

Code:

$ ./strap -c trc:60 -c trcdw:13 -c trcdwa:13 -c trrd:5 -c tcl:20 -c tr2w:28 -c tw2r:15 -c trfc:145 -c trprda:11 -c trpwra:46
  REGISTER        KEY    VALUE NEWVALUE
       RAS        trc       61       60
       RAS      trcdr       20       20
       RAS     trcdra       20       20
       RAS      trcdw       14       13
       RAS     trcdwa       14       13
       RAS       trrd        6        5
       RAS    unused1        0        0
       CAS        tcl       18       20
       CAS      tnopr        0        0
       CAS      tnopw        0        0
       CAS       tr2r        5        5
       CAS       tr2w       25       28
       CAS       tw2r       17       15
       CAS    unused1        2        2
       CAS    unused2        0        0
       CAS    unused3        0        0
      MISC       trfc      148      145
      MISC        trp        9        9
      MISC     trprda       11       11
      MISC     trpwra       48       46
      MISC    unused1        0        0
      MISC    unused2        1        1
      MISC    unused3        0        0
Old Strap => 777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A002003120150F292F94273116
New Strap => 777000000000000022339D00AD515A3CC0550F142ECB1409004AE600740114206A8900A002003120150F292F94273116

What could possibly go wrong!  

shouldn't we be decreasing tcl to make it tighter?

I know this is not apples to apples because I'm looking at a 1750mhz strap from a 470 vs a 480, but you'll see higher tCL on both boysie's and heliox's 480 mods...

Code:

----------------------------------------------------------------------------------------------------
Strap (CAS)                   tcl    tnopr    tnopw     tr2r     tr2w     tw2r 
----------------------------------------------------------------------------------------------------
480-boysie2000                 21        0        0        5       29       15 
480-heliox2000                 22        0        0        5       29       16 
MSI-470-Hynix-Stock-1750       19        0        0        5       25       19 
----------------------------------------------------------------------------------------------------

So, thats what I was basing it off of.

If someone has the strap tables handy from a rx480, I'll be happy to re-run the numbers.

[maxmad_x]

Code:

$ ./strap -c trc:60 -c trcdw:13 -c trcdwa:13 -c trrd:5 -c tcl:20 -c tr2w:28 -c tw2r:15 -c trfc:145 -c trprda:11 -c trpwra:46
  REGISTER        KEY    VALUE NEWVALUE
       RAS        trc       61       60
       RAS      trcdr       20       20
       RAS     trcdra       20       20
       RAS      trcdw       14       13
       RAS     trcdwa       14       13
       RAS       trrd        6        5
       RAS    unused1        0        0
       CAS        tcl       18       20
       CAS      tnopr        0        0
       CAS      tnopw        0        0
       CAS       tr2r        5        5
       CAS       tr2w       25       28
       CAS       tw2r       17       15
       CAS    unused1        2        2
       CAS    unused2        0        0
       CAS    unused3        0        0
      MISC       trfc      148      145
      MISC        trp        9        9
      MISC     trprda       11       11
      MISC     trpwra       48       46
      MISC    unused1        0        0
      MISC    unused2        1        1
      MISC    unused3        0        0
Old Strap => 777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A002003120150F292F94273116
New Strap => 777000000000000022339D00AD515A3CC0550F142ECB1409004AE600740114206A8900A002003120150F292F94273116

What could possibly go wrong!  

shouldn't we be decreasing tcl to make it tighter?

I know this is not apples to apples because I'm looking at a 1750mhz strap from a 470 vs a 480, but you'll see higher tCL on both boysie's and heliox's 480 mods...

Code:

----------------------------------------------------------------------------------------------------
Strap (CAS)                   tcl    tnopr    tnopw     tr2r     tr2w     tw2r 
----------------------------------------------------------------------------------------------------
480-boysie2000                 21        0        0        5       29       15 
480-heliox2000                 22        0        0        5       29       16 
MSI-470-Hynix-Stock-1750       19        0        0        5       25       19 
----------------------------------------------------------------------------------------------------

So, thats what I was basing it off of.

If someone has the strap tables handy from a rx480, I'll be happy to re-run the numbers.

Currently RX480s get > 30mh when we use straps from 1625 or 1500. Latency on those are 15-16 as I remember. Without changing anything if you can get tcl down to 16 and tighten the timings that are based on tcl+some other timeing tightened by 3-4 clock rounds. That should give you mininal change rom. Just tcl and some other dependent timings changed. Everything else stays the same. That can be a quick test

[dallase]

Code:

$ ./strap -c trc:60 -c trcdw:13 -c trcdwa:13 -c trrd:5 -c tcl:20 -c tr2w:28 -c tw2r:15 -c trfc:145 -c trprda:11 -c trpwra:46
  REGISTER        KEY    VALUE NEWVALUE
       RAS        trc       61       60
       RAS      trcdr       20       20
       RAS     trcdra       20       20
       RAS      trcdw       14       13
       RAS     trcdwa       14       13
       RAS       trrd        6        5
       RAS    unused1        0        0
       CAS        tcl       18       20
       CAS      tnopr        0        0
       CAS      tnopw        0        0
       CAS       tr2r        5        5
       CAS       tr2w       25       28
       CAS       tw2r       17       15
       CAS    unused1        2        2
       CAS    unused2        0        0
       CAS    unused3        0        0
      MISC       trfc      148      145
      MISC        trp        9        9
      MISC     trprda       11       11
      MISC     trpwra       48       46
      MISC    unused1        0        0
      MISC    unused2        1        1
      MISC    unused3        0        0
Old Strap => 777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A002003120150F292F94273116
New Strap => 777000000000000022339D00AD515A3CC0550F142ECB1409004AE600740114206A8900A002003120150F292F94273116

What could possibly go wrong!  

shouldn't we be decreasing tcl to make it tighter?

I know this is not apples to apples because I'm looking at a 1750mhz strap from a 470 vs a 480, but you'll see higher tCL on both boysie's and heliox's 480 mods...

Code:

----------------------------------------------------------------------------------------------------
Strap (CAS)                   tcl    tnopr    tnopw     tr2r     tr2w     tw2r 
----------------------------------------------------------------------------------------------------
480-boysie2000                 21        0        0        5       29       15 
480-heliox2000                 22        0        0        5       29       16 
MSI-470-Hynix-Stock-1750       19        0        0        5       25       19 
----------------------------------------------------------------------------------------------------

So, thats what I was basing it off of.

If someone has the strap tables handy from a rx480, I'll be happy to re-run the numbers.

Currently RX480s get > 30mh when we use straps from 1625 or 1500. Latency on those are 15-16 as I remember. Without changing anything if you can get tcl down to 16 and tighten the timings that are based on tcl+some other timeing tightened by 3-4 clock rounds. That should give you mininal change rom. Just tcl and some other dependent timings changed. Everything else stays the same. That can be a quick test

Ok, well I'll test these later.. time for some high school basketball.

[zigun]

Standard 1375 MHz strap for Hynix in RX470 4Gb
77 70 00 00 00 00 00 00 22 33 9D 00 CE CD 59 39 80 55 11 11 AE 8A 84 08 00 48 C6 00 6C 00 14 20 6A 89 00 A0 02 00 31 20 14 0F 26 2B 88 25 2F 15 A4 2C 02 01

SEQ_RAS [14 14 19 19 5 57] right?

[anatolikostis]

If someone has the strap tables handy from a rx480, I'll be happy to re-run the numbers.

Here`re you go  

480/8 Samsung K4G80325FB

1376-1500
555000000000000022CC1C00AD595B41C0570E14B00B450A0068C70003011420FA8900A00300000 0170E2B34A42A3116
1501-1625
555000000000000022CC1C00CE616C47D0570F15B48C250B006AE7000B031420FA8900A00300000 0190F2F39B22D3517
1626-1750
777000000000000022CC1C00106A6D4DD0571016B90D060C006AE70014051420FA8900A00300000 01B11333DC0303A17
1751-2000
777000000000000022CC1C0031F67E57F05711183FCFB60D006C070124081420FA8900A00300000 01E123A46DB354019

480/4 Hynix H5GC4H24AJR

1426-1500
777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A00200312 0150F292F94273116
1501-1625
999000000000000022559D0010DE7B4480551312B78C450A004C0601750414206A8900A00200312 018112D34A42A3816
1626-1750
999000000000000022559D0031627C489055131339CDD50A004C06017D0514206A8900A00200312 019123037AD2C3A17
1751-2000
BBB000000000000022889D0073EE8D53805515133ECF560C004E26017E0514206A8900A00200312 01C143840C5303F17

480/4 Micron!!! EDW4032BABG Yes, It`s MICRON (not ELPIDA), just read the datasheet  

1426-1500
777000000000000022AA1C00315A6B3CA0550F15B68C1506006AE4007C041420CA8980A9020004C 01712262B612B3715
1501-1625
777000000000000022AA1C0073627C41B0551016BA0D9606006C060104061420EA8940AA030004C 01914292E692E3B16
1626-1750
777000000000000022AA1C00B56A7D46C0551017BE8E1607006C07010C081420FA8900AB030004C 01B162C3171313F17
1751-2000
999000000000000022AA1C0018F77E4FD055121946501708006C07011D0C1420FA8980AC030004C 01E19323781364718

480/4 Samsung K4G41325FE

1426-1500
555000000000000022CC1C00AD515A3EC0570E142D4A64080048C700030114207A8900A00300000 0150E2A3186272E16
1501-1625
555000000000000022CC1C00CE596B44D0570F1531CB2409004AE7000B0314207A8900A00300000 0170F2E36922A3217
1626-1750
777000000000000022CC1C0010626C49D0571016B50BD509004AE700140514207A8900A00300000 0191131399D2C3617
1751-1900
777000000000000022CC1C00106A7D4FE0571117B98CA50A004C07011C0714207A8900A00300000 01B11353FAA2F3A18
1901-2000
777000000000000022CC1C0031EE7D53F05711183BCD350B004C0701240814207A8900A00300000 01C123842B3313C19

[maxmad_x]

There were whitespaces in the post above so I edited and removed all the white space. Here are the clean straps

480/8Samsung K4G80325FB
1376-1500
555000000000000022CC1C00AD595B41C0570E14B00B450A0068C70003011420FA8900A00300000 0170E2B34A42A3116
1501-1625
555000000000000022CC1C00CE616C47D0570F15B48C250B006AE7000B031420FA8900A00300000 0190F2F39B22D3517
1626-1750
777000000000000022CC1C00106A6D4DD0571016B90D060C006AE70014051420FA8900A00300000 01B11333DC0303A17
1751-2000
777000000000000022CC1C0031F67E57F05711183FCFB60D006C070124081420FA8900A00300000 01E123A46DB354019

480/4Hynix H5GC4H24AJR
1426-1500
777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A00200312 0150F292F94273116
1501-1625
999000000000000022559D0010DE7B4480551312B78C450A004C0601750414206A8900A00200312 018112D34A42A3816
1626-1750
999000000000000022559D0031627C489055131339CDD50A004C06017D0514206A8900A00200312 019123037AD2C3A17
1751-2000
BBB000000000000022889D0073EE8D53805515133ECF560C004E26017E0514206A8900A00200312 01C143840C5303F17

480/4Micron!!!EDW4032BABGYes,It`sMICRON(notELPIDA),justreadthedatasheetGrin
1426-1500
777000000000000022AA1C00315A6B3CA0550F15B68C1506006AE4007C041420CA8980A9020004C 01712262B612B3715
1501-1625
777000000000000022AA1C0073627C41B0551016BA0D9606006C060104061420EA8940AA030004C 01914292E692E3B16
1626-1750
777000000000000022AA1C00B56A7D46C0551017BE8E1607006C07010C081420FA8900AB030004C 01B162C3171313F17
1751-2000
999000000000000022AA1C0018F77E4FD055121946501708006C07011D0C1420FA8980AC030004C 01E19323781364718

480/4Samsung K4G41325FE
1426-1500
555000000000000022CC1C00AD515A3EC0570E142D4A64080048C700030114207A8900A00300000 0150E2A3186272E16
1501-1625
555000000000000022CC1C00CE596B44D0570F1531CB2409004AE7000B0314207A8900A00300000 0170F2E36922A3217
1626-1750
777000000000000022CC1C0010626C49D0571016B50BD509004AE700140514207A8900A00300000 0191131399D2C3617
1751-1900
777000000000000022CC1C00106A7D4FE0571117B98CA50A004C07011C0714207A8900A00300000 01B11353FAA2F3A18
1901-2000
777000000000000022CC1C0031EE7D53F05711183BCD350B004C0701240814207A8900A00300000 01C123842B3313C19

[dallase]

Standard 1375 MHz strap for Hynix in RX470 4Gb
77 70 00 00 00 00 00 00 22 33 9D 00 CE CD 59 39 80 55 11 11 AE 8A 84 08 00 48 C6 00 6C 00 14 20 6A 89 00 A0 02 00 31 20 14 0F 26 2B 88 25 2F 15 A4 2C 02 01

SEQ_RAS [14 14 19 19 5 57] right?

yes

[niko2004x]

Question.
Here is the strap table for Hynix H5GC4H24AJR (according to amdmeminfo) in stock r9 390:

Code:

400  555133200000000084941212f0540b07150973020020410022dd1c081b0414209a8800a00000012006050d0e270f160e
800  7771332000000000e7ac352210550d0a208ef5040024810022dd1c08340914209a8800a0000001200c08171b4f172110
900  77713320000000002931462620550e0b220f96050026a20022dd1c083c0a1420aa8800a0000001200d0a1a1d59192311
1000 777133200000000029b5462930550e0c249026060026a20022dd1c08440b1420aa8800a0000001200e0a1c20621b2511
1125 77713320000000006bbd572f40550f0d2892f7060048c50022ff1c084c0d14205a8900a000000120100c20246f1e2912
1250 77713320000000008cc5583460550f0f2c94b8070048c50022ff1c085c0f14205a8900a000000120120d23287b222d13
1375 7771332000000000cecd5939805511112e1589080048c60022339d086c0014206a8900a002000120140f262b88252f15
1425 7771332000000000ce516a3b805511112f96d908004ae60022339d086c0014206a8900a002000120150f272d8d263015
1500 7771332000000000ce516a3d9055111230964909004ae60022339d08740114206a8900a002000120150f292f94273116
1625 999133200000000010de7b448055131237194b0a004c060122559d08750414206a8900a00200012018112d34a42a3816
1750 999133200000000031627c4890551313399adb0a004c060122559d087d0514206a8900a00200012019123037ad2c3a17
2000 bbb133200000000073ee8d53805515133e9e5d0c004e260122889d087e0514206a8900a0020001201c143840c5303f17

Why does it looks so different from Hynix H5GC4H24AJR in rx 480/470?

[zigun]

Question.
Here is the strap table for Hynix H5GC4H24AJR (according to amdmeminfo) in stock r9 390:

Code:

400  555133200000000084941212f0540b07150973020020410022dd1c081b0414209a8800a00000012006050d0e270f160e
800  7771332000000000e7ac352210550d0a208ef5040024810022dd1c08340914209a8800a0000001200c08171b4f172110
900  77713320000000002931462620550e0b220f96050026a20022dd1c083c0a1420aa8800a0000001200d0a1a1d59192311
1000 777133200000000029b5462930550e0c249026060026a20022dd1c08440b1420aa8800a0000001200e0a1c20621b2511
1125 77713320000000006bbd572f40550f0d2892f7060048c50022ff1c084c0d14205a8900a000000120100c20246f1e2912
1250 77713320000000008cc5583460550f0f2c94b8070048c50022ff1c085c0f14205a8900a000000120120d23287b222d13
1375 7771332000000000cecd5939805511112e1589080048c60022339d086c0014206a8900a002000120140f262b88252f15
1425 7771332000000000ce516a3b805511112f96d908004ae60022339d086c0014206a8900a002000120150f272d8d263015
1500 7771332000000000ce516a3d9055111230964909004ae60022339d08740114206a8900a002000120150f292f94273116
1625 999133200000000010de7b448055131237194b0a004c060122559d08750414206a8900a00200012018112d34a42a3816
1750 999133200000000031627c4890551313399adb0a004c060122559d087d0514206a8900a00200012019123037ad2c3a17
2000 bbb133200000000073ee8d53805515133e9e5d0c004e260122889d087e0514206a8900a0020001201c143840c5303f17

Why does it looks so different from Hynix H5GC4H24AJR in rx 480/470?

RAS and CAS timings the same, MISC differ

[anatolikostis]

Question.
Here is the strap table for Hynix H5GC4H24AJR (according to amdmeminfo) in stock r9 390:
Why does it looks so different from Hynix H5GC4H24AJR in rx 480/470?

It`s because of memory banks has several revisions - 0.2ns/0.25ns/0.28ns/0.3ns/etc.

[niko2004x]

RAS and CAS timings the same, MISC differ

They are exactly the same (RAS, CAS, MISC but not entire strap), just encoded differently for MISC
(current info in this thread about decoding MISC for RX seems partially wrong) and of course different offsets.
But why?

[kemo6600]

We are curious about your results

I didnt have time in the past few days to continue experimenting, but hopefuly at the weekend.

Only real test I've done so far is running eth+dcr under the regular 1500 straps then under the modded 1500 straps.

1101/1921/1500str => 27.03 eth
1101/1921/1500mod => 27.19 eth

Just a bit better.

Maybe  you should use less tight timings to clock above 2000 mhz?

[philipma1957]

Share please good straps for 290x elpida bbbg. On zec have 337 H/s, 1050/1500 mHz.

Thread is for technical details, not begging.

How about this set of tech details

msi 470 4gb with hynix ram

xmr rom  for max  h per  watts.

I can sit down and learn to do a custom rom.

  but  I simply want  details like what is best result  on the msi rx 470 watt per hash.

So I can decide if it is worth my time to do it myself.

What I never see is   watts per card per h .

I have no need to do anything but under clock + under volt

Basically I want to know  what would a msi rx 470 4gb gaming gpu will burn in watts at 500 h    not what it burns  when mining at 650h   or 700h

 I read all the info on  overclock and undervolt.

 I want  info on underclock and undervolt.  

I know what I can do with  manual settings  and I can do

500h  550h 600h and 650h  all manually with not much effort

so  what does an msi rx 470 do with a custom xmr mod?

I have 28 rx msi 470's  doing xmr    They run at about 500h with stock rom and a simple under clock at simplemining.net
I can alter the underclock to an overclock.
I can run with windows but frankly  is it worth it to me to spend the time to do a better rom tweaked for low volts and under clock?

[dallase]

We are curious about your results

I didnt have time in the past few days to continue experimenting, but hopefuly at the weekend.

Only real test I've done so far is running eth+dcr under the regular 1500 straps then under the modded 1500 straps.

1101/1921/1500str => 27.03 eth
1101/1921/1500mod => 27.19 eth

Just a bit better.

Maybe  you should use less tight timings to clock above 2000 mhz?

Well, that is eth+dcr, so 27.19mh eth and 405mh dcr.

I have to keep my 470's in the 1925-1945 range, otherwise, optiminer blows up terribly even with low intensity zec mining.

[kemo6600]

Well, that is eth+dcr, so 27.19mh eth and 405mh dcr.

I have to keep my 470's in the 1925-1945 range, otherwise, optiminer blows up terribly even with low intensity zec mining.

 RX 470 Nitro 1500 mhz strap  @1100/1900 easily pulls 27.3 mh ETH + 396 mh DCR @ Dcri 29 .

Almost all of my cards runs error free at 1900 , above that some start to showing error .

I have seen Wolf saying that he is doing 2000+ MHz memory and 29+ mh , perhaps the it is either 1500/1650 strap mix and doing 2000+ Mhz or 1375/1500 strap mix and doing 1900 MHz .

[dallase]

Almost all of my cards runs error free at 1900 , above that some start to showing error .

I have one card that wont go over 1865mhz, even at stock voltages...   

Well, all my cards are in rigs, so in order for me to play around, I have to take one down.   So its a pain in the ass to test these theories.

I dont have a dev system to test with.   If I want to play with memory timings, I have to take a rig down 

[niko2004x]

For the sake of scientific discovery collected 640+ bioses for R? [234]?? cards and written parser to extract timing table and related tables.
Here is the question.
Is there a proper way to determine size of timing table?