Baikal X10 ⚡OVERCLOCK⚡ Claim reward 0.2 BTC for TUTORIAL HOW TO :)⚡⚡⚡⚡

[stash2coin]

My suspicion is that these chips frequency is not controlled by software, if they were the circuity in every chip will be much more complex do you think the chinese will go with the harder and more complex way? Also there seems to be a software method to control the load of the chips but not with frequency change. If you want to overclock them just change the crystal oscillator value if it is 12.5Mhz you may try 12.66Mhz or more in small increments and monitor the temperatures of the chips if its rising the mode is successful but then there will be the problem with the firmware if these machines are capped to produce fixed amount of shares custom firmware is needed along with the hardware mod.

[elmond]

Great job again!
We might just need to go through all the different versions of each source file to find which one is the most up to date.  For instance I "think" this is the latest/greatest device_baikal.h file:

Code:

#ifndef __DEVICE_BAIKAL_H__
#define __DEVICE_BAIKAL_H__

#include "miner.h"

#define BAIKAL_1751             (0x1)
#define BAIKAL_1772             (0x2)
#define BAIKAL_1791             (0x4)
#define BAIKAL_ALL              (0x7)
#define BAIKAL_TYPE             (BAIKAL_ALL)

#define BAIKAL_MAXMINERS	    (5)
#define BAIKAL_MAXUNIT          (4)
#define BAIKAL_MAXASICS	        (16)
#define BAIKAL_WORK_FIFO        (200)

#define BAIKAL_CLK_MIN  		(150)
#define BAIKAL_CLK_MAX		    (300)

#if BAIKAL_TYPE == BAIKAL_1751
#define BAIKAL_CLK_DEF  		(200)
#elif BAIKAL_TYPE == BAIKAL_1791
#define BAIKAL_CLK_DEF  		(400)
#else
#define BAIKAL_CLK_DEF  		(300)
#endif

#define BAIKAL_CUTOFF_TEMP      (60)
#define BAIKAL_FANSPEED_DEF     (100)
#define BAIKAL_FANSPEED_MAX     (100)
#define BAIKAL_RECOVER_TEMP     (40)

#define BAIKAL_RESET		    (0x01)
#define BAIKAL_GET_INFO	        (0x02)
#define BAIKAL_SET_OPTION	    (0x03)
#define BAIKAL_SEND_WORK	    (0x04)
#define BAIKAL_GET_RESULT	    (0x05)
#define BAIKAL_SET_ID		    (0x06)
#define BAIKAL_SET_IDLE		    (0x07)

#define BAIKAL_MINER_TYPE_NONE  (0x00)
#define BAIKAL_MINER_TYPE_MINI  (0x01)
#define BAIKAL_MINER_TYPE_CUBE  (0x02)

#define BAIKAL_ENABLE_SETCLK    (0)

#define BAIKAL_CHECK_STALE      (0)
#define BAIKAL_EN_HWE           (0)
#define BAIKAL_CLK_FIX          (1)

struct asic_info {
    uint32_t nonce;
    uint32_t error;
};

struct miner_info {
    int     thr_id;
    int     asic_count;  
    int     asic_count_r;  
    int     unit_count;
	int		temp;  
    int     clock;
    int     bbg;
    bool    working;
    bool    overheated;
    uint8_t fw_ver;
    uint8_t hw_ver;
    uint8_t asic_ver;    
    uint32_t nonce;
    uint32_t error;    
    double working_diff;    
    struct asic_info asics[BAIKAL_MAXUNIT][BAIKAL_MAXASICS]; 
    uint8_t work_idx;
    struct work *works[BAIKAL_WORK_FIFO];
    cgtimer_t start_time;
};


struct baikal_info {
    struct pool pool;
    int miner_count;
    int clock;
    uint8_t cutofftemp;
    uint8_t fanspeed;		// percent
    uint8_t recovertemp;
	pthread_t *process_thr;
    struct miner_info miners[BAIKAL_MAXMINERS];    
    uint8_t miner_type;
};

typedef struct {
    uint8_t     miner_id;
    uint8_t     cmd;
    uint8_t     param;
    uint8_t     dest;
    uint8_t     data[512];
    uint32_t    len;
} baikal_msg;


#endif /* __DEVICE_BAIKAL_H__ */

this is the current driver-baikal.h file that i use. Very similiar to the one you have

Code:

#ifndef __DEVICE_BAIKAL_H__
#define __DEVICE_BAIKAL_H__

#include "miner.h"

#define BAIKAL_1751             (0x1)
#define BAIKAL_1772             (0x2)
#define BAIKAL_1791             (0x4)
#define BAIKAL_ALL              (0x7)
#define BAIKAL_TYPE             (BAIKAL_ALL)

#define BAIKAL_MAXMINERS	    (5)
#define BAIKAL_MAXUNIT          (4)
#define BAIKAL_MAXASICS	        (16)
#define BAIKAL_WORK_FIFO        (200)

#define BAIKAL_CLK_MIN  		(150)
#define BAIKAL_CLK_DEF  		(400)
#define BAIKAL_CLK_MAX		    (400)
#define BAIKAL_CUTOFF_TEMP      (55)
#define BAIKAL_FANSPEED_DEF     (100)
#define BAIKAL_FANSPEED_MAX     (100)
#define BAIKAL_RECOVER_TEMP     (40)

#define BAIKAL_RESET		    (0x01)
#define BAIKAL_GET_INFO	        (0x02)
#define BAIKAL_SET_OPTION	    (0x03)
#define BAIKAL_SEND_WORK	    (0x04)
#define BAIKAL_GET_RESULT	    (0x05)
#define BAIKAL_SET_ID		    (0x06)
#define BAIKAL_SET_IDLE		    (0x07)

#define BAIKAL_MINER_TYPE_NONE  (0x00)
#define BAIKAL_MINER_TYPE_MINI  (0x01)
#define BAIKAL_MINER_TYPE_CUBE  (0x02)

#define BAIKAL_ENABLE_SETCLK    (0)

#define BAIKAL_CHECK_STALE      (0)
#define BAIKAL_EN_HWE           (0)
#define BAIKAL_CLK_FIX          (1)

struct asic_info {
    uint32_t nonce;
    uint32_t error;
};

struct miner_info {
    int     thr_id;
    int     asic_count;  
    int     asic_count_r;  
    int     unit_count;
	int		temp;  
    int     clock;
    int     bbg;
    bool    working;
    bool    overheated;
    uint8_t fw_ver;
    uint8_t hw_ver;
    uint8_t asic_ver;    
    uint32_t nonce;
    uint32_t error;    
    double working_diff;    
    struct asic_info asics[BAIKAL_MAXUNIT][BAIKAL_MAXASICS]; 
    uint8_t work_idx;
    struct work *works[BAIKAL_WORK_FIFO];
    cgtimer_t start_time;
};


struct baikal_info {
    struct pool pool;
    int miner_count;
    int clock;
    uint8_t cutofftemp;
    uint8_t fanspeed;		// percent
    uint8_t recovertemp;
	pthread_t *process_thr;
    struct miner_info miners[BAIKAL_MAXMINERS];    
    uint8_t miner_type;
};

typedef struct {
    uint8_t     miner_id;
    uint8_t     cmd;
    uint8_t     param;
    uint8_t     dest;
    uint8_t     data[512];
    uint32_t    len;
} baikal_msg;


#endif /* __DEVICE_BAIKAL_H__ */

Only difference is that in your version it sets clock depending on Baikal chip type(1751: CN, 1791: B), so it does no difference on X10, however it does difference to CN and B.

Ive tried to overclock it but its not possible at this moment, both by enabling ENABLE_SETCLK and disabling CLK_FIX, and even tried another definition of CLK_DEF. Even though sgminer says its set to 400 Mhz, it aint - seems to be limited on firmware level!

When it comes to different algo`s, none of them work (gives only HW errors) - either needed some updates in algo files, or what i think it is also limited at firmware level. However, i did gather some different power usages:

Groestl: Unknown @ 690w
Nist5: Unknown @ 690w
X11Gost: Unknown, but possibly 450MHs @ 450w

Code:

sgminer 5.6.2-cod3gen - Started: [2018-03-26 00:38:34] - [0 days 10:12:35]
--------------------------------------------------------------------------------
(5s):10.82G (avg):10.81Gh/s | A:9148  R:78  HW:381  WU:33820.422/m
ST: 1  SS: 0  NB: 638  LW: 2261672  GF: 0  RF: 0
Connected to quark.eu.nicehash.com (stratum) diff 5.24K as user XXX
Block: 57e616c6...  Diff:117M  Started: [10:48:08]  Best share: 10.8M
--------------------------------------------------------------------------------
 [U]SB management [P]ool management [S]ettings [D]isplay options [Q]uit
BKLU 0: 38C 400MHz [ASICS #64] | 3.604G/3.604Gh/s | A:2763 R: 21 HW: 54 WU:9921.705/m
BKLU 1: 38C 400MHz [ASICS #64] | 3.604G/3.604Gh/s | A:3194 R: 27 HW:150 WU:11941.753/m
BKLU 2: 38C 400MHz [ASICS #64] | 3.604G/3.604Gh/s | A:3191 R: 30 HW:177 WU:11956.965/m

Actual stats on nicehash is slightly lower than orginal version.

did the the raspberry and sam3 communicate on usb?
i'm guess some hardware limitation, do you try with single hash board?

[cod3gen]

My suspicion is that these chips frequency is not controlled by software, if they were the circuity in every chip will be much more complex do you think the chinese will go with the harder and more complex way? Also there seems to be a software method to control the load of the chips but not with frequency change. If you want to overclock them just change the crystal oscillator value if it is 12.5Mhz you may try 12.66Mhz or more in small increments and monitor the temperatures of the chips if its rising the mode is successful but then there will be the problem with the firmware if these machines are capped to produce fixed amount of shares custom firmware is needed along with the hardware mod.

I actually went down that road for a while also. There are 4 Tri-state 12.5 Mhz oscillators on each hashboard on the X10 - However the Giant N have what seems to be 12.5 Mhz oscillator on board also(P12 50W - 121C), and its frequency is supposed to be lower(200 Mhz) than X10(300 Mhz). If the chip speed was based on the oscillators, would not that mean the N should have had a much lower frequency on its oscillator? But then again, no one knows for sure that frequencies the chips are running at since the software simply is a pre fixed clock and got nothing to do with actual chip clock, for all we know they might operate on the same frequency(N/X10).

Sure would like to test out the theory, but then again im not so sure i want to waste a hashboard :-S

[[SLA5][ANAQC]man-FIRE]

hi,

What i need to do for win the reward 0.2 bitcoin ?

5s):184.8G (avg):185.7Gh/s | A:2141  R:0  HW:22  WU:1027.095/m
ST: 1  SS: 0  NB: 2  LW: 2188  GF: 0  RF: 0
Connected to lbry.eu.nicehash.com (stratum) diff  as user *****
Block: a24f8128...  Diff:26.4M  Started: [00:09:01]  Best share: 90.6K
--------------------------------------------------------------------------------
 SB management [P]ool management ettings [D]isplay options [Q]uit
BKLU 0: 28C 800MHz [ASICS #64] | 61.44G/64.34Gh/s | A:768 R: 0 HW:12 WU:367.401/m
BKLU 1: 28C 800MHz [ASICS #64] | 61.44G/64.29Gh/s | A:700 R: 0 HW:11 WU:336.305/m
BKLU 2: 28C 800MHz [ASICS #64] | 61.44G/64.31Gh/s | A:782 R: 0 HW: 0 WU:374.098/m
--------------------------------------------------------------------------------
 [2018-03-31 00:09:49.329] Accepted 258afbfb Diff 1.75K/128 BKLU 2
 [2018-03-31 00:09:49.406] Accepted 017242de Diff 176/128 BKLU 2
 [2018-03-31 00:09:49.438] Accepted 01d038c0 Diff 141/128 BKLU 0
 [2018-03-31 00:09:49.469] Accepted 01e0b067 Diff 136/128 BKLU 1
 [2018-03-31 00:09:49.502] Accepted 012f5942 Diff 216/128 BKLU 0
 [2018-03-31 00:09:49.531] Accepted e9b08f8e Diff 280/128 BKLU 1
 [2018-03-31 00:09:49.532] Accepted 0117ad05 Diff 234/128 BKLU 0
 [2018-03-31 00:09:49.595] Accepted b490479e Diff 362/128 BKLU 0
 [2018-03-31 00:09:49.611] Accepted 01b7b739 Diff 149/128 BKLU 0
 [2018-03-31 00:09:49.658] Accepted c5ca4236 Diff 331/128 BKLU 0
 [2018-03-31 00:09:49.689] Accepted 011f8baa Diff 227/128 BKLU 1
 [2018-03-31 00:09:49.690] Accepted e378bb69 Diff 288/128 BKLU 2
 [2018-03-31 00:09:49.691] Accepted 0190b98d Diff 163/128 BKLU 0
 [2018-03-31 00:09:49.752] Accepted 8e865c00 Diff 459/128 BKLU 0
 [2018-03-31 00:09:49.766] Accepted 0129fe22 Diff 219/128 BKLU 0
 [2018-03-31 00:09:49.814] Accepted 4a15d498 Diff 884/128 BKLU 1
 [2018-03-31 00:09:49.830] Accepted 0133a9d9 Diff 213/128 BKLU 0
 [2018-03-31 00:09:49.831] Accepted c74c16ab Diff 328/128 BKLU 2
 [2018-03-31 00:09:50.017] Accepted 018d87c9 Diff 164/128 BKLU 0
 [2018-03-31 00:09:50.047] Accepted d408e015 Diff 309/128 BKLU 0
 [2018-03-31 00:09:50.064] Accepted 01703018 Diff 177/128 BKLU 2
 [2018-03-31 00:09:50.157] Accepted 34fc5b0b Diff 1.24K/128 BKLU 0
 [2018-03-31 00:09:50.173] Accepted b3659a9f Diff 365/128 BKLU 2
 [2018-03-31 00:09:50.188] Accepted 8ca0a1ac Diff 466/128 BKLU 1
 [2018-03-31 00:09:50.203] Accepted 01397083 Diff 209/128 BKLU 1
 [2018-03-31 00:09:50.345] Accepted 0deca14b Diff 4.71K/128 BKLU 1
 [2018-03-31 00:09:50.346] Accepted df941aea Diff 293/128 BKLU 1
 [2018-03-31 00:09:50.439] Accepted b9ce3296 Diff 352/128 BKLU 1
 [2018-03-31 00:09:50.454] Accepted 13c5270c Diff 3.31K/128 BKLU 0
 [2018-03-31 00:09:50.484] Accepted 01213cc7 Diff 226/128 BKLU 2
 [2018-03-31 00:09:50.599] Accepted 017e6611 Diff 171/128 BKLU 0
 [2018-03-31 00:09:50.678] Accepted 01658067 Diff 183/128 BKLU 0
 [2018-03-31 00:09:50.772] Accepted 1f91b852 Diff 2.08K/128 BKLU 2
 [2018-03-31 00:09:50.787] Accepted 38d2e387 Diff 1.15K/128 BKLU 1

[cod3gen]

hi,
What i need to do for win the reward 0.2 bitcoin ?

 

replacing BAIKAL_CLK_DEF with 800, does not mean that you are overclocking it. Its limited at firmware level on atleast X10, but it is Giant B you have.

Ohh, and you should not use "Issues" section on github to ask questions.

[[SLA5][ANAQC]man-FIRE]

I dont need to go on your issues section....

When your turn the clk to 1, this enabled to option baikal-option to communication with the firmware inside the second head.

1. first enable clk to 1

2. after call sgminer with --baikal-options 800:(100/300 depend of your quality room air flow):32  (max degree)
(the second number on the baikal option is the recovery time, if your delay is to short .... you dont find any block.)

3. I have fixed your lbry.h/c and recompile it

4. that it

voila

[cod3gen]

When your turn the clk to 1, this enabled to option baikal-option to communication with the firmware inside the second head.

1. first enable clk to 1

2. after call sgminer with --baikal-options 800:(100/300 depend of your quality room air flow):32  (max degree)

Thats more or less the same thing as changing BAIKAL_CLK_DEF. Does not work on X10, but may work on Giant B. Verify hashrate on pool side over 24h period.
It is interesting that it return a 800 Mhz value. X10 only return 440 Mhz and i have had reports from Giant B users of 480 Mhz return value. While N have 420 Mhz return value.

Have you enabled BAIKAL_CLK_FIX also?
Even weirder is that if it did return 800 Mhz value from firmware chip, that would mean that a 8-bit integer would have a value of 400......

(the second number on the baikal option is the recovery time, if your delay is to short .... you dont find any block.)

Second number is recover temp... Using this as a example: 800:40:55 means;

When one chip(or hashboard) goes to a temp higher than 55c, that is disabled until it reaches its recover temp(40c) when it can start again.

3. I have fixed your lbry.h/c and recompile it

4. that it

voila

Then, what was wrong with them?

When the miner starts, the first 5-10 seconds are you able to copy information about Firmware Version: XX - Hardware Version etc.? What frequency is stated there?

[[SLA5][ANAQC]man-FIRE]

baikal giant B on mineral water my friend, 800hmz is overload but i have laboratory condition for -30 degree, please use 16v dc + 100a

[rogerthat55]

call sgminer with --baikal-options

This might be a dumb linux question, but how do you call sgminer while it's running? When I try to issue a command in the terminal, it wants to start a new instance.

[[SLA5][ANAQC]man-FIRE]

sudo killall -9 sgminer
"you have 2 second for start a new instance"
./sgminer --kernel lbry -o stratum -u user -p x --baikal-options clock:recoveryclock:maxtemp

[TheLiZArD_24]

sudo killall -9 sgminer
"you have 2 second for start a new instance"
./sgminer --kernel lbry -o stratum -u user -p x --baikal-options clock:recoveryclock:maxtemp

This part is ok, but where do I have to "enable clk to 1"?
Is there more to do (I have fixed your lbry.h/c and recompile it)?

[[SLA5][ANAQC]man-FIRE]

you need to recompile the code ..

[TheLiZArD_24]

you need to recompile the code ..

Can you please pm me (you do not accept pm from newbie) with more details, I would like to test it.
Thanks!

[[SLA5][ANAQC]man-FIRE]

Sorry about that, I am to busy for help everybody for compiling sample source code but just search on the internet i am sure you going to find the anwser at your question.

cod3gen do you reserve download the firmware from the 3 way chip ?

[cod3gen]

cod3gen do you reserve download the firmware from the 3 way chip ?

Not sure what you mean there..

[ra_XOr]

you need to recompile the code ..

Can you please pm me (you do not accept pm from newbie) with more details, I would like to test it.
Thanks!

You can find the walkthrough for compiling the code in Code3gen GitHub page.. https://github.com/cod3gen/sgminer-baikal/blob/dev/README.md

[[SLA5][ANAQC]man-FIRE]

Boy, I talking about the firmware inside the STMCHIP 3 way board controller, find / -name fw_upgrade.sh

cod3gen, I love your work, so I give you a hint,

the original code show

msg.data[0] = (clk == 0) ? clk : ((clk / 10) % 20) + 2;

so your chip frequency is 2 + result of modulos....

msg.data[0] = (clk == 0) ? clk : ((clk / 10) % 20) + 2.2;

this is not ASIC chip .... so the chip frequency is 2 + modulo of + 2.0 + add 0.2 = 10% more power  freq

32 chip X 3 = 96 X 2.2 = 211mhz...

[cod3gen]

Boy, I talking about the firmware inside the STMCHIP 3 way board controller, find / -name fw_upgrade.sh

cod3gen, I love your work, so I give you a hint,

the original code show

msg.data[0] = (clk == 0) ? clk : ((clk / 10) % 20) + 2;

so your chip frequency is 2 + result of modulos....

msg.data[0] = (clk == 0) ? clk : ((clk / 10) % 20) + 2.2;

this is not ASIC chip .... so the chip frequency is 2 + modulo of + 2.0 + add 0.2 = 10% more power  freq

32 chip X 3 = 96 X 2.2 = 211mhz...

Ive actually had other users also telling me that the software does provide overclock options to Giant B, nice for B owners :-P

Lets keep it in the other thread i created: https://bitcointalk.org/index.php?topic=3206908.0

It does not seem to apply to either Giant X10(and not N either)

[tboy32c]

baikal giant B on mineral water my friend, 800hmz is overload but i have laboratory condition for -30 degree, please use 16v dc + 100a

How much current does your overclocked miner draw compared to the stock unmodified miner? Did you find that using 16VDC was necessary or is that only what you had available?

...
msg.data[0] = (clk == 0) ? clk : ((clk / 10) % 20) + 2.2;

this is not ASIC chip .... so the chip frequency is 2 + modulo of + 2.0 + add 0.2 = 10% more power  freq

32 chip X 3 = 96 X 2.2 = 211mhz...

Did you actually try doing that modification?

[namsss]

Dear
Someone please help me Baikal N , Stm32 chip image . My controller dead