[CLOSED] Bitmine CoinCraft A1 28nm chip distribution / DIY support

[Lucko]

I really have no news to share, but want at least to forward Bitmine's information that everything is still on track.

OK so if everything is still on track where is documentation reference design and programming? There should be published for 29 days at lest... Even if chip is on time that will not help us without having boards ready...

EDIT: I would definitely be interested but with BFL experience that I had(change from sample to production chips)... I really don't know with current data what can be done till I see more data...

[zefir]

I really have no news to share, but want at least to forward Bitmine's information that everything is still on track.

OK so if everything is still on track where is documentation reference design and programming? There should be published for 29 days at lest... Even if chip is on time that will not help us without having boards ready...

EDIT: I would definitely be interested but with BFL experience that I had(change from sample to production chips)... I really don't know with current data what can be done till I see more data...

I am unfortunately only SW-engineer and from my limited understanding of the HW side I got that (among others) the WASP team was in direct contact with Bitmine and clarified remaining issues. With that, IIRC a revised spec was released that the teams found sufficient enough to design with. If that is not the case, please let me know or post open topics here.

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

What I for sure am committing to (and agreed with Bitmine already) is to cover the SW side of this project. Bitmine will be visiting Innosilicon next week and plans are to grant me access to the FPGA-based chip emulator, so I can work on test and mining SW. With that, there will be a cgminer driver available before first boards are assembled.


I started this thread for the DIY chip distribution only, but somehow it was nominated as the official technical support thread for OpenSource designs. While I am fine with acting as proxy between you and the overloaded Bitmine crew, I myself have been busy over the past 4 weeks and therefore limited to care way less than I would have liked. It is not too late yet, therefore please feel free to demand for what is missing and make this a successful community project.

[marto74]

I really have no news to share, but want at least to forward Bitmine's information that everything is still on track.

OK so if everything is still on track where is documentation reference design and programming? There should be published for 29 days at lest... Even if chip is on time that will not help us without having boards ready...

EDIT: I would definitely be interested but with BFL experience that I had(change from sample to production chips)... I really don't know with current data what can be done till I see more data...

I am unfortunately only SW-engineer and from my limited understanding of the HW side I got that (among others) the WASP team was in direct contact with Bitmine and clarified remaining issues. With that, IIRC a revised spec was released that the teams found sufficient enough to design with. If that is not the case, please let me know or post open topics here.

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

What I for sure am committing to (and agreed with Bitmine already) is to cover the SW side of this project. Bitmine will be visiting Innosilicon next week and plans are to grant me access to the FPGA-based chip emulator, so I can work on test and mining SW. With that, there will be a cgminer driver available before first boards are assembled.


I started this thread for the DIY chip distribution only, but somehow it was nominated as the official technical support thread for OpenSource designs. While I am fine with acting as proxy between you and the overloaded Bitmine crew, I myself have been busy over the past 4 weeks and therefore limited to care way less than I would have liked. It is not too late yet, therefore please feel free to demand for what is missing and make this a successful community project.

Revised docs ?
link ?

[zefir]

Revised docs ?
link ?

Should be the latest revision in https://github.com/bitmine-ch/bitmine - or am I missing something?

[Bicknellski]

We got a chip reference spec that was updated not sure if it is in github. I will post the link here we are all about the sharing and I'm sorry if this was not released to everyone. I assumed it was.

https://drive.google.com/file/d/0B3u-c97pGdlfcGlkSHBQLWVRUlE/edit?usp=sharing

This was related to what our Hardware Lead EE asked for in terms of specs to be shown and BitMine did alter the design to take into consideration what he voiced about the spacing and size of the pads on the chip. This should make things when designing the PCB slightly easier and improve the fabrication and the reliability of the pcb / chip contact. If you want more info on that aspect feel free to join the discussion on our project with the EE on Saturday, 1800 Seattle time. PM me your email and I can add you as lurker to our project page and you can join the meeting Saturday if you want.

Did anyone else get this? Or is it added to the documents on github? If not someone should ask Giorgio to do that as soon as possible.

--------

[Edit] I do not see this revision on the github doc. Need to make sure that they add this information to the page. Zefir found it thanks Zefir.

[darkfriend77]

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

This is what I got from Bitmine concerning the contest in a conversation last week.

[27.11.2013 11:02:49] Giorgio Massarotto: yes
[27.11.2013 11:03:05] Giorgio Massarotto: let me tell you that sample chips are free for anybody making designs based on our chip
[27.11.2013 11:03:09] Giorgio Massarotto: I mean
[27.11.2013 11:03:17] Giorgio Massarotto: you don't have to place a preorder to receive them
[27.11.2013 11:03:26] Giorgio Massarotto: we'll have an open source development contest
[27.11.2013 11:03:33] Giorgio Massarotto: you'll register there and get some sample chips
[27.11.2013 11:03:37] Giorgio Massarotto: just afew
[27.11.2013 11:03:51] darkfriend77: Ok. When will this be opened?
[27.11.2013 11:04:13 | Bearbeitet 11:04:45] darkfriend77: A few will be enough to test out the prototype.
[27.11.2013 11:12:35] Giorgio Massarotto: it will be opened somewhere in the beginning of december
[27.11.2013 11:12:39] Giorgio Massarotto: we were planning to open it much earlier
[27.11.2013 11:12:40] Giorgio Massarotto: but
[27.11.2013 11:12:46] Giorgio Massarotto: we got insultedbecause no samples were available
[27.11.2013 11:12:55] Giorgio Massarotto: so we have moved it till we'll be able to give out free samples

[zefir]

Did anyone else get this? Or is it added to the documents on github? If not someone should ask Giorgio to do that as soon as possible.

That's included in the git HEAD (p.16), thanks.

This is what I got from Bitmine concerning the contest in a conversation last week.

[27.11.2013 11:02:49] Giorgio Massarotto: yes
[27.11.2013 11:03:05] Giorgio Massarotto: let me tell you that sample chips are free for anybody making designs based on our chip
[27.11.2013 11:03:09] Giorgio Massarotto: I mean
[27.11.2013 11:03:17] Giorgio Massarotto: you don't have to place a preorder to receive them
[27.11.2013 11:03:26] Giorgio Massarotto: we'll have an open source development contest
[27.11.2013 11:03:33] Giorgio Massarotto: you'll register there and get some sample chips
[27.11.2013 11:03:37] Giorgio Massarotto: just afew
[27.11.2013 11:03:51] darkfriend77: Ok. When will this be opened?
[27.11.2013 11:04:13 | Bearbeitet 11:04:45] darkfriend77: A few will be enough to test out the prototype.
[27.11.2013 11:12:35] Giorgio Massarotto: it will be opened somewhere in the beginning of december
[27.11.2013 11:12:39] Giorgio Massarotto: we were planning to open it much earlier
[27.11.2013 11:12:40] Giorgio Massarotto: but
[27.11.2013 11:12:46] Giorgio Massarotto: we got insultedbecause no samples were available
[27.11.2013 11:12:55] Giorgio Massarotto: so we have moved it till we'll be able to give out free samples

Thanks for sharing.

[Lucko]

I am unfortunately only SW-engineer and from my limited understanding of the HW side I got that (among others) the WASP team was in direct contact with Bitmine and clarified remaining issues. With that, IIRC a revised spec was released that the teams found sufficient enough to design with. If that is not the case, please let me know or post open topics here.

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

You wrote what we will get... Now it is a bit unclear so you could say this is this and not what you thought you will get but...

Chip specifications, design documents, reference software, and everything that is required to design mining rig development will be provided through github incrementally, with a guaranteed availability of all required support material by end of October.

We have chip specifications... Now unless design documents is not some reference board design but document of the chips there is noting there... And since we are talking about reference software I guess it is for design documents board. Right? So that is missing too. So is this document all we will get? I though Bitmine will follow Avalon and BFL way of doing things. We could probably do with just this document but not in a time frame for first chips...

EDIT: and probably took board or two to get it right...

[zefir]

I am unfortunately only SW-engineer and from my limited understanding of the HW side I got that (among others) the WASP team was in direct contact with Bitmine and clarified remaining issues. With that, IIRC a revised spec was released that the teams found sufficient enough to design with. If that is not the case, please let me know or post open topics here.

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

You wrote what we will get... Now it is a bit unclear so you could say this is this and not what you thought you will get but...

Chip specifications, design documents, reference software, and everything that is required to design mining rig development will be provided through github incrementally, with a guaranteed availability of all required support material by end of October.

We have chip specifications... Now unless design documents is not some reference board design but document of the chips there is noting there... And since we are talking about reference software I guess it is for design documents board. Right? So that is missing too. So is this document all we will get? I though Bitmine will follow Avalon and BFL way of doing things. We could probably do with just this document but not in a time frame for first chips...

EDIT: and probably took board or two to get it right...

The document is all what Bitmine has available for their own design - if you miss something, please name it. You can not compare this to Avalon or BFL - they had already a working design that only needed to be published. Here everybody starts with a chip still in pipeline and there is no single design proven to work around to be named as reference - if you want to compare it, you need to do so with BitFury chips.

Again, I do not know how much is required to enable HW designer to work on a PCB for this chip, but since the WASP team is almost done, I have to assume it is sufficient. Please let me know otherwise which exact information you miss.

[Lucko]

I am unfortunately only SW-engineer and from my limited understanding of the HW side I got that (among others) the WASP team was in direct contact with Bitmine and clarified remaining issues. With that, IIRC a revised spec was released that the teams found sufficient enough to design with. If that is not the case, please let me know or post open topics here.

As for the reference design, I remember there is a design contest planned, but it seems Bitmine is too busy with development to announce it in time. I will check status and report back.

You wrote what we will get... Now it is a bit unclear so you could say this is this and not what you thought you will get but...

Chip specifications, design documents, reference software, and everything that is required to design mining rig development will be provided through github incrementally, with a guaranteed availability of all required support material by end of October.

We have chip specifications... Now unless design documents is not some reference board design but document of the chips there is noting there... And since we are talking about reference software I guess it is for design documents board. Right? So that is missing too. So is this document all we will get? I though Bitmine will follow Avalon and BFL way of doing things. We could probably do with just this document but not in a time frame for first chips...

EDIT: and probably took board or two to get it right...

The document is all what Bitmine has available for their own design - if you miss something, please name it. You can not compare this to Avalon or BFL - they had already a working design that only needed to be published. Here everybody starts with a chip still in pipeline and there is no single design proven to work around to be named as reference - if you want to compare it, you need to do so with BitFury chips.

Again, I do not know how much is required to enable HW designer to work on a PCB for this chip, but since the WASP team is almost done, I have to assume it is sufficient. Please let me know otherwise which exact information you miss.

It is enough if you have a lot of time and some luck... And I wasn't compeering chip but the way they did it... Giving us schematics firmware and gerber... Enough for crating a clone with minimal effort... I'm sure Bitmine has to have something since they are selling miners too... If we don't see that there is no way we can be close to sure we have more or less working board ready for chips...

[DPoS]

DIY has such an upward battle now..turnaround times too long to keep up
  if Avalon didn't shaft the community last summer it would of been a golden time and put a lot of leverage into that segment (ie funds)

good luck all..

[Cheshyr]

The design contest is actually excellent news for all the DIYers here.  It kinda levels the playing field a bit.  Looking forward to seeing how we can get our hands on these chips.

[Lucko]

Any news on design contest or chips delivery? It is last day of W49...

Do they plan to open there board design to make it easier?

[zefir]

Any news on design contest or chips delivery? It is last day of W49...

Do they plan to open there board design to make it easier?

I am also impatiently waiting for news while the expected delivery date for the A1 is approaching fast. All I know is that Bitmine is visiting China these days, so we should have updates early next week.

[goxed]

Please keep me updated of chip distribution. I am planning to purchase some chips and design my boards. Thanks

[Cheshyr]

Please keep me updated of chip distribution. I am planning to purchase some chips and design my boards. Thanks

Ditto

[Keefe]

Shouldn't Bitmine have received the chips a week or two ago? The apparent silence about that concerns me. Or did I miss something?

"delivery of the first lot of ASICs in the last week of November 2013"
http://bitmine.ch/?p=2049

[RHA]

Three weeks delay: http://bitmine.ch/?p=4192

[Bicknellski]

Three weeks delay: http://bitmine.ch/?p=4192

3 weeks. Ouch.

[zulunation]

The core voltage in turbo mode is 0.85V. The current from datasheet is 30A.
So we have 26W in turbo mode.
But in turbo mode the speed is 40 GH/s and power usage is 1W/GH.

It seems that consumption current must be about 50A in turbo mode.