notice that clock is 190MHz, and the FPGA is : XC6SLX150- 2FGG484 I |
|
|
|
is there any known problems on the present simple protocol ? I think the current protocol is workable, but could be improved... - 1,Detection via the USB product/device ids is crucial to automatically adding it to cgminer.
- 2,If that's not practical, detection via a probe command (be sure to ignore BFL's!) is second-best, so we can reuse the same -S parameter.
- 3,If the FPGA can send back a "I'm done" message, it would probably make it easier to do more efficiently.
- 4,In case you (or someone else) produces protocol-compatible devices in the future, you may wish to provide a way to probe the number of FPGAs on the board and their speeds.
- 5,It would be good to have the ability to specify exact nonce ranges, so cgminer (or another miner) can support the noncerange extension in the future, or even split up work internally (a single work is sufficient for up to 4 GH/s).
- 6,Reporting temperature/safety measurements can allows cgminer to shut off the FPGA if it gets too hot.
OK, i understood perfectly. by present product, 1 is hard to realize. 2, 3, 4 will easy to achieve . 5 can be done but need bigger changes on the HDL code. 6 needs additional hardware, but we notice that the normal error rate is less than 0.1%, if the error rate goes high, that means something goes wrong. is there any reference docs about "noncerange extension" feature?  |
|
|
|
sorry to bother you, but may i know if it's possible to add a support to Icarus mining board? i'm really not good at software coding. I wrote the BitFORCE driver for cgminer. I would be happy to implement Icarus support too if someone sends me one (or can offer a comparable deal to BFL's preorder). Contact me privately, if so. (for reference, I live in the US)  oh, it looks like i must reserve 1 board for you in the 3rd batch. the 3rd batch will come out 2-3 weeks later. is there any known problems on the present simple protocol ? |
|
|
|
sorry to bother you, but may i know if it's possible to add a support to Icarus mining board? i'm really not good at software coding. here is the protocol: Icarus communication protocol this specification is for anyone who want to write their own miner or want to add support for icarus. this device is designed as "the simplest is the best" idea. the FPGAs on board or even in chain mode (under development) , act as a single miner to the uart port. when the board connect to a PC, it recognized as a ttyUSB device, or "COM*" on windows PC. how to operate: 1, no detection is needed (no special command for this). 2, sending work data: each data packet is 512bit (64 byte) length. the format is : 256bits MIDSTATE + 160bits fill bits(can be any value) + 96bits data (last 12 bytes of block header). over. 3, sending back the results: if the fpga found a valid nonce, they will send back the 32bits nonce result immediately. no any query protocol is implemented here. so a simple work process is described below: send a work pass the COM port, start a timer and a listener on the COM port. if any data send back by the COM port, then this is a valid nonce. push a new work to the FPGA and send the result back to the pool. if no data send back in 11.3 seconds (a full cover time on 32bit nonce range by 380MH/s speed, maybe increase so a shorter time is suggested, like 8s ), send another work. some point: 1,FPGA will start the calculate when you push a work to them, even they are busy. that means if a block has been found, the miner could push a new immediately to overlap the old work in the fpga. 2,the 2 fpgas on one board will distribute the 32bit nonce to calculate. one will calculate the 0 ~ 7FFFFFFF, and the other will cover the 80000000 ~ FFFFFFFF. so if you want to do any performance measure on this device, please notice this feature. 3,FPGA will stop work when: a valid nonce has been found or 32 bits nonce range is completely calculated. notice that it's possible for 2 FPGA both find valid nonce in the meantime, the 2 valid nonce will all be send back. here are 2 version of python miner already can work on Icarus. https://github.com/ngzhang/Icarus/tree/master/miner_software hope will get your response, and if there are any problem please let me know. regards.  |
|
|
|
about the measurement of V2 or 200M or futuer ver: i suggest this way: i think the LX150 fpgas will never met 250M speed, so set the timeout to 8.5S will suit for any version of bitsteams. about the LEDs: PWR_OK: power modules output are all in good voltage. TXD1 and RXD1: for display transport on the USB UART bridge, but by a design miss, they are difficult to discriminate, and this function is also implemented on other LEDs, so will be removed in the future. LED1: FPGA1 is busy, in the origin bitsteam, light means FPGA is working, but it changed to opposite. LED2: TXD for FPGA1 LED3: RXD for FPGA1 LED4: valid nonce found by FPGA1. will light and fade out in 4 seconds. LED5: FPGA2 is busy. LED6: TXD for FPGA2 LED7: RXD for FPGA2 LED8: valid nonce found by FPGA2. |
|
|
|
I think that better feature may be the message from board when nonce range is exhausted. By the way, are serial port pins routed to chainlink connectors or not ? Would be nice to have possibility of using serial communication directly. What voltage levels it uses ? Also I noticed that there were much more blinkenlights in V1 bitstream. Sadly they are mostly gone in V2  by my thinking is that the hardware performance is known, so a software timer is enough and really effective. a simple modify to the RTL code needs hundreds hours of smartXplorer flow and manually route. the serial port can be mux to any GPIOs. only a small code change. i will work on this after the 200MHz is stabled on a -2I device. bgzhang, could you modify the bitstream to accept the target difficulty as additional input parameter?
you mean the nonce range? I think he means an option to find hashes with more than 8 MSBs equal to "0". But this can be done in the miner software, no bitstream modification is required. That I meant. But yes can be done in miner software. it's a very simple code change, but what is this meaning for? a pool accept a data that can calculate out a nonce with first 32bits equal to "0". |
|
|
|
bgzhang, could you modify the bitstream to accept the target difficulty as additional input parameter?
you mean the nonce range? |
|
|
|
|
ADD@1/28
some proposal of heat control.
the boards and standard cooling system is tested under the ambient temperature of 23 centigrade. if your temp is over 30 centigrade, an additional cooling is recommended. an airflow pass the whole board is a good choice.
notice the power module is very heatproof, but the FPGA will generate error data when they reach a high temperature. a simple method to sense if the temperature is touch the back side of the PCB, just under the FPGA chip. notice before do this you need a electro static discharge.
if you can not hold your finger at the back side of the FPGA for 3 seconds. then a additional cooling is needed.
the FPGA chip uses whole PCB for heat dissipation, so an airflow passing the PCB is more important than the fan above the heat-sink.
Icarus communication protocol
this specification is for anyone who want to write their own miner or want to add support for icarus.
this device is designed as "the simplest is the best" idea.
the FPGAs on board or even in chain mode (under development) , act as a single miner to the uart port. when the board connect to a PC, it recognized as a ttyUSB device, or "COM*" on windows PC.
how to operate:
1, no detection is needed (no special command for this).
2, sending work data:
each data packet is 512bit (64 byte) length. the format is : 256bits MIDSTATE + 160bits fill bits(can be any value) + 96bits data (last 12 bytes of block header). over.
3, sending back the results:
if the fpga found a valid nonce, they will send back the 32bits nonce result immediately. no any query protocol is implemented here.
so a simple work process is described below:
send a work pass the COM port, start a timer and a listener on the COM port.
if any data send back by the COM port, then this is a valid nonce. push a new work to the FPGA and send the result back to the pool.
if no data send back in 11.3 seconds (a full cover time on 32bit nonce range by 380MH/s speed), send another work.
some point:
1,FPGA will start the calculate when you push a work to them, even they are busy. that means if a block has been found, the miner could push a new immediately to overlap the old work in the fpga.
2,the 2 fpgas on one board will distribute the 32bit nonce to calculate. one will calculate the 0 ~ 7FFFFFFF, and the other will cover the 80000000 ~ FFFFFFFF. so if you want to do any performance measure on this device, please notice this feature.
3,FPGA will stop work when: a valid nonce has been found or 32 bits nonce range is completely calculated. notice that it's possible for 2 FPGA both find valid nonce in the meantime, the 2 valid nonce will all be send back.
|
|
|
|
The 1.15x FPGA boards delivered in January 2012 are a few percent slower (192 MHz or 200 MHZ) than the ones delivered in 2011 (200MHz or 208Mhz).
 i hope this does not affect 1.15d boards... Why are they slower ? Different speedgrade or lower quality ? i also find a newer batch of spartan6 FPGAs has a lower quality. lead to a lower stabilized freq. it can't be helped. |
|
|
|
What I'd like to do is mount these boards vertically on a backplane and have some 120 or 140mm high airflow fans blowing from on them. I am thinking slightly angling the fans would be ideal so the backside and the frontside of the board gets direct airflow instead of the air "channeling" or running past it. Angling them would create some turbulence though, so I'm not sure.
Can anybody here that is more of an expert at DIY solutions give me some ideas as to how I'd create this setup? Can I use one of the DDR3 memory slots that ngzhang sells and glue or attach them to a sheet of aluminium or sheet steel? Is the 168 pin memory slot connector on the board actually functional (ie the pins are wired to receive data and power)?
On another note does anyone know if there is some aftermarket solution out there for what I'm trying to accomplish to spare me the hassle of doing the job myself and possibly making a mess of it?
it's possible to use the 240pin-DDR3 DIMM slot to settle the boards, there are enough power pins. but if you want to transform data from the dimm, a RTL change is needed. I don't intend to power the boards with current from the DIMM slots though. I just want to seat them or secure them in place. What are the "80pin TE 1734037 and 1734099 connectors" used for if you don't mind me asking? no use for mining, really. |
|
|
|
What I'd like to do is mount these boards vertically on a backplane and have some 120 or 140mm high airflow fans blowing from on them. I am thinking slightly angling the fans would be ideal so the backside and the frontside of the board gets direct airflow instead of the air "channeling" or running past it. Angling them would create some turbulence though, so I'm not sure.
Can anybody here that is more of an expert at DIY solutions give me some ideas as to how I'd create this setup? Can I use one of the DDR3 memory slots that ngzhang sells and glue or attach them to a sheet of aluminium or sheet steel? Is the 168 pin memory slot connector on the board actually functional (ie the pins are wired to receive data and power)?
On another note does anyone know if there is some aftermarket solution out there for what I'm trying to accomplish to spare me the hassle of doing the job myself and possibly making a mess of it?
it's possible to use the 240pin-DDR3 DIMM slot to settle the boards, there are enough power pins. but if you want to transform data from the dimm, a RTL change is needed. |
|
|
|
|
released a 400MH "overclock" bitsteam for alpha test. on the github.
notice that this bitsteam is not guarantee stable on all boards. and extra cooling for the PCB (not only for the chip heat-sink) is needed.
by present architecture, maybe this is the end.
|
|
|
|
I do not want to offend you but perhaps if you want someone else to make a software miner for Icarus you could do what BFL did and provide the guy that wrote CG miner and UFasoft miner remote access and some sort of API ( I would guess with your files being publicly available it isnt likely hard to do.). I doubt I am suggesting anything you have not already thought of. If existing miners can use yours as well then Icarus has current and possibly future changes to pool connection systems. My thought is it could free up your time to create and sell hardware and as long as your hardware is supported the end user gets upgrades with the new releases of the software.
+1 for this idea. I remember the BFL's post @ CGMINER's topic: https://bitcointalk.org/index.php?topic=28402.msg692304#msg692304OK i know. wait for a few days. |
|
|
|
Can someone who speaks english write up a guide? Trying to deal with this mishmash of guides that don't go together and are written for linux has consumed 2 hours for me. Tried emailing the creator and he sent me a link to python 2.7 then ignored my further questions...
I double click the miner.py file and it definitely starts doing something. I don't know if it's actually mining.
oh, it looks like your email fire wall block my mail with attachment. please check the github. in the download folder. |
|
|
|
I got my board on Thursday and was thoroughly impressed. The packaging was protective and neatly packed. Everything needed to get up and running was included. After plugging in the board I cloned the Icarus software, read the README for the mining software, modified the .sh file (I am on Ubuntu) and it started working. The board itself is very tidy. It has several LEDs and a power switch. I haven't explored its potential as a development board yet, but I'm sure it would be equally useful there. Thanks ngzhang for the great work!
One slight issue is the mining software seems to always run at 50% of one of my CPU cores (Intel Core i7). Not sure if it's the python version I'm running or the software, but I'm wondering if this would run well on a low-powered PC or even a Rasberry Pi. Anyone try this yet?
by my experience the CPU usage will be a zero. |
|
|
|
so what i need is to modify this great miner to fit Icarus. |
|
|
|
ngzhang, are you using curses? I'm asking because my output looks like this: Block found on Fri Jan 20 20:47:11 2012
Upstream result: True
2e4b0c64
[39 accepted, 0 failed, 491.12 +/- 78.64 Mhash/s]
Block found on Fri Jan 20 20:47:12 2012
Upstream result: True
0abb5bdc
[40 accepted, 0 failed, 502.02 +/- 79.38 Mhash/s]
Block found on Fri Jan 20 20:47:16 2012
Upstream result: True
2840937f
[41 accepted, 0 failed, 509.00 +/- 79.49 Mhash/s]
Is that normal? it's your lucky minutes! curses will be used in the futuer. |
|
|
|
Got my boards today  (thx ngzhang). The boards seem to work well but I'm constantly getting the message "reader get queue", not sure if this should be the case. I use the queue version of the miner by starting the python script directly (without the shell script). Btw, does this miner support LP? Has someone already tried to mine on p2pool? that means your network connection to the pool is not stable. the miner can't get a single job in few seconds. if possible please change to a faster pool. this miners are not support LP now. i'm working on a new miner, but it seems need some more time. |
|
|
|
1, the single 4CM fan model get a higher temperature than the 2* 2.5CM fan model, but also acceptable, and not find any error rate increase during the compare test. the ambient temperature is 25-26 centigrade. 2, the single 4CM fan model uses a 4200RPM slave bearing fan, made by SUNON. MODEL NO. is KD1204PFS3. here is the datasheet: http://datasheet.octopart.com/KD1204PFS3-H-Sunon-Fans-datasheet-146198.pdf3, 4CM fan model's noise is much lower than the 2 fans model. 4, the 4CM fan is fasten by 2 screw, you can change it by yourself easily. Hmm I see. Well to me noise is no issue so I think I will replace the single 4 cm fan with 2 x 2.5 cm ones if I can find them somewhere. By the way if anyone is wondering the USB to Serial chipset on the board is a Prolific PL2303 which can be found here: http://www.prolific.com.tw/eng/downloads.asp?id=31This is necessary on Windows XP (and perhaps older) machines. I'm not sure about windows 7, but apparently the windows action center actually located the proper manufacturer and it even gives you a link to follow to download the drivers. Needless to say I did not actually install it on a windows 7 machine yet. update: did some checking and apparently the link to the proper usb driver is located in the README file for the Tcl miner but not for the python beta miner. Now the next challenge is getting the miner.py program to actually work. Do I need a specific version of python or any will do? JSON-RPC addon perhaps? I know for linux this will be a lot easier but it would be cool if there was a guide for windows out there. For now I think I shall see if I can get the Tcl version working at least. notice that the 4CM fan i select is a low speed model. change to a faster model will sure better than even use 2 X 2.5CM fans. the FPGA is -I temperature grade, and can run under 100 C core temp. all the need files i'm updating them onto github. |
|
|
|
Does the single fan on the 2'nd batch Icarus board provide adequate cooling to the fpgas? (compared to the dual fan solution)
edit: Also is the current fan sleeve or ball bearing?
1, the single 4CM fan model get a higher temperature than the 2* 2.5CM fan model, but also acceptable, and not find any error rate increase during the compare test. the ambient temperature is 25-26 centigrade. 2, the single 4CM fan model uses a 4200RPM slave bearing fan, made by SUNON. MODEL NO. is KD1204PFS3. here is the datasheet: http://datasheet.octopart.com/KD1204PFS3-H-Sunon-Fans-datasheet-146198.pdf3, 4CM fan model's noise is much lower than the 2 fans model. 4, the 4CM fan is fasten by 2 screw, you can change it by yourself easily. would you consider to have a storefront to accept order in the near future?
Also is the 2nd batch sold out yet? I'm looking for 2 boards.
i have no plan for a personal website for selling, here in china i can use "taobao" for a Intermediary Transactions. but for international selling i have no idea. 2nd batch is all sold out. now accept 3rd batch pre-order, planed shipping date is mid - Feb. |
|
|
|
|
Show Posts
