Avalon still on schedule for Jan 14?
yep  |
|
|
|
@ Ngzhang
Why does it say under one of the (online forms) that it failed the DRC check? (Design Rule Check)
Is that because you did something unusual with the chip that the DRC would fail the automatic checks?
never mind, it's just a option to avoid some unnecessary trouble. |
|
|
|
I wonder what price BFL is getting their 300mm 65nm wafers for, if Avalon is paying 4k for a 110nm wafer? Even if they pay half of what Avalon is due to their higher volume, their 100k chip order would be worth $200k.
They better hope the chips work this time.
i think the wafer cost is rather low than the MASK cost @ 65nm.. ... |
|
|
|
You guys are all excited, but, to me, it sounds like BitSyncom is about to announce a bad news.
"deciding what to say" -> it is only when the news is bad that time is spent deciding how to say it.
"my engineering team has always been very skeptical regarding our competition for various reasons. It is my job not to under estimate the competition, but now I am forced to agree with them" -> the last "them" refer to his engineering team, IOW the engineering team was correct to be skeptical of the competition's power efficiency claim, IOW the engineering team found out their own efficiency is a lot worse than the competition's claim (which makes sense given that Avalon is 110nm, which should be theoretically 3x worse in terms of power efficiency when compared to 65nm (BFL)).
"what I'm talking about is actually the very opposite" -> he was expecting better results, but the engineering team's number look bad.
yeah, some bad news.  |
|
|
|
easy! they are just eating our pre orders!  Absolutely not. Yifu attend a meeting in Macau these days, about BTC environment and economy, no direct relation with Avalon project. when he is having a big dinner on that table, Avalon team is at Beijing, China, working hard and eating instant noodles.  |
|
|
|
|
I think the demonstration event has been mentioned at the first (around late Sep. ?). but please let Yifu to re-explain it later, he is at the meeting in Macau.
and all I can say is our project is going well.
|
|
|
|
I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
I hereby acknowledge that you are funny.  What's funny is this clock buffer business. The clock tree is the most fragile and delicate part of a synchronous chip, and the hardest to troubleshoot. I cannot imagine what made them think that this was going to make people any less concerned. maybe they means add some buffers on the PCB ? |
|
|
|
|
sorry guys, i test the bitsteam with the 2nd batch of Lancelot, which is default using 9.09K（9.1K can use） for R56 and R47. (1.24V Vcore)it's about 20~30% improvement compare to V3.
today i find a very few 1st batch Lancelot, with 10K for R56 and R47. (1.16V Vcore) it seems will much slower than the 2nd batch. but on average there is still about 10%~15% improvement.
so if possible, i suggest you to change R56 and R 47 for a additional benefit. notice that the 2 resistors is very important, the soldering quality is important. and do not let Vcore above ~1.3V when idling.
how to know which board is 2nd batch: all 2nd batch board have a soldered black 40PIN header, that 1st batch haven't.
|
|
|
|
That sounds great!
Ngzhang you are the one to be trusted!
Thank you very much!!!
I will test it in the evening.
Just a side question. Where we can get default Lancelot Bitstream just in case? Is it same bitstream used with icarus V3?
10X
yep，same as icarus V3. by my test, 95% boards will get a at least 20% promotion, over 50% get more than 30%. add some core voltage will help, default Lancelot core voltage is 1.16V, you can change it to 1.26V by change R56 and R47 to 9.1K. certainly, there are risks and more heat. A:3670 R:57 HW:79 U:4.9not working for me going back to default bitstream maybe some new slower bitsteam for icarus will announce soon. A:3670 R:57 HW:79 U:4.9not working for me going back to default bitstream Try to flash only one FPGA ? Maybe only one of the two is making all the errors don't do that. about why is V42: it's the 42 version last month... will continue improve it, but .. i hope will some more smoothly.  |
|
|
|
|
paste a guide here.
warning:
1, not recommend for icarus board. but you try if you can take the risks.
2, if the board running abnormal, please switch back to the 380M bitsteam.
3, if the board invalid rate is higher than 10%, please switch back to the 380M bitsteam.
4, not guarantee every Lancelot board can normally operation with this bitsteam.
5, recommend you to use 42.bit for Interim test, it will lost if you turn off the board.
features:
1, fully auto speed regulation. about 460~520MH/s on Lancelot board.
how to update:
1, install XILINX Lab tooles (or ISE). i use V13.4. V14.2 may have some strange issues.
2, find and open "iMPACT" tool. press "cancel" if any dialog box popup.
3, connect the Platform Cable, power the board. the indicator light on the cable turn green.
4, click " Boundary Scan". click "Initialize Chain". press "cancel" if any dialog box popup.
5, click "SPI/BPI ?" icon at the top of xc6slx150 device. and assign the MCS file. delect "SPI PROM", "W25Q64BV/CV", "1".
6, repeat step 5 for the other FPGA.
7, right click FLASH icon and select program.
8, wait for at least 8 min, than it will success.
9, turn off Icarus, and tun on. you will find the FLASH is already updated.
10, do 7~9 for the other FPGA.
11, finish.
Tips:
1, will significantly increase heat and power. about 23W pre board. so you need a power adaper can provide 12V@2A continuously.
2, cooling is very important. please DO NOT remove the original heat-sink and fan, they are enough for the top. use another fan blow from the side. the PCB it self is a heat-sink too.
3, not recommend for voltage adjustment. but if you want to do so, i don't block.
4, a typical invalid rate is 5%.
5, Job interval time can use about 6~7S for a better performance.
6, the speed measure is not accurate this time. please check the "shares pre hour" for a speed measures.
7, the JTAG pin is at bottom left of the board. from left to right: VCC/GND/TCK/TDO/TDI/TMS
|
|
|
|
With cgminer 2.4.2 (which I know is not showing HW errors) and --icarus-timing=90 GPU 0: 70.0C 1893RPM | 327.7/342.3Mh/s | A:24 R:0 HW:0 U: 4.22/m I: 4
ICA 0: | 344.2/451.4Mh/s | A:43 R:0 HW:0 U: 7.56/m
I have no idea if this is good or bad U 7.56/m means 550MH/s |
|
|
|
https://github.com/ngzhang/Lancelotall hardware documents released. also released a 460~ 520 MH/s bitsteam for Lancelot. for test purpose only. please carefully test it with the bit file before flash the MCS file into the EEPROM. Temporarily no technical support for the new bitsteam, Busy with Avalon.
|
|
|
|
it looks nice. i like the heatpipes and copper. I see one connector for fans on the front (on bfl website) and 1 pin on the backside that may belong to another fan connector (i know they are not called "fan connector", 3pin connector? whatev). i really hope those are meant for the sc minirig, because otherwise i assume they are planned for cooling the single actively.
If not 60watt seem legit for a cooler that size. Hm..
The heatsink your looking at is the one currently used on the FPGA Single (they have not updated the pic as of yet to an image of a ASIC ),which consumed 80 watts & was designed for a 72F enviroment. But they may be able use something similar on the ASIC,just beefed up a little to allow it to operate in an environment of 90F this time. a major issue is the FPGA they are using (e.g. Altera S3) is a flip-chip package. and their ASIC is low cost wire-bond QFN. this package glue the DIE to the metal GND pad at the bottom. the θJb (to board)is low but the θJt (to top) is high. so it won't work whatever you do from the top. my question is, as a ASIC developer too, i will prepare everything before our chip comes back, and will know if it work or not in a few hours test. now there are well assembled board pictures, but still no testing data. why?  |
|
|
|
I think it's about 30Gh for one board if they are using 65nm, or 60Gh preboard if they are using 40nm.
And i think there must be another heat sink at the backside of the board.
So you suppose a low nanometer product, this would agree with a low power usage, do you think their estimates to be possible? my estimates all based on their announced specifications. it's a backward induction. |
|
|
|
|
I think it's about 30Gh for one board if they are using 65nm, or 60Gh preboard if they are using 40nm.
And i think there must be another heat sink at the backside of the board.
|
|
|
|
Hello,
I had done an order of Avalon-ASIC last week, I choosed Bitcoin paid method and I have paid this week but the status of the order is "Pending Bitcoin".
Can you clear the situation of my order?
(The order number is #200000528)
#200000528 .... hmm more then 300 pre-orders? i don't know, maybe there are 300 pre-orders, just strange order number , and it is not a big problem if it are a few more sold, would be interesting to know how much exactly , to know the amount of ghash added to the network, but that is all just speculation anyhow.. no, the order # is random, and there are many canceliations in the queue. we maybe accept new order in the future (with another delivery time), but this batch is only 300. |
|
|
|
@ ngzhang. What about the future performance of Avalon? Bfl has published that they reach with only 50% CPU power the 60Gh/s. Will Avalon also have such reserve capacity for high overclock later? The other is: I paid last week the gears with express transfer. But i have still Pending Wire status Is that normal? To all wire transfer customers: please inquiry if the payment state is not changed after you do the wire for a long time: yifu.guo@avalon-asic.com |
|
|
|
ngzhang,
I'm unclear on what I'm supposed to do if I own Icarus now and plan on converting/upgrading/redeeming them for new Icarus in the future? Just sit and wait? I did not get in on the preorder and I won't be able to come up with the extra cash till January at the earliest. Do we have to register our present Icarus with you or should we not worry about it at this time?
we will draft a trade-in detail later. i think no need to worry about it now. |
|
|
|
time is up. will release a new site and start a new thread soon. |
|
|
|
|
Show Posts
