FFS: http://en.wikipedia.org/wiki/Field-programmable_gate_array
"Historically, FPGAs have been slower, less energy efficient and generally achieved less functionality than their fixed ASIC counterparts. A study has shown that designs implemented on FPGAs need on average 40 times as much area, draw 12 times as much dynamic power, and are three times slower than the corresponding ASIC implementations.[22]"

40 times less area * 3 times faster = 120x at the same process node

It's really simple guys, every logic block and interconnect needs a bunch of transistors to control them, but on ASIC you just lay the circuit down as you want it to run. Because of this you have far more transistors actually performing the work rather than controlling internal functions.

So even though the underlying features are the same at a given process node, FPGA suffers a disadvantage in area and speed, but makes up for it with flexibility. ASIC is locked in function, but very, very fast at execution.

I posit that if the difficulty is increasing and you are out 30Gh/s for 1 week now and 1 week 6 months from now it will actually work out in your favor to have the partial outage rather than a full one.

I agree that it is not worth the hassle though.

You should not mix in RAID terminology here, it is there for different reasons. RAID 1 is mirroring of data for protection, so the equivalent would be more like having 2 little singles doing exactly the same work in lockstep to prevent errors.

This is a lot more like a farm of servers (like a bunch of web servers)

There is a point where having more units of a smaller size can indeed reduce your risk that you will stop earning altogether, but it increases the risk that you will have a failure at the same time. Given the declining returns on mining, this could indeed be worth a few BTC if you get to keep mining instead of taking a week off. But as you add more and more units you have a larger and larger power overhead (it's more than double the power draw due to redundant VRM's) as well as the space and maintenance issues that come with more devices.

The point is that there is a trade-off. if you are only buying one SC Single, then getting 2 little ones might make sense, but don't double your unit count if you are getting several SC Singles.

This is not a new decision matrix for anyone who has had to choose between 2 (or 20) 8-socket servers and 8 (or 80) 2-socket ones.

read it with a critical eye, there are some serious holes in Ayn Rand's philosophy (and apparently her head)

Fun fantasy world, but it does not match reality.

I also recommend "The Probability Broach" by L. Neil Smith: http://en.wikipedia.org/wiki/The_Probability_Broach
(again, it's a nice fantasy world, but the points being made are more subtle than the overt story)

So they are required to respond to the AG's office by 10/20. How is that case closed? I'm interested to see what the response is. I'm betting it will be a rehash of information that is already released along with their existing statements as to the utility and performance of the product.

FYI, just because this was sent does not mean that Josh or anyone else we have contact with at BFL has direct knowledge of it. In our company the Finance and Legal guys would handle it without anyone that produces for he company being bothered by it.

Thanks for going all out with the photos, it helps a bunch! I eagerly await a response in a week or so.

+1

That was a cutting edge process at the time. All the BFL ASICs appear to be happening on process nodes that are 7-10+ years old, so the chances of a technology failure are low. Since everyone has done a prototype run (I think) at this point, the chances of a fundamental logic error are fairly low.

That was the Pentium 60 and 66. (additional trivia, too many chips failed at 66, so they released at 60Mhz instead, lead times on the 66Mhz chips were bad for a few months)

(IIRC) It was an actual mistake in an x87 multiplier and was the trigger that caused Intel to add microcode update capabilities to the Pentium 75+

That is a great example because BFL et. al. face a similar risk. What if you get 60Gh/s of rejects when the ASIC comes back from the foundry?

No, I'm asking you if you filed a complaint, and what the status of that complaint is.

I'm not going to interrogate a vendor on something that I don't think is an issue. They have passed the bar for Snake Oil, I was wondering how loud the AG's office laughed, or if they just told you to contact them if BFL failed to ship.

Please try again, your English was incomprehensible in that middle section (no offense, I don't understand what you are trying to say)

If you have talked to your AG could you give a quick sum-up of their level of investigation/concern/followup?

Thanks

Right now they get their boards assembled somewhere else, this assembly is likely to include adding the BFL ASIC to the board and passing certain tests. BFL has to but them in cases, attach some stuff to the boards, flash, package and ship.

They want to bring more of it in-house and change the flow to have the PCB's printed, populated, and assembled all in one place. But that is not the plan for the first batch since they don't want to try to learn to ride the bike DURING a motocross event.

FFS

Just because Worried -> Secretive

DOES NOT MEAN

Secretive (very debatable) -> Worried

It could also be:
Secretive -> Annoyed by all the BS
Secretive -> Have business experience where talking too much cased me to lose out
Secretive -> Former Military, and I know what OPSEC means
Secretive -> any other reason under the sun

Your psychic powers are not acceptable evidence, and your argument holds no water.

(I can't believe that I'm using this argument form, but it seems appropriate)

Because... Minecraft

Because... Kickstarter

Because... Duke Nukem Forever (and ever)

So, how many cores did Apple say the iPhone 5 has? Graphics Cores? Clock Speed? Look at the spec sheet and tell me please: http://www.apple.com/asia/iphone/iphone-5/specs.html

Oh that's right, Apple does not talk about the inside of the A6 processor, just how it performs

Yeah, go talk to your State AG, or call the BBB and see what they have to say.

BFL has made a good faith effort to provide sufficient information regarding the product that they are producing, the specifications that it operates within, renderings of boards, updates on production facilities, staff, CRM implementation, Chip IP Overview, test methods, and even a couple of statements about what impact their products might have on the network. This is in addition to the already sufficient prior history they have created with their FPGA products.

Seriously? Snake Oil? They have gotten way past that burden already.

Manufacturers are not required to divulge everything about their product, only enough to sell it (and comply with some very specific rules for safety and licensing reasons)

Go look up the story of the Apple 1...

You are NOT talking about a a mature market, BitCoin is in it's early childhood still.

You are being a bit naive in your assumption that the information about process node does not matter. If it didn't, then why would you be asking?

In the world of Intel and AMD a new process node is developed internally or by their partners (GlobalFoundries is not AMD remember) they have to do a lot of R&D and spend billions of dollars building what are essentially building-sized machines that work on parts at the nanometer level. Because of these lead times it can take 5-7 years for a process node to make it off the drawing board and into prodution, which means when Intel announces details about the technology 1-3 years in advance, they know that it is hopelessly late for AMD to match the technology in the same time frame. Add to that the dominant position that Intel holds, and you have a recipe where Intel can trickle out advances instead of having to scramble, "so who cares about bragging!"

In the case of BitCoin ASIC manufacturers we are talking about a component that can be manufactures on several technologies including the relatively ancient 130nm (http://en.wikipedia.org/wiki/130_nanometer, 10 years since Intel used it for a CPU) all the way up to more modern tech in the 28-55nm range (I'm assuming that the 22nm Intel process is blisteringly expensive.)

So what happens if everyone build their first generation on 130nm? Then it does not really matter, and we are likely to see an orderly stair-step through process nodes as we get closer and closer to the Moore's Law ideal.

But what happens if BFL got access to 28nm (I have no evidence that they have, in fact I doubt they have done anything smaller than 90nm, just a thought experiment) and fabbed their first gen chip with that? Then we have one player that can adjust firmware to scale clockspeed (and hidden hashing cores?) to undercut their competition (or eliminate competitors ROI and drive them out of business), or just to make an insane profit. This has a chance of ending in a monopoly for a while, but more likely it would lead to a vicious race to the bottom that would see negative ROI on all the gear sold today.

We have seen 5 different ASIC projects that are all moving from start to completion in a 6 month period. This means we can assume that the competition can adopt matching technology (on an open market, not creating each process node themselves) in the same timeframe. So if BFL comes out with 200Gh/s chips on 28nm (totally made up numbers), we can expect their competition to match it and atempt to take market share within 6 months. Once the technology can't exceed a Moore's Law rate (due to catching up on more modern process nodes) the prices will start to wall significantly as well until BFL and others are running a 5-20% margin instead of the (assumed but almost certain) 100%-500% they are running today.

Personally I'm hoping it remains too expensive to move to the denser nodes until BTC gets higher, but at some point big players might want in and they will outspend the community in a heartbeat if they see an advantage.

I think you guys are overestimating the speed at which these guys can manufacture their initial and follow-up batches.

There is going to be demand-side pressure far higher than the supply side can keep up with, we know that for sure from the BFL situation. Maintence mode for these manufacturers will certainly lower our margins of us as well as the manufacturer, but until the supply and demand sides of the equation are more balanced there will be an unusual opportunity to profit that is directly proportional to the number of ASIC-days you are able to get outin advance of parity.

I don't see parity happening (excluding USD/BTC rates) before 2014 at least, we have a long way to go before the manufacturers are at a (almost) modern process node, and lots of margin cuts to go (both leading to better BTC/Ghs) before the ROI goes out past 12 months.

Some additional data for you:


And


Looks like Tom has ~700k by himself, to the Mathcave!

Of course it is important (in mining speculation, of course!)

The size of the initial BFL batch can be used to infer the global has rate and difficulty situation for the 2 periods between batches (assuming it takes 30 days between batches)

The ramp on BFL directly affects the slope of the difficulty curve, everyone wants a peek at that!