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Author Topic: Custom RAM Timings for GPU's with GDDR5 - DOWNLOAD LINKS - UPDATED  (Read 155459 times)
doktor83
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April 09, 2017, 06:32:30 AM
 #561

I'll prepare documentation this weekend to go along with all of this, that makes it clear what you're doing when you change stuff; and what each value is used for. You're very welcome. This stuff shouldn't be kept hidden - the straps are the important things, and people will still pay handsomely for straps.

Did this happen ?  Cheesy

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laik2
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April 09, 2017, 08:56:40 AM
 #562

I'll prepare documentation this weekend to go along with all of this, that makes it clear what you're doing when you change stuff; and what each value is used for. You're very welcome. This stuff shouldn't be kept hidden - the straps are the important things, and people will still pay handsomely for straps.

Did this happen ?  Cheesy
It was more of a "bla bla" Cheesy

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nerdralph
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April 09, 2017, 01:05:38 PM
 #563

Anyone find out how to change the refresh interval through the straps or elsewhere in the BIOS?  I'm not talking about tRFC the refresh command delay, I'm talking about the refresh interval or period (tREFI & tREF).  I want to reduce the refresh overhead by refreshing the RAM less frequently.  Wolf says he's only been able to do it by directly writing to the memory controller registers.  Obviously changing values in the strap or the BIOS would be easier.  Unless Wolf decides to release that code too... :-)


I'd give it to you, but you'd release it Tongue

In this case I'm not sure if I'll release it.  It's looking like it won't take a lot of experimenting to figure out though.
https://github.com/torvalds/linux/blob/5924bbecd0267d87c24110cbe2041b5075173a25/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h#L73
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April 09, 2017, 01:30:23 PM
 #564

AMD's UMR tool makes setting many registers a lot easier than it used to be, it's good to keep around for changing register values...

1CPi7VRihoF396gyYYcs2AdTEF8KQG2BCR
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nerdralph
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April 09, 2017, 01:57:55 PM
Last edit: April 09, 2017, 03:21:42 PM by nerdralph
 #565

AMD's UMR tool makes setting many registers a lot easier than it used to be, it's good to keep around for changing register values...

It's almost information overload though...  And I still find organizing the CUs into engines and shader groups confusing.  I'd just number them from 0..

Code:
~/git/umr/build/src/app$ sudo ./umr -wa | head -25
SE SH CU SIMD WAVE# WAVE_STATUS PC_HI PC_LO INST_DW0 INST_DW1 EXEC_HI EXEC_LO HW_ID GPRALLOC LDSALLOC TRAPSTS IBSTS TBA_HI TBA_LO TMA_HI TMA_LO IB_DBG0 M0
0 0 1 0 0 00010c01 00000001 046737e0 bf8c0070 00024b1f ffffffff ffffffff 40620100 01001700 0000c098 20000000 00006000 00000000 00000000 00000000 00000000 00000b06 00010000
>SGPRS[0..3] = { ffffffff, 00000040, 77777777, 77777777 }
>SGPRS[4..7] = { 040fbf00, 00000001, 00f3fffd, 00000010 }
>SGPRS[8..11] = { 083b0000, 00000001, ffffffff, ffffffff }
>SGPRS[12..15] = { bbbbbbbb, bbbbbbbb, 44444444, 44444444 }
>SGPRS[16..19] = { 44444444, 44444444, 2698ede5, 4044d6c3 }
>SGPRS[20..23] = { 0000000f, d77e3ff3, 9e8676f6, fc0d519a }
>SGPRS[24..27] = { 04543881, 7b52b071, d6470a37, 8cc0ba31 }
>SGPRS[28..31] = { 0a3dbeae, 7db6ab47, 00000000, 00000000 }
>pgm[6@1046737d0] = d285001e
>pgm[6@1046737d4] = 00024b1e
>pgm[6@1046737d8] = d285000b
>pgm[6@1046737dc] = 00024b0b
>pgm[6@1046737e0] = bf8c0070
>pgm[6@1046737e4] = 2a3e5f1f
>pgm[6@1046737e8] = 2a365d1b
>pgm[6@1046737ec] = 2a485b24

p.s. I'm finding it seems to have copied the out-of-date register bitfields used in the kernel.  For example mmMC_ARB_RFSH_RATE supposedly only uses the lower 8 bits for powermode0, but I'm seeing values in the upper 16 bits too.
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April 10, 2017, 12:37:38 AM
Last edit: April 10, 2017, 01:01:27 AM by nerdralph
 #566

I took a break from figuring out memory controller registers and added R9 strap format to ohgodadecode through a compile-time flag.
CFLAGS=-DSTRAP_R9=1 make
https://github.com/nerdralph/OhGodADecode

Here it is decoding a strap (1500Mhz) from my custom Tonga BIOS.  Next I'll probably do a new version of the Tonga bios with tuned straps.

Code:
./ohgodadecode 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
TRCDW=15 TRCDWA=15 TRCDR=20 TRCDRA=20 TRRD=6 TRC=55 Pad0=0

TNOPW=0 TNOPR=0 TR2W=25 TCCDL=2 TR2R=5 TW2R=15 Pad0=0 TCL=18 Pad1=0

TRP_WRA=50 TRP_RDA=23 TRP=104 TRFC=44 Pad0=0

PA2RDATA=2 Pad0=1 PA2WDATA=6 Pad1=0 TFAW=4 TCRCRL=7 TCRCWL=0 TFAW32=0

MC_SEQ_MISC1: 0xCA201402
MC_SEQ_MISC3: 0x02A8C089
MC_SEQ_MISC8: 0x15C00000

ACTRD=16 ACTWR=35 RASMACTRD=40 RASMACTWR=89

RAS2RAS=40 RP=51 WRPLUSRP=21 BUS_TURN=0

p.s. just noticed there might be a bug in MC_SEQ_MISC_TIMING2 decoding, since Pad0=1.  May have to dig through the amdgpu register initialization code to make sure I have the right offset in the strap for it.
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April 10, 2017, 02:32:59 AM
Last edit: April 10, 2017, 03:12:54 AM by niko2004x
 #567

I took a break from figuring out memory controller registers and added R9 strap format to ohgodadecode through a compile-time flag.
CFLAGS=-DSTRAP_R9=1 make
https://github.com/nerdralph/OhGodADecode

Here it is decoding a strap (1500Mhz) from my custom Tonga BIOS.  Next I'll probably do a new version of the Tonga bios with tuned straps.

Code:
./ohgodadecode 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
TRCDW=15 TRCDWA=15 TRCDR=20 TRCDRA=20 TRRD=6 TRC=55 Pad0=0

TNOPW=0 TNOPR=0 TR2W=25 TCCDL=2 TR2R=5 TW2R=15 Pad0=0 TCL=18 Pad1=0

TRP_WRA=50 TRP_RDA=23 TRP=104 TRFC=44 Pad0=0

PA2RDATA=2 Pad0=1 PA2WDATA=6 Pad1=0 TFAW=4 TCRCRL=7 TCRCWL=0 TFAW32=0

MC_SEQ_MISC1: 0xCA201402
MC_SEQ_MISC3: 0x02A8C089
MC_SEQ_MISC8: 0x15C00000

ACTRD=16 ACTWR=35 RASMACTRD=40 RASMACTWR=89

RAS2RAS=40 RP=51 WRPLUSRP=21 BUS_TURN=0

p.s. just noticed there might be a bug in MC_SEQ_MISC_TIMING2 decoding, since Pad0=1.  May have to dig through the amdgpu register initialization code to make sure I have the right offset in the strap for it.


Which card has this timing string for 1500 strap?
I only saw this timing string for 1375 strap in Elpida EDW4032BABG in R9 290X/380/390/390X.
Decoding for MC_SEQ_MISC_TIMING looks wrong (at least not consistent with decoding of timing string for the same strap and memory type in RX).
MC_SEQ_MISC_TIMING2 looks wrong too, the way a see it (my tool does not work with timing strings only tables and bioses, so some hacks):
Code:
$ python atom_timings_editor.py --type R9 -r -I db/R9/Elpida/EDW4032BABG/01.straps -O - |grep 137500 | sed -r "s/[ ,]\[/\n\n[/g"
137500 0 7771332000000000ef516a3790550f1232179a05006ae40022aa1c0874021420ca89c0a8020000c01510232859283315

[TRCDW=015,TRCDWA=015,TRCDR=020,TRCDRA=020,TRRD=006,TRC=055,unused1=000]

[TNOPW=000,TNOPR=000,TR2W=025,TCCDL=002,TR2R=005,TW2R=015,unused1=000,TCL=018,unused2=000]

[TRP_WRA=050,unused1=000,TRP_RDA=023,unused2=000,TRP=020,TRFC=089,unused3=000]

[PA2RDATA=000,unused1=000,PA2WDATA=000,unused2=000,FAW=010,TREDC=003,TWEDC=004,T32AW=007,unused3=000,TWDATATR=000]

[TCKSRE=002,unused1=000,TCKSRX=002,unused2=000,TCKE_PULSE=010,TCKE=010,SEQ_IDLE=007,unused3=000,TCKE_PULSE_MSB=000,SEQ_IDLE_SS=008]

[ACTRD=021,ACTWR=016,RASMACTRD=035,RASMACTWR=040]

[RAS2RAS=089,RP=040,WRPLUSRP=051,BUS_TURN=021]

$ python atom_timings_editor.py --type RX -r -I db/RX/Elpida/EDW4032BABG/01.straps -O - |grep 137500 | sed -r "s/[ ,]\[/\n[/g"
137500 0 777000000000000022aa1c00ef516a3790550f14b20b9505006ae40074021420ca89c0a8020004c01510232859283315

[TRCDW=015,TRCDWA=015,TRCDR=020,TRCDRA=020,TRRD=006,TRC=055,unused1=000]

[TNOPW=000,TNOPR=000,TR2W=025,TCCDL=002,TR2R=005,TW2R=015,unused1=000,TCL=020,unused2=000]

[TRP_WRA=050,TRP_RDA=023,unused1=000,TRP=020,unused2=000,TRFC=089,unused3=000]

[PA2RDATA=000,unused1=000,PA2WDATA=000,unused2=000,FAW=010,TREDC=003,TWEDC=004,T32AW=007,unused3=000,TWDATATR=000]

[TCKSRE=002,unused1=000,TCKSRX=002,unused2=000,TCKE_PULSE=010,TCKE=010,SEQ_IDLE=007,unused3=000,TCKE_PULSE_MSB=000,SEQ_IDLE_SS=000]

[ACTRD=021,ACTWR=016,RASMACTRD=035,RASMACTWR=040]

[RAS2RAS=089,RP=040,WRPLUSRP=051,BUS_TURN=021]

EDIT: MC_ARB_DRAM_TIMING2, MC_ARB_DRAM_TIMING looks misaligned too.
Or at least i think 59283315 should be decoded as 89, 40, 51, 21.
laik2
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April 10, 2017, 07:35:20 AM
 #568

I think that's the correct format output:

Quote
--> HEX strap: 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C 01510232859283315

--> MC_SEQ_WR_CTL_D0
    DAT_DLY = 7,   DQS_DLY = 7,  DQS_XTR = 1,  DAT_2Y_DLY = 0,  ADR_2Y_DLY = 0,    CMD_2Y_DLY = 0,  OEN_DLY = 7,  OEN_EXT = 3

--> MC_SEQ_WR_CTL_D1
    DAT_DLY = 0,   DQS_DLY = 0,  DQS_XTR = 0,  DAT_2Y_DLY = 0,  ADR_2Y_DLY = 0,    CMD_2Y_DLY = 0,  OEN_DLY = 0,  OEN_EXT = 0

--> MC_SEQ_RAS_TIMING
    TRCDW = 15,  TRCDWA = 15,  TRCDR = 20,  TRCDRA = 20,  TRRD = 6,  TRC = 55,  Pad0 = 0

--> MC_SEQ_CAS_TIMING
    TNOPW = 0,  TNOPR = 0,  TR2W = 25, TCCLD = 2,  TR2R = 5,  Pad0 = 0,  TW2R = 15,  TCL = 18,  Pad1 = 0

--> MC_SEQ_MISC_TIMING
    TRP_WRA = 50, Pad0 = 0,  TRP_RDA = 23, Pad1 = 0,  TRP = 20,  TRFC = 89,  Pad2 = 0

--> MC_SEQ_MISC_TIMING2
    PA2RDATA = 0,  Pad0 = 0,  PA2WDATA = 0,  Pad1 = 0,  FAW = 10,  TREDC = 3,  TWEDC = 4,  T32AW = 7,  Pad2 = 0,  TWDATATR = 0

--> MC_SEQ_PMG_TIMING
    TCKSRE = 2,  Pad0 = 0,  TCKSRX = 2,  Pad1 = 0,  TCKE_PULSE = 10,  TCKE = 10,  SEQ_IDLE = 7,  Pad2 = 0,  TCKE_PULSE_MSB = 0, SEQ_IDLE_SS = 8




--> MC_ARB_DRAM_TIMING
    ACTRD = 21,  ACTWR = 16,  RASMACTRD = 35,  RASMACTWR = 40

--> MC_ARB_DRAM_TIMING2
    RAS2RAS = 89,  RP = 40,  WRPLUSRP = 51,  BUS_TURN = 21

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nerdralph
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April 10, 2017, 12:49:03 PM
 #569

I took a break from figuring out memory controller registers and added R9 strap format to ohgodadecode through a compile-time flag.
CFLAGS=-DSTRAP_R9=1 make
https://github.com/nerdralph/OhGodADecode

Here it is decoding a strap (1500Mhz) from my custom Tonga BIOS.  Next I'll probably do a new version of the Tonga bios with tuned straps.

Code:
./ohgodadecode 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
TRCDW=15 TRCDWA=15 TRCDR=20 TRCDRA=20 TRRD=6 TRC=55 Pad0=0

TNOPW=0 TNOPR=0 TR2W=25 TCCDL=2 TR2R=5 TW2R=15 Pad0=0 TCL=18 Pad1=0

TRP_WRA=50 TRP_RDA=23 TRP=104 TRFC=44 Pad0=0

PA2RDATA=2 Pad0=1 PA2WDATA=6 Pad1=0 TFAW=4 TCRCRL=7 TCRCWL=0 TFAW32=0

MC_SEQ_MISC1: 0xCA201402
MC_SEQ_MISC3: 0x02A8C089
MC_SEQ_MISC8: 0x15C00000

ACTRD=16 ACTWR=35 RASMACTRD=40 RASMACTWR=89

RAS2RAS=40 RP=51 WRPLUSRP=21 BUS_TURN=0

p.s. just noticed there might be a bug in MC_SEQ_MISC_TIMING2 decoding, since Pad0=1.  May have to dig through the amdgpu register initialization code to make sure I have the right offset in the strap for it.


Which card has this timing string for 1500 strap?
I only saw this timing string for 1375 strap in Elpida EDW4032BABG in R9 290X/380/390/390X.

Good catch.  It's the 1500 strap in my custom Tonga BIOS, which I originally copied from the 1375 strap.  I'll double-check my mods to the decode tool with your atom_rom_timings code to see if I can find the bug(s).
nerdralph
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April 10, 2017, 01:12:37 PM
 #570

Found the bug.  I had made a mistake in _SEQ_MISC_TIMING_FORMAT_R9 so that it was 33 bits long instead of 32, which skewed the offsets for everything after it.
Here's the output from the fixed version:
Code:
./ohgodadecode 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
TRCDW=15 TRCDWA=15 TRCDR=20 TRCDRA=20 TRRD=6 TRC=55 Pad0=0

TNOPW=0 TNOPR=0 TR2W=25 TCCDL=2 TR2R=5 TW2R=15 Pad0=0 TCL=18 Pad1=0

TRP_WRA=50 TRP_RDA=23 TRP=20 TRFC=89 Pad0=0

PA2RDATA=0 Pad0=0 PA2WDATA=0 Pad1=0 TFAW=10 TCRCRL=3 TCRCWL=4 TFAW32=7

MC_SEQ_MISC1: 0x20140274
MC_SEQ_MISC3: 0xA8C089CA
MC_SEQ_MISC8: 0xC0000002

ACTRD=21 ACTWR=16 RASMACTRD=35 RASMACTWR=40

RAS2RAS=89 RP=40 WRPLUSRP=51 BUS_TURN=21
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April 10, 2017, 01:35:02 PM
 #571

I took a break from figuring out memory controller registers and added R9 strap format to ohgodadecode through a compile-time flag.
CFLAGS=-DSTRAP_R9=1 make
https://github.com/nerdralph/OhGodADecode

Here it is decoding a strap (1500Mhz) from my custom Tonga BIOS.  Next I'll probably do a new version of the Tonga bios with tuned straps.

Code:
./ohgodadecode 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
TRCDW=15 TRCDWA=15 TRCDR=20 TRCDRA=20 TRRD=6 TRC=55 Pad0=0

TNOPW=0 TNOPR=0 TR2W=25 TCCDL=2 TR2R=5 TW2R=15 Pad0=0 TCL=18 Pad1=0

TRP_WRA=50 TRP_RDA=23 TRP=104 TRFC=44 Pad0=0

PA2RDATA=2 Pad0=1 PA2WDATA=6 Pad1=0 TFAW=4 TCRCRL=7 TCRCWL=0 TFAW32=0

MC_SEQ_MISC1: 0xCA201402
MC_SEQ_MISC3: 0x02A8C089
MC_SEQ_MISC8: 0x15C00000

ACTRD=16 ACTWR=35 RASMACTRD=40 RASMACTWR=89

RAS2RAS=40 RP=51 WRPLUSRP=21 BUS_TURN=0

p.s. just noticed there might be a bug in MC_SEQ_MISC_TIMING2 decoding, since Pad0=1.  May have to dig through the amdgpu register initialization code to make sure I have the right offset in the strap for it.


Which card has this timing string for 1500 strap?
I only saw this timing string for 1375 strap in Elpida EDW4032BABG in R9 290X/380/390/390X.

Good catch.  It's the 1500 strap in my custom Tonga BIOS, which I originally copied from the 1375 strap.  I'll double-check my mods to the decode tool with your atom_rom_timings code to see if I can find the bug(s).


Well my knowledge is (at least partially) from statistical analysis, so 'all atombios timing tables in existence' database is a nice by-product.
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April 10, 2017, 03:47:39 PM
 #572

I've just updated my strapmod utility to handle R9 straps:
Code:
~/github/strapread$ ./strapmod.py 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
R9 strap detected
Old, new RRD: 0 , 5
Old, new FAW: A , 0
Old, new 32AW: 7 , 0
Old, new ACTRD: 15 , 0x10
7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
7771332000000000EF515A3790550F1232179A050060040022AA1C0874021420CA89C0A8020000C01010232859283315
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April 11, 2017, 06:22:20 AM
Last edit: April 11, 2017, 06:32:33 AM by niko2004x
 #573

Question to gurus unrelated to timings.
It seems most (all?) RX 460 (not a sane choice for mining) in addition to empty I2C VO also contain GPIO VO of type 2(aka mvddc).
Raw voltage values in this object is 1350/1500 and at least to me it looks like mvddc.
Did somebody already looked at it already?
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April 11, 2017, 10:03:21 AM
 #574

Anyone have some idea about Micro memory:
thanks!
Quote
1500: 777000000000000022AA1C00315A5B3CA0550F15B68C450A0068C4007C041420CA8980A90200000 01712262BA42B3715
1625: 777000000000000022AA1C0073626C41B0551016BA0D260B006AE60004061420EA8940AA0300000 01914292EB22E3B16
1750: 777000000000000022AA1C00B56A6D46C0551017BE8E060C006AE6000C081420EA8900AB0300000 01B162C31C0313F17
1875: 999000000000000022AA1C00D6727E4BC0551218C30FE70C006B0601150A1420EA89C0AB0300000 01D172F35CE344418
2000: 999000000000000022AA1C00F7F67E4FD0551319C650B70D006C06011D0C1420EA8980AC0300000 01E183238DB364719
i cant touch it more than 2000mhz for 6 card but 1 card is stable!!!
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April 12, 2017, 12:00:45 PM
 #575

Micron:
You can find posts saying you can achieve 30mh with using 1750 strap above 2050MHz, but the micron cards that I tested were all unstable above 1950. No wonder the manufacturers limited even the 8GB versions to only 1650MHz...
Is there such a big variance among micron chips?
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April 14, 2017, 02:18:55 AM
 #576

I've just updated my strapmod utility to handle R9 straps:
Code:
~/github/strapread$ ./strapmod.py 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
R9 strap detected
Old, new RRD: 0 , 5
Old, new FAW: A , 0
Old, new 32AW: 7 , 0
Old, new ACTRD: 15 , 0x10
7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
7771332000000000EF515A3790550F1232179A050060040022AA1C0874021420CA89C0A8020000C01010232859283315


Does this work using the lazy fools' tool?

On a semi-related note...is Debian stable a good distro to start using linux? Not for doing anything fancy...but just web browsing and email and maybe some mining and folding and more importantly getting familiar with the OS.

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April 14, 2017, 08:30:09 AM
Last edit: April 14, 2017, 09:00:30 AM by p4n
 #577

I've just updated my strapmod utility to handle R9 straps:
Code:
~/github/strapread$ ./strapmod.py 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
R9 strap detected
Old, new RRD: 0 , 5
Old, new FAW: A , 0
Old, new 32AW: 7 , 0
Old, new ACTRD: 15 , 0x10
7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
7771332000000000EF515A3790550F1232179A050060040022AA1C0874021420CA89C0A8020000C01010232859283315


For which kind of card/memory is that strap?

After reading OC.net hawaii bios editing post, and reading this post a few times, I've tried to learn to do it myself. Before starting to learn about custom timing, i've just copied lower clock timings into higher ones, with gains around 5% at same gpu/mem clocks, not bad. I'll try to explain how I did it, because it's been hard for me to understand at first how to do it, so I hope it helps other ppl.

Everything done under windows (I have ubuntu also, but i find myself more comfortable in windows, dont kill me for it).

First of all, I downloaded both original BIOS using GPU-Z (Button right to BIOS version). Save them as backup.

Then, open the one you want to modify with Hex Workshop
It looks (correct me please if I'm wrong), that some of the Hawaii timings use to start with 77 71 (that's been the case for my Hynix AJR), so I made a search (Ctrl+F) for Hex Values 7771.


Then, look at the 4 pair of numbers before the 77 71 pairs, select them with mouse and look at the right column "Data Inspector" for the int32 value, thats the Mhz of the memstrap
multiplied by 100. If you want to find the rest of the straps, put mouse cursor before 77 and add an offset (Ctrl+G) of 48 bytes (thats the case for my BIOS/memory type, if its not the case, search for the next 77 71 and use 4 pairs before).

For a R9 390X bios with Hynix AJR, straps are 800-900-1000-1125-1250-1375-1425-1500-1625-1750-2000.

So for this BIOS, i chose to copy the 1250 memstrap into the 1375,1425,1500 and 1625 ones. 1250 memstrap for me is this one: 77713320000000008CC5583460550F0F2C94B8070048C50022FF1C085C0F14205A8900A00000012 0120D23287B222D13



After this, you can also mod gpu/mem clocks, voltages and fan speed with HawaiiBiosReader

With all these changes you will need to fix BIOS checksum. Use the .exe OhGodACsumFixer.exe posted in OP by opening it with cmd. Just paste .exe in the same dir as the bios, go there with an administrator plivilege cmd and type OhGodACsumFixer.exe BIOSNAME. Check if checksum is OK using HawaiiBiosReader.



I'm totally a noob at this so please, correct me if im wrong. I haven't tried any bios with more than 1 memory type, that could change some values, so please, be careful.
niko2004x
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April 14, 2017, 10:09:56 AM
 #578

For which kind of card/memory is that strap?

It is a timing string for 1375 strap for Elpida EDW4032BABG in some R9 290x/390/390x/380.
Full timing table looks like this
Code:
 
 200 999133200000000060881107c0540b060f05c1000020410022aa1c08150014209a8840a1000000c0030105070c0a100c
 400 99913320000000006094120fd0540c07158892010020410022aa1c081d0314209a8880a2000000c006010a0f190e160d
 800 9991332000000000a5ac351f10550e0b218e35030044820022aa1c083d0914202a8900a5000000c00c06141a33182210
1000 77713320000000002939572750550d0e261107040068c20022aa1c08540c1420aa8900a6000000c00f0a191e401e2712
1250 7771332000000000ad49593270550e102d1519050068c30022aa1c08640f1420ba8980a7000000c0130e202551242e13
1375 7771332000000000ef516a3790550f1232179a05006ae40022aa1c0874021420ca89c0a8020000c01510232859283315
1425 777133200000000010d66a3990550f123498ca05006ae40022aa1c0874031420ca8900a9020000c0161124295c293515
1500 7771332000000000315a6b3ca0550f1336191b06006ae40022aa1c087c041420ca8980a9020000c01712262b612b3715
1625 777133200000000073627c41b05510143a1b9c06006c060122aa1c0804061420ea8940aa030000c01914292e692e3b16
1750 7771332000000000b56a7d46c05510153e1d1d07006c070122aa1c080c081420fa8900ab030000c01b162c3171313f17
2000 999133200000000018f77e4f0054121a06a01e08006c070122aa1c08350c1420fa8980ac030000c01e1932378139471a

nerdralph
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April 14, 2017, 01:35:40 PM
 #579

I've just updated my strapmod utility to handle R9 straps:
Code:
~/github/strapread$ ./strapmod.py 7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
R9 strap detected
Old, new RRD: 0 , 5
Old, new FAW: A , 0
Old, new 32AW: 7 , 0
Old, new ACTRD: 15 , 0x10
7771332000000000EF516A3790550F1232179A05006AE40022AA1C0874021420CA89C0A8020000C01510232859283315
7771332000000000EF515A3790550F1232179A050060040022AA1C0874021420CA89C0A8020000C01010232859283315


Does this work using the lazy fools' tool?

On a semi-related note...is Debian stable a good distro to start using linux? Not for doing anything fancy...but just web browsing and email and maybe some mining and folding and more importantly getting familiar with the OS.

Just updated the tool with the R9 code.

Code:
R9 strap detected
Old, new RRD: 5 , 5
Old, new FAW: 8 , 0
Old, new 32AW: 6 , 0
Old, new ACTRD: 15 , 0x10
5551332000000000AD515A3EC0570E142D9468080068C70022CC1C0803011420FA8900A003000300150E2A3186272E16
5551332000000000AD515A3EC0570E142D9468080060070022CC1C0803011420FA8900A003000300100E2A3186272E16

For a distro, I'd suggest Ubunutu 16.04.2.
bardacuda
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April 14, 2017, 02:19:38 PM
Last edit: April 14, 2017, 03:38:15 PM by bardacuda
 #580

@p4n

Yes the straps are always 48 bytes long. However, it is better to search for the 3-byte strings (see below quote) to find the strap you want rather than searching for 7771. They don't all necessarily start with that. It depends on the type of RAM your GPU has and which frequency range the strap is for.

Also it's possible your GPU's BIOS supports multiple RAM types. So for example, if you want to edit the timings of the 1126-1250MHz strap, and your card supports Elpida BBBG, Hynix AFR, and Hynix BFR, then you will have a strap after 48 E8 01 01, 48 E8 01 02, and 48 E8 01 03.

Make sure you edit the correct strap for the specific RAM ICs your card has (or just edit all 3 of them to be sure).

Also if you load a BIOS in HawaiiBiosReader, and then save it, it fixes the checksum automatically. No need to use a separate tool for that.

Quote
In VRAM_Info section of ROM you will find RAM straps/timings. You will find the end frequency of each strap and then associated timings for it. Thus a RAM clock equal to and below that end frequency uses those timings and once past that end frequency it uses next strap and so on.

Most 290/X & 295X2 have these straps/frequency range:-

Strap end 400MHz (40 9C 00) , Range = 150-400MHz
Strap end 800MHz (80 38 01) , Range = 401-800MHz
Strap end 900MHz (90 5F 01) , Range = 801-900MHz
Strap end 1000MHz (A0 86 01) , Range = 901-1000MHz
Strap end 1125MHz (74 B7 01) , Range = 1001-1125MHz
Strap end 1250MHz (48 E8 01) , Range = 1126-1250MHz
Strap end 1375MHz (1C 19 02) , Range = 1251-1375MHz
Strap end 1500MHz (F0 49 02) , Range = 1376-1500MHz
Strap end 1625MHz (C4 7A 02) , Range = 1501-1625MHz
Strap end 1750MHZ (98 AB 02) , Range = 1626-1750MHz

Note: HEX values in brackets are as they would be in VRAM_Info timings section without endian conversion, etc.

@nerdralph

Thanks for the reply! I had started to read up on distros and read something about Ubuntu being based on an unstable Debian distro and having lots of issues, so I was thinking a stable or testing distro might be better...and then installing a GUI like Gnome or something on top if I want to use one. Debian and Arch were recommended in the thing I was reading. So Ubuntu is good for getting to learn the nuts and bolts of linux?

Also, thanks for all the work you do for the community!

EDIT:

Okay so I tried putting Stilt's straps into the tool (among many others) and I noticed Stilt had RRD at 4, but the tool changed it to 5. Stilt did have other timings for FAW and 32AW (like 6) which were changed to 0, so I assume that's an improvement, but I'm wondering if I should leave RRD at 4?

For example, Here is the results for Stilt's strap for Hynix AFR

Quote
R9 strap detected
Old, new RRD: 4 , 5
Old, new FAW: 6 , 0
Old, new 32AW: 6 , 0
Old, new ACTRD: 12 , 0x10
77713320000000000839472A50550C0B242045040046C40022BB1C005C0B14204A8900A000000120120C211E51192613
77713320000000000839572A50550C0B242045040040040022BB1C005C0B14204A8900A000000120100C211E51192613

I bolded the number that I assume is RRD. I'd like to try the new strap, but with Stilt's old RRD. If I just change that 57 back to a 47 would that accomplish it?


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