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Author Topic: [ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE!  (Read 176664 times)
LaserHorse
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August 18, 2013, 08:32:01 PM
 #561

IOREF = VDD works great.

Curious - will you be removing the resistor divider from IOREF pins on the next revision of the S-Hash board?

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cscape
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August 18, 2013, 08:44:20 PM
 #562

Curious - will you be removing the resistor divider from IOREF pins on the next revision of the S-Hash board?
Correct. In fact, on the prototype of the first revision, the resistor divider wasn't even mounted. Instead a small 0-Ohm resistor was placed between the IOREF pad and a nearby VDD pad. 

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August 20, 2013, 08:35:56 PM
 #563

bi•fury assembled and with heatsink:



It's hashing test vectors now, more to come.

intron

Note: the push button, pin header and Molex connector
are for firmware debugging only, will be removed later.
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August 20, 2013, 09:55:38 PM
 #564

bi•fury assembled and with heatsink:

It's hashing test vectors now, more to come.

intron

Note: the push button, pin header and Molex connector
are for firmware debugging only, will be removed later.

Beautiful heat sink!

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August 20, 2013, 10:34:35 PM
 #565

Looking good Intron. Smiley looking real good Cheesy

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August 21, 2013, 12:12:29 AM
 #566

very beautiful! Any idea what sorts of costs it would see (outside of the bitfury chips)? Seems like 3Ghash/BTC speed is going to be necessary very, very soon

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August 21, 2013, 06:14:48 PM
 #567

I'll be populating my prototype boards with my sample chips tomorrow.  Does anyone have any guidance as far as test vectors, verification, etc?  My plan right now is to jump right in with this version of cgminer: https://github.com/legkodymov/cgminer

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August 21, 2013, 07:58:43 PM
 #568


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August 21, 2013, 08:02:42 PM
 #569

n1 work man, you should talk to cscape or intron if you need help.

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intron
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August 21, 2013, 08:03:21 PM
 #570



Using "strings" here?

intron
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August 21, 2013, 08:04:59 PM
 #571


Using "strings" here?

intron

You mean the SPI chaining?  Yes it's one long string of ten chips.

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August 21, 2013, 08:12:12 PM
 #572


Using "strings" here?

intron

You mean the SPI chaining?  Yes it's one long string of ten chips.

I mean that you can power the ASICs with a voltage that
is N times Vcore of a single ASIC. Whith all bitfurys in series:
ground tab of one ASIC connected to the Vcore pins of the
next, etc.

I'm asking because there seems a lot of passives between
the ASICs.

intron
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August 21, 2013, 08:13:11 PM
 #573


Using "strings" here?

intron

You mean the SPI chaining?  Yes it's one long string of ten chips.

I mean that you can power the ASICs with a voltage that
is N times Vcore of a single ASIC. Whith all bitfurys in series:
ground tab of one ASIC connected to the Vcore pins of the
next, etc.

intron

Oh... no, we have a regulator that'll do .6 to .9V at up to 40A, and the chips are all paralleled.


The reason there's so many passives is I couldn't get any clarity on what we might need for pullup or pulldown, so the option is there for either on all the SPI lines.  Plus there are series terminators.

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intron
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August 21, 2013, 08:59:18 PM
 #574


Using "strings" here?

intron

You mean the SPI chaining?  Yes it's one long string of ten chips.

I mean that you can power the ASICs with a voltage that
is N times Vcore of a single ASIC. Whith all bitfurys in series:
ground tab of one ASIC connected to the Vcore pins of the
next, etc.

intron

Oh... no, we have a regulator that'll do .6 to .9V at up to 40A, and the chips are all paralleled.

The reason there's so many passives is I couldn't get any clarity on what we might need for pullup
or pulldown, so the option is there for either on all the SPI lines.  Plus there are series terminators.

Ok. Think you can do without most of these:)

intron




ssi
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August 21, 2013, 09:26:01 PM
 #575


Ok. Think you can do without most of these:)

intron


I figured that would be the case, but with the timeline being so critical, I wanted to leave myself some "outs". Smiley

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August 22, 2013, 02:08:40 AM
 #576

Great work fellas,
Am looking forward to seeing Introns test results and ssi's completed prototype.
Looks like that baby will need a heatsink, you got one in mind ssi?

cheers,
kev
ssi
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August 22, 2013, 06:04:35 AM
 #577

Great work fellas,
Am looking forward to seeing Introns test results and ssi's completed prototype.
Looks like that baby will need a heatsink, you got one in mind ssi?

cheers,
kev

I don't expect it to need a heatsink... the whole board should be ~25W or so, and there's four layers of copper pours to suck the heat out of the chips.

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ssi
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August 23, 2013, 03:25:02 AM
 #578




I lack a level shifter.  Should be here tomorrow.

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LaserHorse
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August 23, 2013, 05:04:59 AM
 #579

https://pbs.twimg.com/media/BSUpPk0CIAA2YGU.jpg


I lack a level shifter.  Should be here tomorrow.

what you lack in level shifters, you make up for in density - nice work!

how do foresee mounting it?

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ssi
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August 23, 2013, 01:10:59 PM
 #580

https://pbs.twimg.com/media/BSUpPk0CIAA2YGU.jpg


I lack a level shifter.  Should be here tomorrow.

what you lack in level shifters, you make up for in density - nice work!

how do foresee mounting it?

Honestly I didn't give a lot of thought to mounting when trying to get these prototypes spun quickly Smiley  Next rev will have more options.  For this one, I can just 3d print something with slots.

However, what I DID think about:

it supports RPi:



AND Beaglebone:


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