dan99
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June 14, 2013, 06:39:50 AM |
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with so many skeptics and non believers, how many would bet they will not deliver in September and how many believe they can do it and deliver in September.??
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KS
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June 14, 2013, 09:25:48 AM |
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with so many skeptics and non believers, how many would bet they will not deliver in September and how many believe they can do it and deliver in September.??
I think the topic is rather "can they deliver at all", rather than "can they deliver in September or later". They have taken a lot of risk and made what looks like bad decisions. Maybe (hopefully for early adopters) they'll pull it off, but their timing is not looking too good. We're talking at least 10 weeks delay from the start of the chip production - which AFAIK hasn't started yet. 10 weeks is a very short lead time. What if it becomes 14 weeks, 18 weeks? The reason Avalon is a safer bet now is because it's a proven design with a proven 10 weeks lead time (ASICs, not full miners obv.). And we're talking about a 7mm*7mm chip, a 70mm*70mm one like for KNCMINER. That thing is so huge than the yield will probably never be very high (I think they would consider themselves lucky at 70% - rear end fugee number) and that why they HAVE to have a defect management solution in software, otherwise they would just throw away a lot of the ASICs. This is not religion where blind faith is required, though bigots will be bigots.
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rograz
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June 14, 2013, 09:36:39 AM |
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I thought the first rule in the tech industry was to always expect delays. If I get my unit before nov/dec I will be pleasantly surprised.
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FlappySocks
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June 14, 2013, 11:07:25 AM |
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with so many skeptics and non believers, how many would bet they will not deliver in September and how many believe they can do it and deliver in September.??
Lets bow down to KNCMiner, for they deliver us in September. Believers.... believers..... let us pray for the skeptics.... thy miners will be done.
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dan99
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June 14, 2013, 11:13:20 AM |
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with so many skeptics and non believers, how many would bet they will not deliver in September and how many believe they can do it and deliver in September.??
Lets bow down to KNCMiner, for they deliver us in September. Believers.... believers..... let us pray for the skeptics.... thy miners will be done. Nice Video
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J35st3r
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June 14, 2013, 11:14:33 AM |
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Believers.... believers..... let us pray for the skeptics.... thy miners will be done.
That image is just way too big. Have a thought for us poor souls browsing on a Raspberry Pi
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1Jest66T6Jw1gSVpvYpYLXR6qgnch6QYU1 NumberOfTheBeast ... go on, give it a try
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FlappySocks
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June 14, 2013, 11:20:12 AM |
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Nice Video It's a young Sting in the film Brimstone and Treacle.
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Anenome5 (OP)
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June 14, 2013, 11:43:25 AM |
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And we're talking about a 7mm*7mm chip, a 70mm*70mm one like for KNCMINER. That thing is so huge than the yield will probably never be very high (I think they would consider themselves lucky at 70% - rear end fugee number) and that why they HAVE to have a defect management solution in software, otherwise they would just throw away a lot of the ASICs.
Can't you just modularize the unit and plan to have a certain break-down on average? I mean, ASICs like this Jupiter device are already going to have a looot of chips in it anyway. That creates a certain arbitrage opportunity of sorts. Say you can reasonably expect a 70% yield, then you promise a device with 70% of X number of chips theoretical capacity. That way you're virtually guaranteed to get the device you want. This is not like trying to create an Intel CPU where the end-user wants one damn good chip and only really one and high yield is especially important. Then, as I said, you modularize the chip, building it in units such that if a unit fails you simply turn it off and route around it so that the entire chip itself isn't sour. Sony did this with the PS3 Cell-chip, built in 8 units and assuming that 1 would be failed typically, meaning an 87.5% yield expected. Some chips with 8 units working still deactivated one unit just to remain consistent! But with an ASIC you wouldn't bother with that, you'd just take the extra performance. And the result is their promise +/- 10% was it, or 5%? Anyway, that's my uneducated guess of how things are going to go.
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Democracy is the original 51% attack.
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KS
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June 14, 2013, 11:56:37 AM |
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And we're talking about a 7mm*7mm chip, a 70mm*70mm one like for KNCMINER. That thing is so huge than the yield will probably never be very high (I think they would consider themselves lucky at 70% - rear end fugee number) and that why they HAVE to have a defect management solution in software, otherwise they would just throw away a lot of the ASICs.
Can't you just modularize the unit and plan to have a certain break-down on average? I mean, ASICs like this Jupiter device are already going to have a looot of chips in it anyway. That creates a certain arbitrage opportunity of sorts. Say you can reasonably expect a 70% yield, then you promise a device with 70% of X number of chips theoretical capacity. That way you're virtually guaranteed to get the device you want. This is not like trying to create an Intel CPU where the end-user wants one damn good chip and only really one and high yield is especially important. Then, as I said, you modularize the chip, building it in units such that if a unit fails you simply turn it off and route around it so that the entire chip itself isn't sour. Sony did this with the PS3 Cell-chip, built in 8 units and assuming that 1 would be failed typically, meaning an 87.5% yield expected. Some chips with 8 units working still deactivated one unit just to remain consistent! But with an ASIC you wouldn't bother with that, you'd just take the extra performance. And the result is their promise +/- 10% was it, or 5%? Anyway, that's my uneducated guess of how things are going to go. I think that's what they are doing. With chips that big they will probably have a lot of defects and they have to deal with it at runtime. i guess the idea is either to make very small chips and trash the non-functioning ones or build them very big and switch off the bad bits. Depending on the expected fab yields, one way might be better than the other. It's the wonderful wait and see time. Alea jacta est, nothing we can do about it now.
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Bitcoinorama
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June 14, 2013, 12:00:03 PM |
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And we're talking about a 7mm*7mm chip, a 70mm*70mm one like for KNCMINER. That thing is so huge than the yield will probably never be very high (I think they would consider themselves lucky at 70% - rear end fugee number) and that why they HAVE to have a defect management solution in software, otherwise they would just throw away a lot of the ASICs.
Can't you just modularize the unit and plan to have a certain break-down on average? I mean, ASICs like this Jupiter device are already going to have a looot of chips in it anyway. That creates a certain arbitrage opportunity of sorts. Say you can reasonably expect a 70% yield, then you promise a device with 70% of X number of chips theoretical capacity. That way you're virtually guaranteed to get the device you want. This is not like trying to create an Intel CPU where the end-user wants one damn good chip and only really one and high yield is especially important. Then, as I said, you modularize the chip, building it in units such that if a unit fails you simply turn it off and route around it so that the entire chip itself isn't sour. Sony did this with the PS3 Cell-chip, built in 8 units and assuming that 1 would be failed typically, meaning an 87.5% yield expected. Some chips with 8 units working still deactivated one unit just to remain consistent! But with an ASIC you wouldn't bother with that, you'd just take the extra performance. And the result is their promise +/- 10% was it, or 5%? Anyway, that's my uneducated guess of how things are going to go. For this initial revision this is what I came away with understanding. If you buy now, you will get what was promised, but immediately after the design will be revisited and improved upon. Future buyers will be given greater efficiency and more bang for their buck as Marcus, Michael, Yann and Henrik will demonstrate with Mars over the coming days, but for those now, it's about beating hashrate and delivering in September. The guys are very confident they have minimised risks as there is no room for error with this initial waffer!
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Make my day! Say thanks if you found me helpful BTC Address ---> 1487ThaKjezGA6SiE8fvGcxbgJJu6XWtZp
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peetah
Member
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Activity: 364
Merit: 10
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June 14, 2013, 12:13:12 PM |
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No.
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dogie
Legendary
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dogiecoin.com
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June 14, 2013, 12:21:01 PM |
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If you don't get your unit until middle/end of august, you won't see your money back. That's not great odds.
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Bitcoinorama
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June 14, 2013, 12:26:29 PM |
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If you don't get your unit until middle/end of august, you won't see your money back. That's not great odds.
BS.
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Make my day! Say thanks if you found me helpful BTC Address ---> 1487ThaKjezGA6SiE8fvGcxbgJJu6XWtZp
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KS
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June 14, 2013, 01:37:56 PM |
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If you don't get your unit until middle/end of august, you won't see your money back. That's not great odds.
BS. both o' yous
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innovation
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June 14, 2013, 09:09:51 PM |
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It is a challenge to both kncminer and us.
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Anenome5 (OP)
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June 14, 2013, 10:36:15 PM |
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If you don't get your unit until middle/end of august, you won't see your money back. That's not great odds.
Lol, where do you get this idea o_O The Jupiter miner would still make a marginal profit if the difficulty were 1 billion.
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Democracy is the original 51% attack.
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testerx
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June 15, 2013, 01:29:48 AM |
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But its been hinted that KNCMiner are doing a 28nM Structured ASIC, ie a HardCopy(tm) of an Altera FPGA design. That's much cheaper in up-front cost (the mask set is just the metalization/vias so much cheaper), but the per-unit cost is higher. It won't perform anything like a full custom ASIC. https://bitcointalk.org/index.php?topic=228068.msg2433194#msg2433194 (and subsequent posts). My concern is that they're making very lofty performance claims but if it's just an ASIC copy of the FPGA it's not likely to outperform the FPGA crazy significantly. I'm not sure where they're getting all this extra performance per watt from, are they solely depending on the fact that it's 28nm? I'm just worried it'll be another repeat of BFL's power estimates. They might be able to get 350Ghash but I doubt it's going to be come at the low watts they're quoting.
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DPoS
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June 15, 2013, 02:29:19 AM |
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But its been hinted that KNCMiner are doing a 28nM Structured ASIC, ie a HardCopy(tm) of an Altera FPGA design. That's much cheaper in up-front cost (the mask set is just the metalization/vias so much cheaper), but the per-unit cost is higher. It won't perform anything like a full custom ASIC. https://bitcointalk.org/index.php?topic=228068.msg2433194#msg2433194 (and subsequent posts). My concern is that they're making very lofty performance claims but if it's just an ASIC copy of the FPGA it's not likely to outperform the FPGA crazy significantly. I'm not sure where they're getting all this extra performance per watt from, are they solely depending on the fact that it's 28nm? I'm just worried it'll be another repeat of BFL's power estimates. They might be able to get 350Ghash but I doubt it's going to be come at the low watts they're quoting. that's why i hedged and got 2 saturns.. figured i'd be able to plug in one of them at the least and sell the other if i must crazy how much cloudhashing just said they are buying.. 35TH of the stuff.. if the power is way off that scales off the charts
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Anenome5 (OP)
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June 15, 2013, 04:01:04 AM |
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But its been hinted that KNCMiner are doing a 28nM Structured ASIC, ie a HardCopy(tm) of an Altera FPGA design. That's much cheaper in up-front cost (the mask set is just the metalization/vias so much cheaper), but the per-unit cost is higher. It won't perform anything like a full custom ASIC. https://bitcointalk.org/index.php?topic=228068.msg2433194#msg2433194 (and subsequent posts). My concern is that they're making very lofty performance claims but if it's just an ASIC copy of the FPGA it's not likely to outperform the FPGA crazy significantly. I'm not sure where they're getting all this extra performance per watt from, are they solely depending on the fact that it's 28nm? I'm just worried it'll be another repeat of BFL's power estimates. They might be able to get 350Ghash but I doubt it's going to be come at the low watts they're quoting. I'm not sure I understand your meaning. ASICs are much faster and more efficient than FPGAs. Nothing they've claimed is outside the realm of reality for a non-structured ASIC such as they claim to be using. It's just a real ASIC.
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Democracy is the original 51% attack.
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