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Author Topic: Experimenting with Jalapeno firmware...  (Read 62561 times)
lightfoot
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November 17, 2013, 01:29:37 AM
 #541

And in the category "I did what!" I just lowered the temps to 60c.

How?

Well, I thought about that other guy who put the cardboard shim between board and bottom heat plate and lamed the performance on his JP. Removed it, put plate against unit, works again.

How about if you put a heat sink *under* the now open Jally?

Well, I did it. I found an old IBM X366 heat sink that is about 2 square inches of copper base, fins, and all that. Used a drill bit to drill out two dimples to fit the bolts that hold the aluminum plate to the bottom of the jally, put some heat sink compound on it, and sat the JP on the sink. Put a little vornado fan pointing at this unholy mess.

From BFG miner I see 56 degree temps with the side fan *off*, 61 with it on. It might be that the bottom of this thing dissipates a *lot* of heat, so going with a good sink could be the right thing to do.

Next up? I'll think about getting some longer bolts, drill through the IBM sink, and make this a snugger fit. I am still going to keep that spacer on there, as keeping the copper plate *off* the back of the unit is critical now, and I consider *it* to be a good spacer.

Anyone know where I can get a real heat pipe heat sink and fan that came with the older jallies?

Chris
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November 17, 2013, 01:54:54 AM
 #542

Ok, I got the chips working. I just had to upgrade to the latest 1.2.9 firmware.
Did you reconfigure the firmware? I've only installed the jala configured fw for 1.2.9 where a bin was allready available.
I added one BFL on U5, but it is not identified, yet, maybe fw is not configured? I will try to add one more on U13 and try again.
Hello,

my fault was that I didn't removed the needless solder tin.
I removed all the blf chips from my slower Jally cleand the areas for the bgas and reflowed 4 of 2nd batch bfl chips on them.
After flashing with a modified 2.9 FW the jally started hashing, but the error rate is so much bad.
BFL sheets means the psr should spend 75 A but in fact the original pwr will not send more then 60 W from wall. In this case the sheets looks like wrong.

Also the max. clock frequency for 4 chips on the jally was ~200 MHz with ~ 8-10 cores per chip.

Last day I removed one of the bfl chips (which was not fully overlapped by the original heatsink).
After starting now the three remaining chips all runs still at 200 MHz, but now all chips reports 15-16 engines:

 [2013-11-17 02:18:21]   PROCESSOR 1: 16 engines @ 198 MHz -- MAP: FFFF                    
 [2013-11-17 02:18:21]   PROCESSOR 3: 15 engines @ 191 MHz -- MAP: FFDF                    
 [2013-11-17 02:18:21]   PROCESSOR 5: 16 engines @ 204 MHz -- MAP: FFFF                    
 [2013-11-17 02:18:21]   THEORETICAL MAX: 9297 MH/s                    
 [2013-11-17 02:18:21]   ENGINES: 47                    
 [2013-11-17 02:18:21]   FREQUENCY: 291 MHz                    

One of the problem could be to less voltage vor VCC core reported:

Voltages: 3.628 / 0.998 / 10.490

For my older jally it is a little bit higher:
Voltages: 3.544 / 1.001 / 12.410

I will check now how I can increase the voltage a little bit.

Cheers...
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November 17, 2013, 02:10:21 AM
Last edit: November 17, 2013, 02:54:56 AM by lightfoot
 #543

Hey there! Welcome to fun-land! I'm glad to see more people doing this :-)

Question: When you flashed the 1.2.9 code, did you select jalapeno, or little_single? The difference is that the code will lock to speed 1 (200mhz) for Jally and will go for 260+ for little singles. Try that, leave the diagnostics alone, and see what you get.

How did you reflow the chips? I have two more here to put on; one is new, the other is the one that I shorted solder. I've been working on cleaning it up with the heat tool, no idea if it will work when I put it back on. Tomorrow maybe.

Yes, the stock power supply is the pinnacle of garbage. That may be the limiting factor here. I have an ATX supply on the way, should get here *eventually*. Might just have to wait till then before doing the final two chips.

With the copper heat sink on the bottom I have solved all of my temp problems *except* for those three chips Q5,6,11. I'm guessing those are the three power MOSFETs. They weren't hot with two chips, they are warm now with 4....

I think I'll measure them tomorrow, and order some small RAM chip copper heat sinks for them. No reason why not, and that could allow them to go up a bit... higher...

And in the meantime, here is a picture of this monster.


C
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November 17, 2013, 02:03:04 PM
Last edit: November 17, 2013, 02:55:43 PM by lightfoot
 #544

So before I put on another chip today, I was thinking about this a bit more, specifically the FETs, life, heat, and why BFL shipped so damn late....

Here's the trick. Right now my JP is hashing away at full power and my whole stack (JP, X61 laptop, and two BE's) is pulling about 100 watts. Which is about the same amount of power I was pulling with 2 discrete jalapenos. My clock speeds on this one are about 271mh all around with one chip going at 248mh.

The problem here is not one of heat anymore (I have the dual heat sinks top and bottom), and not one of chip density. It's simply put one of power. Specifically 1 volt power, and how much we can pull before the system either crowbars the 1 volt supply (which seems to happen when I put the shorted chip on there, which is good; it can detect over current) or burns out the FETs (which are now rather warm)

So what do we have? According to the specs and the schematic, this thing had the capacity for 8 chips, and 80a coming out of the 1 volt converter. Fair enough, they were cutting it a bit close but the chips were supposed to pull only 10 watts or so anyway so it was all good. Remember when my Jally was delivered it only put out 30c temps with the chips clocked at 2.5 or so. Slow and low power. I went to 7.3gh and temps went up to 42c. 16gh and temps are at 60 with the super sink, 73 otherwise.

The big question then is how much power is each chip pulling on the 1 volt supply? Heat is the ultimate bullshit detector, and the fact that those FETs are warm-hot to the touch points out that they are pulling more power than expected for a 50% load. Also how much headroom did they build into the supply; I should be able to figure that out based on twelve FETs in the system (six push, six pull) except I see only 3 hot. Wait a second, maybe they only put half the FETs on this thing, why would they fully populate the fucking board if they are cheap...

Hm. Need to look at the pictures again. If all the FETs are not there then I need to add more and solder them on the board. Hm.

Ok, just checked the schematics, there are two sets of six FETs, the second set is barely warm, the first set is hot. Which means both sides are providing power, my guess is I may have laid out my chips so that three of them are being powered by one set, one the other. Will have to see if I can verify this, but it looks like everything is at least there.

Still, this brings up the 80a limit and the question: How much power does each chip sink? I doubt it's 10 watts, if 15 then we could get away with 5 chips (75 watts) but not six. If 20 then we are running max power now.

Anyone know? Also what is the formula for calculating the hash rate of a individual engine per megahertz? Maybe one solution is to slow speed down from 274 to 250, which may drop temps to the point where I can add these last two chips.

Base unit 30
With Jally in, no power 45
With jally hashing full blast 100

So that points strongly to 13.75 watts per chip *at the wall* (measured with P3 meter). That includes external POS supply inefficiency, they might only be 12.3 watts each. Which is why BFL had to abandon the single model, the chips put out too much heat and six chips would pull 74 out of the 80 amps they could budget for. So they went to a whole new board, and sold all the little single boards as Jalapenos.

THAT is why jallies shipped so early. They had to totally re-make the damn single boards and so they stuck two chips on a JP board, crippled it, and sent it out.

Now with a theoretical max of six chips I should be able to get 24gh out of this thing. But I think that is going to be the absolute limit, no sense in building an atomic-level cooler as boosting the clock will throw the unit overboard, and there will be no more than 80 watts of heat to dump.

HOWEVER and this is important: I need to figure out which 1 volt power supply is powering which socket. Reason being I think they are powering different sides of the board (or why would one be hot, one cold) and if I put another chip on the hot side I will overload its' FETs. So now I need to see if I can trace out which chip is which and what sources what here.

Edit: Hm. All the schematics point to VCC_D and GND to being totally agnostic. Which might be a problem if one set of FETs is getting hot and the other is not; I seem to recall that curtiss controllers ran large amounts of FETs in parallel and they didn't always share the load evenly. The fail mode was that some got hotter, which caused them to sink more power which....

Hilarity followed as the FETs would all explode down the rail. At 200 volts it was kind of cool; that's why we went to big-assed IGBTs. Well if they blow I might replace them with 60a MOSfets on a custom external board. Or I wonder if I could just have the gate drive a 400a dual IGBT. Granted it's as big as the JP but it would provide a lot. more. power.

Interesting. Final result may be 6 chip jallies and that's it. I'll get a thermometer, do some measures, then put chip 5 on today. And some small bolts.
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November 17, 2013, 05:31:12 PM
Last edit: November 17, 2013, 06:08:40 PM by lightfoot
 #545

And we are at *20*. This was harder, as the chip did not work after the first flow (base 300f, heat 400c for 60 seconds direct on chip), did after the second but then stopped working when heat sink put on (no base heat, 400c for 80s direct), then did after the third flow (base 325F, heat 400c for 120 seconds direct blast on chip at max airflow followed by fan to cool immediately). I think because this one is next to another chip at the point where the communications lines those balls were getting shadowed for heat and thus was not working. Moral is you need a metric fuckload of heat (as opposed to say an SAE fuckload of heat) to make these chips come down.

Unit is up. Holding at 19.8gh, temp 64-65 power draw is now up to 120 watts for the whole rig, so adding the chip added another 20 watts of power draw at the wall. Yep, these chips pull more power, I'm guessing 15 watts each. So 6 chips might be all folks.

Power supply is at 90F, highest temp on the board by the FETs is 126F. So it's holding. Note I have a 20 watt vornado fan with the cloth blades pointed at the power supply, then the copper bottom heat sink for some external airflow. That might be why it is not imploding. Yet.

We'll try that in another few days. In the meantime I need to order some slightly longer heat sink screws as the next step is going to be slather the bottom with heat sink compound, drill two holes through that copper sink, and run the bolts through copper sink, AL plate, jally, aluminum sink. Then I will find some 3mm bolts so I can mount the fan more properly and call this a done project.

Well, done till I decide to put on that last chip. Note: I think the reason why the temps did not go up much with this chip is because it's on the board in one of the outside center pads which is covered completely by the top heat sink. I'm guessing that the two corner chips are not completely covered, and thus are not dropping all their heat into the top sink. Because BFL switched to BGA, they can direct their heat *down* as well, thus the bottom sink is going to chernobyl temps. Except it's not anymore because I have massive manly sink on the bottom.

Holy crap, Eligus sees my holy hashrate at 20gh/s. I'm starting to feel the need. The need for more... speed.

I think I'll look at this last chip and see if it can be resurrected. If I'm right, BFL just has a massive copper plate inside these things that short all the grounds and +1's together. So if some of the balls are missing on the power connections it might be a "who gives a fuck" as long as all the balls for the communications stuff (like 10 lines total) are intact.

20gh from a Jally. Cool.

Note: I am going to start my own thread Hacking a BFL Jalapeno to 20GH and beyond since I am kinda clogging this thread with stuff.

C

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November 19, 2013, 12:38:18 AM
 #546

I think I'll look at this last chip and see if it can be resurrected. If I'm right, BFL just has a massive copper plate inside these things that short all the grounds and +1's together. So if some of the balls are missing on the power connections it might be a "who gives a fuck" as long as all the balls for the communications stuff (like 10 lines total) are intact.
If the chip is intact in general you can reball the chip by leaded balls. I did this allready for two 1st batch chips. There many you tube movies which explains reballing. The minimum you need is desoldering strips, lead balls 0.5mm, no-clean soldering paste, tweezers, loupe light, a temp controlled air gun.

For easier soldering later a heating plate is a good idea to pre heat the pcb. With lead balls you need 160 °C.
A electric pan is good for this (costs < 30 $) but use a aliminium plate in a sand bath to uniform spread the heat.
And use a thermometer to measure the exact temperature at the board ( I use the top side and fix the sensor with kapton strip)

Before resolder the chip clean the area on pcb with desoldering strip as well ;-)

Cheerss...
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November 19, 2013, 01:02:46 AM
 #547

I have a pre heater and have been going.with 300f or so. I'll try removing all balls and.soldering direct to board.
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November 19, 2013, 09:49:06 PM
 #548

I'd love to see a full how-to document on adding more chippys to a jally.  Thank you in advance. 
By the way, I wrote up a pretty good summary of how to do it on my other thread. Got the temps, times, and tools needed to make this happen.

Note that I'm going for 8 chips now with some more serious heat sinking. Apparently it's possible. And what's the worst that can happen?

C
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November 22, 2013, 10:58:48 PM
 #549

Hi Guys,

My 5Gh miner never really did much more than 4.6-4.8 even with the case off and cold reboots.

After getting a Raspberry PI to flash a few firmwares and some trial and error + some persistence I finally have managed to get it going to just over 5k. But clearly not the 7k I was hoping for.

I did a GetInfo on my unit before I began to monkey with it.

======original dump==========
[ID] => BAJ0
[GetInfo] => DEVICE: BitFORCE SC0x0aFIRMWARE: 1.2.90x0aIAR
Executed: NO0x0a
CHIP PARALLELIZATION: YES @ 20x0a
QUEUE DEPTH:400x0a
PROCESSOR 3: 10 engines @ 264 MHz -- MAP: FF060x0a
PROCESSOR 7: 7 engines @ 295 MHz -- MAP: B40E0x0a
THEORETICAL MAX: 4705 MH/s0x0a
ENGINES: 170x0a
FREQUENCY: 291 MHz0x0a
CRITICAL TEMPERATURE: 00x0a
TOTAL THERMAL CYCLES: 00x0aX
LINK MODE: MASTER0x0aX
LINK PRESENT: NO0x0aOK0x0a0x00
==========================================


Curious why it only shows 10 and 7 engines while everyone else is talking about 13-15?

Did I get chips from the bottom of the barrel? Can I do anything about it?

Thanks
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November 23, 2013, 01:45:44 AM
 #550

Hm. That might be the crappiest jalapeno in the universe :-) I guess it is possible that it's really that sad, I thought my chips were in need of love.

Did you scan it again after you flashed it?

I've found that lowering the error checking loops might help, as will boosting to speed 7. However don't disable error checking all the way, it just results in a lot of power wasted.

Perhaps you could put some more chips on it?

Chris
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November 23, 2013, 02:37:29 AM
Last edit: November 23, 2013, 02:54:58 AM by babaji.ca
 #551

Thanks for the quick reply and your sympathy lightfoot.

I have had some wins... After flashing some pre rolled bin / hex files found here:
https://forums.butterflylabs.com/jalapeno-single-sc-support/4484-reflashing-jalapeno-using-raspberry-pi-9.html#post65993

I was able to ignite 14 engines on each Using the SC_9 Gen Tarkin from above

after flashing SC_7_1.29 GEN_TARKIN
================================
[ID] => BAJ0
[GetInfo] => DEVICE: BitFORCE SC0x0a
FIRMWARE: 1.2.90x0aIAR
Executed: NO0x0a
CHIP PARALLELIZATION: YES @ 20x0a
QUEUE DEPTH:400x0a
PROCESSOR 3: 14 engines @ 265 MHz -- MAP: FFBE0x0a
PROCESSOR 7: 14 engines @ 294 MHz -- MAP: FDFE0x0a
THEORETICAL MAX: 7826 MH/s0x0a
ENGINES: 280x0aFREQUENCY: 291 MHz0x0a
CRITICAL TEMPERATURE: 00x0a
TOTAL THERMAL CYCLES: 00x0aX
LINK MODE: MASTER0x0aX
LINK PRESENT: NO0x0aOK0x0a0x00



 cgminer version 3.8.2 - Started: [2013-11-22 21:21:55]
--------------------------------------------------------------------------------
 (5s):7.758G (avg):7.616Gh/s | A:134  R:0  HW:76  WU:71.1/m
 ST: 2  SS: 0  NB: 1  LW: 268  GF: 0  RF: 0
 Connected to stratum.mining.eligius.st diff 2 with stratum as user xxxxxxxxxxxxxxxxxxxxxxxxxxxx
 Block: 5959e7b5...  Diff:609M  Started: [21:21:55]  Best share: 47
--------------------------------------------------------------------------------
 [P]ool management Settings [D]isplay options [Q]uit
 BAJ 0:  max 38C 2.72V | 7.892G/7.823Gh/s | A:136 R:0 HW:78 WU: 72.5/m
--------------------------------------------------------------------------------

 [2013-11-22 21:23:09] Accepted 1de3b909 Diff 9/2 BAJ 0
 [2013-11-22 21:23:11] Accepted 165f9fd0 Diff 11/2 BAJ 0
 [2013-11-22 21:23:17] Accepted 563390db Diff 3/2 BAJ 0
 [2013-11-22 21:23:19] Accepted 5a0b91c9 Diff 3/2 BAJ 0
 [2013-11-22 21:23:25] Accepted 100e96c4 Diff 16/2 BAJ 0
 [2013-11-22 21:23:26] Accepted 1a7bacbb Diff 10/2 BAJ 0
 [2013-11-22 21:23:28] Accepted 057edf82 Diff 47/2 BAJ 0
 [2013-11-22 21:23:28] Accepted 7abdc9f7 Diff 2/2 BAJ 0
 [2013-11-22 21:23:30] Accepted 66eebe73 Diff 2/2 BAJ 0
 [2013-11-22 21:23:31] Accepted 7e69a52a Diff 2/2 BAJ 0
 [2013-11-22 21:23:31] Accepted 7496e3b1 Diff 2/2 BAJ 0
 [2013-11-22 21:23:35] Accepted 45d923c1 Diff 4/2 BAJ 0
 [2013-11-22 21:23:35] Accepted 267de5f5 Diff 7/2 BAJ 0
 [2013-11-22 21:23:36] Accepted 7ddf67df Diff 2/2 BAJ 0
 [2013-11-22 21:23:38] Accepted 6c0c1759 Diff 2/2 BAJ 0
 [2013-11-22 21:23:38] Accepted 7dbd57d7 Diff 2/2 BAJ 0
 [2013-11-22 21:23:38] Accepted 45d9e2b3 Diff 4/2 BAJ 0
 [2013-11-22 21:23:44] Accepted 20d4eda9 Diff 8/2 BAJ 0
 [2013-11-22 21:23:46] Accepted 6a3baab3 Diff 2/2 BAJ 0
 [2013-11-22 21:23:46] Accepted 05cba824 Diff 44/2 BAJ 0
 [2013-11-22 21:23:48] Accepted 743c10ce Diff 2/2 BAJ 0


 bfgminer version 3.6.0 - Started: [2013-11-22 21:25:40] - [  0 days 00:03:27]
 [M]anage devices [P]ool management Settings [D]isplay options  [H]elp [Q]uit
 Connected to stratum.mining.eligius.st diff 2 with stratum as user xxxxxxxxxxxxxxxxxxxxxxxxxxxx
 Block: ...1e3842b7 #271027  Diff:609M ( 4.36Ph/s)  Started: [21:27:42]
 ST:5  F:0  NB:2  AS:0  BW:[199/ 99 B/s]  E:8.72  I:  188uBTC/hr  BS:256
 1/2     39.0C |  7.59/ 7.70/ 4.91Gh/s | A:129 R:7+0(5.1%) HW:119/ 33%
--------------------------------------------------------------------------------
 BFL 0a: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0b: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0c: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0d: 39.0C |  3.71/ 3.66/ 2.39Gh/s | A: 66 R:2+0(2.9%) HW: 46/ 28%
 BFL 0e: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0f: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0g: 39.0C |   0.0/  0.0/  0.0 h/s | A:  0 R:0+0(none) HW:  0/none
 BFL 0h: 39.0C |  4.06/ 4.07/ 2.45Gh/s | A: 64 R:5+0(7.2%) HW: 74/ 37%
--------------------------------------------------------------------------------
 [2013-11-22 21:29:07] Accepted 60f4fc69 BFL 0h Diff 2/2
 [2013-11-22 21:29:08] Accepted 39cfcd4d BFL 0h Diff 4/2
 [2013-11-22 21:29:09] Accepted 1bc0a85d BFL 0h Diff 9/2
 [2013-11-22 21:29:13] Accepted 43580f3d BFL 0d Diff 3/2
 [2013-11-22 21:29:16] Accepted 0aea12d4 BFL 0d Diff 23/2
 [2013-11-22 21:29:16] Accepted 5b39578c BFL 0d Diff 2/2
 [2013-11-22 21:29:17] Accepted 29aa13c3 BFL 0d Diff 6/2
 [2013-11-22 21:29:19] Accepted 7a99cee9 BFL 0h Diff 2/2
 [2013-11-22 21:29:22] Accepted 5b4a65b7 BFL 0h Diff 2/2
 [2013-11-22 21:29:22] Accepted 1b49faff BFL 0h Diff 9/2
 [2013-11-22 21:29:26] Accepted 066badbd BFL 0d Diff 39/2
 [2013-11-22 21:29:26] Accepted 31389b67 BFL 0h Diff 5/2
 [2013-11-22 21:29:28] Accepted 7743ab98 BFL 0d Diff 2/2
 [2013-11-22 21:29:29] Accepted 481ebbf3 BFL 0h Diff 3/2
 [2013-11-22 21:29:30] Accepted 6b0e7c0f BFL 0h Diff 2/2
 [2013-11-22 21:29:33] Accepted 06e68677 BFL 0d Diff 37/2
 [2013-11-22 21:29:35] Stratum from pool 0 requested work update
 [2013-11-22 21:29:35] Accepted 43cc046f BFL 0h Diff 3/2
 [2013-11-22 21:29:37] Accepted 174fc504 BFL 0d Diff 10/2
 [2013-11-22 21:29:40] Accepted 098dd44d BFL 0d Diff 26/2
 [2013-11-22 21:29:44] Accepted 2ff7e690 BFL 0d Diff 5/2
 [2013-11-22 21:29:44] Accepted 10c868ff BFL 0d Diff 15/2
 [2013-11-22 21:29:46] Accepted 19be3912 BFL 0d Diff 9/2
 [2013-11-22 21:29:48] Accepted 50c82456 BFL 0h Diff 3/2
 [2013-11-22 21:29:52] Accepted 3275d09d BFL 0h Diff 5/2
 [2013-11-22 21:29:57] Accepted 6459f162 BFL 0d Diff 2/2



getting tons of errors I may go back to SC_7 GenTarkin (i think i was doing better with that, but may try SC_8 first)



I am still really green and am not sure how to make any adjustments myself (other than flashing pre-rolled firmwares).
If there is further tuning I could try, or if you think there is room for improvement please let me know.
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November 23, 2013, 03:13:39 AM
 #552

Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.

Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.

C
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November 23, 2013, 03:54:05 AM
 #553

since the thread is long and messy. what are current finds - how fast can it run now max?

yolo
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November 23, 2013, 04:04:02 AM
 #554

Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.

Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.

C

How do I adjust the speed to 7? Go back to the SC_7 pre-complied bin on that page i linked to? Or is there a way to pass it commands?
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what is this "brake pedal" you speak of?


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November 23, 2013, 07:35:41 PM
 #555

since the thread is long and messy. what are current finds - how fast can it run now max?

depends on the chips.. so luck of the draw.

theoretical max is near 9 ghs with a stock jally.

best so far seems to be 8.5 or so (with a stock 2 chip jally).

cks firmware is solid.
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November 24, 2013, 02:59:05 PM
 #556

Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.

Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.

C

How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
Probably. If you're compiling your own code it's over in std_defs.h,

 __ASIC_FREQUENCY_ACTUAL_INDEX   7

Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.

C
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November 24, 2013, 09:12:27 PM
 #557

Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.

Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.

C

How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
Probably. If you're compiling your own code it's over in std_defs.h,

 __ASIC_FREQUENCY_ACTUAL_INDEX   7

Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.

C


When you say 7.3gh does that mean actual effective rate after errors? ie are you getting that in the pool?
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November 24, 2013, 10:16:58 PM
Last edit: September 23, 2014, 07:03:40 PM by lightfoot
 #558

Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.

Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.

C

How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
Probably. If you're compiling your own code it's over in std_defs.h,

 __ASIC_FREQUENCY_ACTUAL_INDEX   7

Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.

C


When you say 7.3gh does that mean actual effective rate after errors? ie are you getting that in the pool?
Yep. Pool rate. With CK's software I was averaging well under 1% errors, with others as high as 20%. My chips really were... 4.5gh tops chips :-)

I'm pulling between 19 and 20. Wish I could go higher. Drat.
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November 25, 2013, 12:06:43 AM
 #559

That's a great error rate. I think I am doing about 20% right now with the pre rolled gentrakin bin sc_7_1.29 firmware. At least I am up from the stock 4600mhz w/ 6% errors to  5740mhz despite the 20% erros BFG shows.

It's running about 40-41c. Do you think it's ok to run with such a high error rate?

I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.


I would be interested in trying ck's 1.25 , but I imagine I need to find a windows box to run atmel studio? Is it pretty much ready to compile asside from needing to set  __ASIC_FREQUENCY_ACTUAL_INDEX   to 7 ?

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November 25, 2013, 01:09:55 AM
 #560

That's a great error rate. I think I am doing about 20% right now with the pre rolled gentrakin bin sc_7_1.29 firmware. At least I am up from the stock 4600mhz w/ 6% errors to  5740mhz despite the 20% erros BFG shows.

Hm. Should go a bit higher than that. Try CK's 1.2.5 pre-roll; it's further back in this thread. Tarkin's is nice but the problem is he turns off error checking on the cores, and since our cores have more errors, you wind up with dead cores being submitted as work which slows down and wastes power.

Quote
I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.

Going to 4-5 was not a problem, however I seem to have stalled. Either the last two chips I got were duds or something really went weird. I'll see if I can get another chip to try a different tack.

Try Ck's elf.

C
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