silver71
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February 27, 2014, 03:06:45 PM |
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Thank you Zefir for handling this process, as for all the DIY people we wish you a great success with your designs and thanks for all the feedback given, we are working on fixing the reference design files and committing them to the git repository soon. The base files for building the OpenEmbedded/Yocto-based rpi image will also be committed soon so that everybody willing to develop forks based on it is very welcome to do so (and share back)  Is there any possibility for SD-card to be accessible from the front/back, in case change/new yacto-image or improvements are to be deployed, so that rig/desk can remain hashing with old SD-image and new-one is prepared offline, and just cards swapped and rig/desk restarted. I think this will improve overall reliability of the machines and make rigs/desks ready for future improvements and it also saves time, in case SD-card is damaged. Stuff like this might be very handy, and will not violate warranty in case of SD-card malfunction. Blockchain file will grow more and more in the future, so one day, user might need to insert biger SD-card, and if it's unaccessable from the outside, it might make problems. This might be a solution. at least as an idea, for possible hardware forks. http://www.amazon.com/46cm-Card-Extension-Cable-Case/dp/B007X0GV5S |
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shaohui
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February 28, 2014, 12:17:45 AM |
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A1 28nm chip microarrays How to buy this? Provide technical item? I come from China 33007500@qq.com |
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shaohui
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February 28, 2014, 12:25:03 AM |
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good news
I want to produce 1T or 2T machines, can provide what help? |
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zefir (OP)
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February 28, 2014, 11:04:15 AM |
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The base files for building the OpenEmbedded/Yocto-based rpi image will also be committed soon so that everybody willing to develop forks based on it is very welcome to do so (and share back) Is there any possibility for SD-card to be accessible from the front/back, in case change/new yacto-image or improvements are to be deployed, so that rig/desk can remain hashing with old SD-image and new-one is prepared offline, and just cards swapped and rig/desk restarted. I think this will improve overall reliability of the machines and make rigs/desks ready for future improvements and it also saves time, in case SD-card is damaged. Stuff like this might be very handy, and will not violate warranty in case of SD-card malfunction. Blockchain file will grow more and more in the future, so one day, user might need to insert biger SD-card, and if it's unaccessable from the outside, it might make problems. a) what is the advantage of having a secondary SD card slot over flashing the new FW image to your miner's primary SD card once you are done creating it? b) the SD-card is almost read-only, i.e. only configuration changes are written, everything else goes into memory mapped temp file systems - with that, risk of wearing out the SD card is minimal c) the FW image is tiny (like 30-50MB) and won't grow significantly in the future; the blockchain is not stored on the SD (for what?), so the smallest SD-card available is still orders of magnitude too big for the FW - we won't run into space issues A1 28nm chip microarrays How to buy this? Provide technical item? I come from China
I want to produce 1T or 2T machines, can provide what help?
This is the DIY thread, i.e. meant for those who are doing their own design and needed chips in smaller quantities to test prototypes. Chips will remain available at Bitmine's online-shop, either in production volumes or in single sample chip quantities. As for the board design: if you are not going to design your own board, you might want to contact one of the various projects that are working on A1 based mining gear. |
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silver71
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February 28, 2014, 02:58:13 PM |
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The base files for building the OpenEmbedded/Yocto-based rpi image will also be committed soon so that everybody willing to develop forks based on it is very welcome to do so (and share back) Is there any possibility for SD-card to be accessible from the front/back, in case change/new yacto-image or improvements are to be deployed, so that rig/desk can remain hashing with old SD-image and new-one is prepared offline, and just cards swapped and rig/desk restarted. I think this will improve overall reliability of the machines and make rigs/desks ready for future improvements and it also saves time, in case SD-card is damaged. Stuff like this might be very handy, and will not violate warranty in case of SD-card malfunction. Blockchain file will grow more and more in the future, so one day, user might need to insert biger SD-card, and if it's unaccessable from the outside, it might make problems. a) what is the advantage of having a secondary SD card slot over flashing the new FW image to your miner's primary SD card once you are done creating it? b) the SD-card is almost read-only, i.e. only configuration changes are written, everything else goes into memory mapped temp file systems - with that, risk of wearing out the SD card is minimal c) the FW image is tiny (like 30-50MB) and won't grow significantly in the future; the blockchain is not stored on the SD (for what?), so the smallest SD-card available is still orders of magnitude too big for the FW - we won't run into space issues Extension was not intented to be used as 2ns SDcard, but as primary, just accessible from chasis, just because nobody knows what will happen in 12-18 months...so why not if that's not too complicated ? |
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zulover
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March 04, 2014, 05:24:02 PM |
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anyone got any chips for sale , need about10, pm me please.
thanks
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[gadget]
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March 05, 2014, 08:32:50 PM |
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Got my PCB made this week. Anyone else working on a reference build? Would love to compare notes https://i.imgur.com/J34PiOI.jpg |
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end18
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March 06, 2014, 12:22:48 AM |
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Dimoza
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March 06, 2014, 02:58:11 AM |
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nice job! could you show assembled board? both sides? would be interesting to see your cooling solution. |
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[gadget]
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March 06, 2014, 04:30:28 AM |
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The url isn't working for me somehow... Did you figure out the typos in the BOM by any chance? nice job!
could you show assembled board? both sides? would be interesting to see your cooling solution.
will do. After exhaustive searching I finally ordered a heatsink + some fans last night. It will cover the entire back side and will attach via the screw holes, with some thermal padding in-between. |
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silver71
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March 06, 2014, 11:36:39 AM |
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The url isn't working for me somehow... Did you figure out the typos in the BOM by any chance? nice job!
could you show assembled board? both sides? would be interesting to see your cooling solution.
will do. After exhaustive searching I finally ordered a heatsink + some fans last night. It will cover the entire back side and will attach via the screw holes, with some thermal padding in-between. Do you need corrected BOM ? I can send you one... |
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jpo
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March 06, 2014, 03:31:41 PM |
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The url isn't working for me somehow... Did you figure out the typos in the BOM by any chance? nice job!
could you show assembled board? both sides? would be interesting to see your cooling solution.
will do. After exhaustive searching I finally ordered a heatsink + some fans last night. It will cover the entire back side and will attach via the screw holes, with some thermal padding in-between. Do you need corrected BOM ? I can send you one... Mines on my way! I examined the gerber files pretty thoroughly and couldn't find any errors. Have you ran into any issues with the design itself? On the BOM I selected an alum cap, P15077CT-ND, for C500, C501... Obviously they didn't mean to use an LDO converter and I don't think they meant an axial cap either. I think was the biggest misprint. Also, I have plenty of right angle pci-e power connectors and plan on soldering them on the underside of the board(backwardz) so polarization is still correct. I couldn't seem to find the upright ones. Could you send me yours. I'm curious what components you ended up selecting. |
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Dexter770221
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March 06, 2014, 04:19:25 PM |
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....
Also, I have plenty of right angle pci-e power connectors ...
....
Could you give me part number for those? I was searching molex site but didn't found it. Maybe digikey part number if you have. BIG thx. |
Under development Modular UPGRADEABLE Miner (MUM). Looking for investors.
Changing one PCB with screwdriver and you have brand new miner in hand... Plug&Play, scalable from one module to thousands.
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jpo
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March 06, 2014, 04:58:59 PM |
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....
Also, I have plenty of right angle pci-e power connectors ...
....
Could you give me part number for those? I was searching molex site but didn't found it. Maybe digikey part number if you have. BIG thx. I use Mouser for those. Digikey doesn't stock them as well. Part number 45558-0003. Also the upright connectors in the BOM don't match the pitch I measured in the gerbers, so the part is completely wrong. The pitch does match the part number above though. Just checked looks like Mouser has upright connector with correct pitch as well. 45718-0002 |
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chipman
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March 06, 2014, 07:50:05 PM |
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This might be a daft question, I have been looking at the reference board and I was planning to get a couple made up. The boards have an IN and OUT SPI connection am I right in thinking that I can for example connect 3 together and run and Raspberry PI or am I missing something?
Thanks
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[gadget]
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March 06, 2014, 09:35:10 PM |
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Do you need corrected BOM ? I can send you one...
Yes, please! ...
On the BOM I selected an alum cap, P15077CT-ND, for C500, C501... Obviously they didn't mean to use an LDO converter and I don't think they meant an axial cap either. I think was the biggest misprint. Also, I have plenty of right angle pci-e power connectors and plan on soldering them on the underside of the board(backwardz) so polarization is still correct. I couldn't seem to find the upright ones.
...
What did you do about L1, L2? They're marked at 470 nH in BOM, but 200 nH in the schematic ...
I use Mouser for those. Digikey doesn't stock them as well. Part number 45558-0003. Also the upright connectors in the BOM don't match the pitch I measured in the gerbers, so the part is completely wrong. The pitch does match the part number above though.
Just checked looks like Mouser has upright connector with correct pitch as well. 45718-0002
...
Nice job on finding those, I thought I'd searched all the way through but didn't find them other than on Digikey. But the pins on these don't match either. On digikey the pitch is 5.3mm(long side)/5.3mm(short side), on mouser the pitch is 4.2mm(long)/4.2mm(short), the actual measurement is 4.0mm(long)/5.0mm(short). I suppose one can bend the leads to make them fit... ...
The boards have an IN and OUT SPI connection am I right in thinking that I can for example connect 3 together and run and Raspberry PI or am I missing something?
...
I believe you can, unless something gets in the way (like as a heatsink) |
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silver71
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March 07, 2014, 08:07:27 AM |
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Corrections in BILL OF MATERIALS (BOM FILE FOR PCB) for DIY 2xA1 (Bitmine Coincraft) project :
CORRECTION #1
old wrong digikey partnumber : HHR13399-7350-2-ND
part : capacitor C10, 33 pF
desc : Multilayer Ceramic Capacitor
CORRECT PART NUMBER : 399-7350-2-ND
vendor : Kemet
CORRECTION #2
old wrong digikey partnumber : 2512063007Y3 wrong P/N not Digikey but FAIR-RITE part: 2512063007Y3 [digikey P/N for this item does not exist)
part : FB
desc : Ferrite bread resistor
CORRECT PART NUMBER : FAIR-RITE part: 2512063007Y3 - ! this part is not available thru digikey database !
vendor : FAIR-RITE Products Corp, available thru : Farnell, Arrow, Mouser and many others
The rest is OK.
Who wants whole BOM in XLS with vendor details, pricing for parts, PM me.
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silver71
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March 07, 2014, 09:49:59 AM
Last edit: March 07, 2014, 10:03:08 AM by silver71 |
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TITLE :
DIY A1 PCB WITH RASPBERRY PI AS CONTROLLER
YACTO-IMAGE TURBO-MODE KERNEL DEVELOPERS GUIDLINE
DESCRIPTION :
LIMITATIONS AND BOTTLENECKS regarding TURBO-MODE for RPI-based controllers with Raspberry Pi - technical
YACTO-IMAGE DEVELOPERS guidline
CONTENTS :
About Raspberry Pi
Transmission Performance issues
Reception performance issues
RAW TEXT :
About the controller
The Raspberry Pi (model B) in the rest of the text mentioned as RPi or RasPi,
is a low-cost computer designed for educational purposes, developed by the
Raspberry Pi Foundation charity. Its main component is a BCM2835 system-on-
chip by Broadcom, which features an ARM1176JZF-S processor running at
700 Mhz (1 GHz boosts), and a Videocore 4 GPU, capable of high-definition
video resolutions and support for OpenGL ES2.0. It also mounts a LAN9512
PHY by SMSC, with 100 Mb/s Ethernet capabilities.
The board provides the Ethernet RJ-45 socket, two USB-HS type A ports,
HDMI and composite video outputs, stereo Line headphone socket, and a
SD-HC card slot. Most of the BCM2835 signals (GPIO, UART, I2C, SPI,
PWM, display, camera, and so on), are exposed by a set of pin headers and
Camera Interface connectors. The model used for the benchmarks mounts
256 MiB of RAM.
The operating system is usually some flavor of Linux, but there exist at least
6-7 different choices, with Raspbian, a Debian-based Linux distribution
as most widely used with specific support for the Raspberry Pi. The platform is
controlled through a SSH connection, which makes negligible impact on the
performance. No other user software or services are running, except the SSH
connection and the benchmark executables.
Here are some benchmarkings for RPi which gives more insight into Rx/Tx issues, that is,
the problems which might occur while RPi talks to DIY boards and A1 chips.
Instead as single threads, like for the R2P_GW benchmarks, CPU usages were
collected as aggregate values from /proc/stat, while the network stack runs
at the system and interrupt levels.
Transmission performance issues
Similarly to R2P_GW, the RasPi generates /benchmark/output messages at
the maximum speed achievable, by not introducing forced delays. Timeouts
are disabled, and a single message actually resides in memory, being streamed
by the message loop.
The platform can saturate the host receiver at 20000 msg/s when
the message size is not greater than 200 B. The CPU is used less than 50%,
mainly by system processes (around 25%) and the topic handler (around 15%).
As the message size increases from 8 B to 200 B, the impact of (software)
interrupt requests grows, but stays below 10%.
Between 200 B and 500 B per message there is a sudden increase of the
CPU usage, saturated by interrupts and system processes, which limits the
throughput to 13000 msg/s. The topic handler usage stays around 15%,
which means that the Linux network stack has a substantial effect in these
circumstances.
With messages larger than 500 B there are no considerable changes in the CPU
usage. At 10000 msg/s interrupts have a share of 40% and system calls of
55%, while the topic handler uses the CPU for less than 5%. The bandwidth
gets close to 100 Mb/s, but it is still not reached at 10000 msg/s; indeed, the
idle time stays around 1% without growing.
Reception performance
The reception performance was measured by streaming messages at 14000 msg/s,
the maximum achievable by the host computer. As for R2P_GW, the reception
was first evaluated by buffering each new incoming message, and then by processing
the incoming message stream by skipping its contents.
Up to 100 B per message, the platform can receive all of the messages with low effort.
The CPU is idle for more than 40% of the time, with the topic handler using less
than 20% of the CPU time, and the system calls less than 40%. There is a
strange decrease in the effect of system calls at a message size of 50 B, probably
caused by some kernel optimization. The throughput stays at the maximum.
Between 100 B and 500 B, the CPU usage of interrupts increases over 40%, and
the CPU becomes saturated. The topic handler and system calls do not show
significant changes in their impact. After 200 B per message, the throughput
starts decreasing, but is still above 13000 msg/s.
With a message size beyond 500 B, the bandwidth is completely used. Software
interrupts use the CPU at 10%, while the effect of system calls keeps around
35%, and that of the topic handler decreases as low as 10%. The idle time
goes back to almost 50%.
The performance results of on-the-fly reception shows that bellow 100 B per message,
the platform can receive all of the messages with low effort.
The CPU is idle for 60% of the time, primarily used by system calls for less than 30%,
and the topic handler for 10%, the rest by (software) interrupts. Again, there is a
strange decrease in usage by system calls at a size of 50 B.
Between 100 B and 500 B per message, where the CPU usage of system calls
and interrupts increases up to 45% and 35% respectively, while the topic
handler stays slightly above 10%.
With a message size greater than 500 B, the bandwidth reaches the 100 Mb/s
limit, and the CPU load decreases. Software interrupts are steadily below 10%
as well as the topic handler, which keeps decreasing. System calls go down to
30%, and the idle time almost reaches 60% again.
CONCLUSION :
This is important when programming kernel for overclocking the boards and mining software on RPi,
since curently the more clock and power you bring to the boards (regardless of cooling), more errors you get,
so this might be a good guidline for future firmware and kernel improvements, for these things to have in mind.
In other words, there are RPi LIMITATIONS not A1 chip limitations, and in order to boost the hashing speed of desk(s) and rig(s) based on this chip (Concraft A1) and this PCB design (DIY 2xA1 board), this problem needs to be circumvented or exploited and it is the software issue, but off-course dependable on PCB fabric design.
The way it (RPi) communicates with daisy chained chips and boards populated with A1 chips is the principal bottleneck to reach TURBO-mode deployment, and cooling in this case is just a technical limitation for time-domain (long-term non-stop operation of desk(s) and rig(s) and should not be and issue for short-time speed trial boost, as a proof of concept, but currently it is mostly so.
THIS IS SO NOT A SOLUTION; BUT A GUIDLINE FOR SOMEONE TO FIND A SOLUTION FOR THIS.
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end18
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March 07, 2014, 10:00:46 AM |
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nice job! could you show assembled board? both sides? would be interesting to see your cooling solution. I taked picture before sending command to A1. (It can't be running without heat-sink.) I attached 55mm fan(with heat-sink assembly) to the bottom of PCB and attached to 50mm Heat-sink top side of asic( using 3M cooling pad. ) I consider Peltier cooling for this summer. |
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