[ANN][BLC] Blakecoin Blake-256 for GPU/FPGA With Merged Mined Pools Stable Net

[BlueDragon747]

LoL its so funny when people are fooling themselfs with a screen bug as being faster mining
On the new model Amd FX processor you get faster speeds with lesser cores enabled, my 8320 is a 8 core but i run it with -t 4 thats giving me the best results

The last minerd made is the one which have for each processor a different miner, they where released for litecoin and quark dated : 16 aug 2013
Versions released where : avx, avx2 barcelona(k10), generic, sse2, sse3, sse4 and one for the last fx versions called BD "for bulldozer".
However these versions do not have the "Blakecoin" option so i do not think they would work well

I agree that the hash rate shown on screen does not = higher block finds or higher network difficulty so its a bug when you set -t to huge number

I have not tried ig0tik3d x64 build so cannot say if that = higher hash rate

I based the cpu miner on pooler's fork Version 2.3.2 can you point me to the Github of the ones with extra optimizations and I will port in the changes if possible 

it does have "The miner can take advantage of AVX, AVX2 and XOP instructions" but you need to build it with mingw-w64

The biggest improvement that I have seen yet is to apply what kramble suggested and do midstate optimization which could result in 50% improvement

I am working on getting p2pool working atm and I do want to move onto GPU with opencl and kramble is currently working on FPGA miner so I don't want to spend too much time on CPU only hope that does not disappoint anyone but I have always made it clear this is a multi platform coin, with open source miners for CPU/GPU/FPGA

[1714928182]

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[1714928182]

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[bronan]

If i remember well the last i send you in pm was the one released all the specialized versions
However i am not sure if they also make such a huge difference on blc as they do at quark
But on quark it was impressive

Hope its helpfull

BTW people with the AMD APU cpu's like the A8/A10 your using probably also your internal gpu and i almost 99,9% certain its only using power for do 0,0 blocks finding because blc has not yet an opencl solution.

[BlueDragon747]

If i remember well the last i send you in pm was the one released all the specialized versions
However i am not sure if they also make such a huge difference on blc as they do at quark
But on quark it was impressive

Hope its helpfull

I will take a look now and see what I can do, this is very helpful thank you

[bronan]

Glad to be of help

The screen bug has never been fixed i think it was related to the HyperThreading pooler had once made the program look for cores but then it only found REAL cores and not fakes like HT
The amd however does have real cores which ofcourse is the blame for the higher power usage, the fact that these slow down is the shared cpu caches for 2 cores. The idea of sharing cache per 2 cores did not have such high impact as amd was hoping for in the real world. Its still a damn fast cpu anyway with good programming at certain programs it beats intel cpu's big time.

[loveys]

can't sync???

[BlueDragon747]

can't sync???

did you update your wallet?

Remember to update your wallets before block 3500 as I have fixed some bugs added more checkpoints and tweaked the up step to reduce large jumps upwards 

[ciklop1974]

Difficulty 24008 

[loveys]

can't sync???

did you update your wallet?

Remember to update your wallets before block 3500 as I have fixed some bugs added more checkpoints and tweaked the up step to reduce large jumps upwards 

now the blocks is ??

[BlueDragon747]

can't sync???

did you update your wallet?

Remember to update your wallets before block 3500 as I have fixed some bugs added more checkpoints and tweaked the up step to reduce large jumps upwards 

now the blocks is ??

block is 2996 but I also updated the checkpoints

[loveys]

  so higher diff,i can't get any coin

where is the working pool?

[BlueDragon747]

so higher diff,i can't get any coin

where is the working pool?

not any working pool that I have been told about.

I am working on p2pool hope that is ready soon

[Vorksholk]

Wow, difficulty is shooting up

[Aalesund]

 
Difficulty: 36529.66038121
What happened to the network?
I can not take even 1 block

[BlueDragon747]

Difficulty: 36529.66038121
What happened to the network?
I can not take even 1 block

new rules not in effect yet and large hashing power has joined the network 

I am trying to get p2pool working as quickly as I can 

info on p2pool:
https://bitcointalk.org/index.php?topic=18313.0

but it needs some changes that I am making now and maybe next few days to get it working on the Blakecoin network

[abdulmad]

My last six blocks all stales, only my first one confirmed. I have switched to the new miner that was posted in the thread after getting my first block, I'm back to using blake's original version, will see how it goes.

Cheers

[bronan]

I think either someone has found a real miner on gpu or some people was extreme lucky
But with 3 strong cpu i mined all night and did not get any blocks at all
The difficulty being so high means many gpu miners put massive power in the coin or try to mine with asics, if i am right they will not find any coins but for cpu mining a diff over 4 is extreme high

In my client it shows 2950 coins created so i wonder what is going wrong

I restarted the client and it updated on itself thats not good either because it have a solid connection to the net but when i reconnected it rushed towards block 3100

Someone is finding these 150 blocks but its not me

[smolen]

Code:

void QuarkBlake1_80_64(
	unsigned nonce,
	GLOBAL const UINT64 * RESTRICT input_swapped64,
	UINT64 *hash64)
{
	UINT64 M0, M1, M2, M3, M4, M5, M6, M7;
	UINT64 M8, M9;
	UINT64 V0, V1, V2, V3, V4, V5, V6, V7;
	UINT64 V8, V9, VA, VB, VC, VD, VE, VF;

	M1 = input_swapped64[0];
	M2 = input_swapped64[1];
	M3 = input_swapped64[2];
	M4 = input_swapped64[3];
	M5 = input_swapped64[4];
	M6 = input_swapped64[5];
	M7 = input_swapped64[6];
	M8 = input_swapped64[7];
	M9 = (((UINT64)(*(GLOBAL const UINT32*)&input_swapped64[8]))<<32)|((UINT64)nonce);
	M0 = 0x7000000000000000ULL|(((GLOBAL const UINT32*)&input_swapped64[8])[1]);

	V0 = 0xbb1838e7a1a34bd9ULL + (M0 ^ 0x13198A2E03707344ULL);
	VC = ROTR64(0x452821E638D011F7ULL ^ V0, 32);
	V8 = 0x243F6A8885A308D3ULL + VC;
	V4 = ROTR64(0x510E527FADE682D1ULL ^ V8, 25);
	V0 += V4 + (M1 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 = 0x566d1711b009135aULL + (M2 ^ 0x082EFA98EC4E6C89ULL);
	VD = ROTR64(0xBE5466CF34E90EECULL ^ V1, 32);
	V9 = 0x13198A2E03707344ULL + VD;
	V5 = ROTR64(0x9B05688C2B3E6C1FULL ^ V9, 25);
	V1 += V5 + (M3 ^ 0xA4093822299F31D0ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 = 0x5bf2cd1ef9d6b596ULL + (M4 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(0xC0AC29B7C97C50DDULL ^ V2, 32);
	VA = 0xA4093822299F31D0ULL + VE;
	V6 = ROTR64(0x1F83D9ABFB41BD6BULL ^ VA, 25);
	V2 += V6 + (M5 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 = 0x0130c253729b586aULL + (M6 ^ 0x3F84D5B5B5470917ULL);
	VF = ROTR64(0x3F84D5B5B5470917ULL ^ V3, 32);
	VB = 0x082EFA98EC4E6C89ULL + VF;
	V7 = ROTR64(0x5BE0CD19137E2179ULL ^ VB, 25);
	V3 += V7 + (M7 ^ 0xC0AC29B7C97C50DDULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M8 ^ 0xD1310BA698DFB5ACULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M9 ^ 0x9216D5D98979FB1BULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (0x8000000000000000ULL ^ 0xB8E1AFED6A267E96ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + 0x2FFD72DBD01ADFB7ULL;
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + 0x24A19947B3916CF7ULL;
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + 0xBA7C9045F12C7F98ULL;
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + 0x636920D871574E69ULL;
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (0x0000000000000280ULL ^ 0x0801F2E2858EFC16ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0x2FFD72DBD01ADFB7ULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (0x8000000000000000ULL ^ 0x0801F2E2858EFC16ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M4 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M8 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M9 ^ 0x636920D871574E69ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (0x0000000000000280ULL ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + 0xC0AC29B7C97C50DCULL;
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M6 ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M1 ^ 0xBA7C9045F12C7F99ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x13198A2E03707344ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M0 ^ 0xA4093822299F31D0ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M2 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + 0x3F84D5B5B5470917ULL;
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M7 ^ 0xB8E1AFED6A267E96ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M5 ^ 0x082EFA98EC4E6C89ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M3 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0x9216D5D98979FB1BULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M8 ^ 0xB8E1AFED6A267E96ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + 0x243F6A8885A308D3ULL;
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M0 ^ 0xBA7C9045F12C7F99ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M5 ^ 0xA4093822299F31D0ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M2 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (0x0000000000000280ULL ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + 0x636920D871574E68ULL;
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (0x8000000000000000ULL ^ 0x0801F2E2858EFC16ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x2FFD72DBD01ADFB7ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M3 ^ 0xC0AC29B7C97C50DDULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M6 ^ 0x082EFA98EC4E6C89ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M7 ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M1 ^ 0x3F84D5B5B5470917ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M9 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M4 ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M7 ^ 0xD1310BA698DFB5ACULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M9 ^ 0x3F84D5B5B5470917ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M3 ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M1 ^ 0x082EFA98EC4E6C89ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + 0xBA7C9045F12C7F98ULL;
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + 0x24A19947B3916CF7ULL;
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + 0x0801F2E2858EFC16ULL;
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + 0xB8E1AFED6A267E96ULL;
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M2 ^ 0xC0AC29B7C97C50DDULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M6 ^ 0xA4093822299F31D0ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M5 ^ 0x2FFD72DBD01ADFB7ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (0x8000000000000000ULL ^ 0xBE5466CF34E90C6CULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M4 ^ 0x243F6A8885A308D3ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M0 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (0x0000000000000280ULL ^ 0x9216D5D98979FB1BULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M8 ^ 0x636920D871574E69ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M9 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M0 ^ 0xD1310BA698DFB5ACULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M5 ^ 0x3F84D5B5B5470917ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M7 ^ 0xBE5466CF34E90C6CULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M2 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M4 ^ 0xA4093822299F31D0ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (0x8000000000000000ULL ^ 0x636920D871574E69ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (0x0000000000000280ULL ^ 0x2FFD72DBD01ADFB7ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + 0x13198A2E03707344ULL;
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M1 ^ 0x0801F2E2858EFC16ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + 0xBA7C9045F12C7F99ULL;
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + 0xB8E1AFED6A267E96ULL;
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M6 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M8 ^ 0xC0AC29B7C97C50DDULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M3 ^ 0x24A19947B3916CF7ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + 0x082EFA98EC4E6C88ULL;
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M2 ^ 0xBA7C9045F12C7F99ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + 0xA4093822299F31D0ULL;
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M6 ^ 0x2FFD72DBD01ADFB7ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (0x8000000000000000ULL ^ 0xC0AC29B7C97C50DDULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M0 ^ 0xB8E1AFED6A267E96ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + 0x243F6A8885A308D3ULL;
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M8 ^ 0x082EFA98EC4E6C89ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M3 ^ 0x9216D5D98979FB1BULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M4 ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x452821E638D01376ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M7 ^ 0xBE5466CF34E90C6CULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M5 ^ 0x3F84D5B5B5470917ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (0x0000000000000280ULL ^ 0x0801F2E2858EFC16ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + 0x636920D871574E69ULL;
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M1 ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M9 ^ 0x13198A2E03707344ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0xBE5466CF34E90C6CULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M5 ^ 0xBA7C9045F12C7F99ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M1 ^ 0x636920D871574E69ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (0x0000000000000280ULL ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + 0x24A19947B3916CF7ULL;
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + 0x0801F2E2858EFC17ULL;
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M4 ^ 0x2FFD72DBD01ADFB7ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (0x8000000000000000ULL ^ 0x452821E638D01377ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M0 ^ 0x3F84D5B5B5470917ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M7 ^ 0x243F6A8885A308D3ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M6 ^ 0x082EFA98EC4E6C89ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M3 ^ 0xC0AC29B7C97C50DDULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M9 ^ 0xA4093822299F31D0ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M2 ^ 0xD1310BA698DFB5ACULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M8 ^ 0xB8E1AFED6A267E96ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + 0x9216D5D98979FB1BULL;
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0xB8E1AFED6A267E97ULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + 0x24A19947B3916CF7ULL;
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M7 ^ 0x0801F2E2858EFC16ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + 0x3F84D5B5B5470917ULL;
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + 0x13198A2E03707344ULL;
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M1 ^ 0xBA7C9045F12C7F99ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M3 ^ 0xD1310BA698DFB5ACULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M9 ^ 0x082EFA98EC4E6C89ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M5 ^ 0x243F6A8885A308D3ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M0 ^ 0xBE5466CF34E90C6CULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (0x0000000000000280ULL ^ 0x452821E638D01377ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M4 ^ 0x636920D871574E69ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M8 ^ 0xC0AC29B7C97C50DDULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M6 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M2 ^ 0x2FFD72DBD01ADFB7ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (0x8000000000000000ULL ^ 0xA4093822299F31D0ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
		V0 += V4 + (M6 ^ 0x636920D871574E69ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (0x0000000000000280ULL ^ 0xC0AC29B7C97C50DDULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + 0xD1310BA698DFB5ACULL;
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M9 ^ 0x0801F2E2858EFC16ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + 0x082EFA98EC4E6C89ULL;
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M3 ^ 0xB8E1AFED6A267E96ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M0 ^ 0x9216D5D98979FB1BULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M8 ^ 0x243F6A8885A308D3ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + 0xA4093822299F31D0ULL;
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M2 ^ 0xBA7C9045F12C7F99ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + 0x3F84D5B5B5470916ULL;
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M7 ^ 0x24A19947B3916CF7ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M1 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M4 ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (0x8000000000000000ULL ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M5 ^ 0x2FFD72DBD01ADFB7ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (0x8000000000000000ULL ^ 0xA4093822299F31D0ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M2 ^ 0x2FFD72DBD01ADFB7ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M8 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M4 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M7 ^ 0xC0AC29B7C97C50DDULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M6 ^ 0x3F84D5B5B5470917ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M1 ^ 0xBE5466CF34E90C6CULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M5 ^ 0x13198A2E03707344ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (0x0000000000000280ULL ^ 0xB8E1AFED6A267E96ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x636920D871574E69ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M9 ^ 0x0801F2E2858EFC16ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + 0xD1310BA698DFB5ACULL;
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M3 ^ 0xBA7C9045F12C7F99ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + 0x082EFA98EC4E6C89ULL;
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + 0x243F6A8885A308D2ULL;
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M0 ^ 0x24A19947B3916CF7ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M0 ^ 0x13198A2E03707344ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M1 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M2 ^ 0x082EFA98EC4E6C89ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M3 ^ 0xA4093822299F31D0ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M4 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M5 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M6 ^ 0x3F84D5B5B5470917ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M7 ^ 0xC0AC29B7C97C50DDULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M8 ^ 0xD1310BA698DFB5ACULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M9 ^ 0x9216D5D98979FB1BULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (0x8000000000000000ULL ^ 0xB8E1AFED6A267E96ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + 0x2FFD72DBD01ADFB7ULL;
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + 0x24A19947B3916CF7ULL;
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + 0xBA7C9045F12C7F98ULL;
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + 0x636920D871574E69ULL;
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (0x0000000000000280ULL ^ 0x0801F2E2858EFC16ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0x2FFD72DBD01ADFB7ULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (0x8000000000000000ULL ^ 0x0801F2E2858EFC16ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M4 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M8 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M9 ^ 0x636920D871574E69ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (0x0000000000000280ULL ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + 0xC0AC29B7C97C50DCULL;
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M6 ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M1 ^ 0xBA7C9045F12C7F99ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x13198A2E03707344ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M0 ^ 0xA4093822299F31D0ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M2 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + 0x3F84D5B5B5470917ULL;
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M7 ^ 0xB8E1AFED6A267E96ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M5 ^ 0x082EFA98EC4E6C89ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M3 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + 0x9216D5D98979FB1BULL;
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M8 ^ 0xB8E1AFED6A267E96ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + 0x243F6A8885A308D3ULL;
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M0 ^ 0xBA7C9045F12C7F99ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M5 ^ 0xA4093822299F31D0ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M2 ^ 0xBE5466CF34E90C6CULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (0x0000000000000280ULL ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + 0x636920D871574E68ULL;
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (0x8000000000000000ULL ^ 0x0801F2E2858EFC16ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x2FFD72DBD01ADFB7ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M3 ^ 0xC0AC29B7C97C50DDULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M6 ^ 0x082EFA98EC4E6C89ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M7 ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M1 ^ 0x3F84D5B5B5470917ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M9 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M4 ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M7 ^ 0xD1310BA698DFB5ACULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M9 ^ 0x3F84D5B5B5470917ULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M3 ^ 0x13198A2E03707344ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M1 ^ 0x082EFA98EC4E6C89ULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + 0xBA7C9045F12C7F98ULL;
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + 0x24A19947B3916CF7ULL;
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + 0x0801F2E2858EFC16ULL;
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + 0xB8E1AFED6A267E96ULL;
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M2 ^ 0xC0AC29B7C97C50DDULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M6 ^ 0xA4093822299F31D0ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M5 ^ 0x2FFD72DBD01ADFB7ULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (0x8000000000000000ULL ^ 0xBE5466CF34E90C6CULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M4 ^ 0x243F6A8885A308D3ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M0 ^ 0x452821E638D01377ULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (0x0000000000000280ULL ^ 0x9216D5D98979FB1BULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M8 ^ 0x636920D871574E69ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
		V0 += V4 + (M9 ^ 0x243F6A8885A308D3ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + (M0 ^ 0xD1310BA698DFB5ACULL);
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M5 ^ 0x3F84D5B5B5470917ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (M7 ^ 0xBE5466CF34E90C6CULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M2 ^ 0x452821E638D01377ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + (M4 ^ 0xA4093822299F31D0ULL);
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (0x8000000000000000ULL ^ 0x636920D871574E69ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (0x0000000000000280ULL ^ 0x2FFD72DBD01ADFB7ULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + 0x13198A2E03707344ULL;
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + (M1 ^ 0x0801F2E2858EFC16ULL);
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + 0xBA7C9045F12C7F99ULL;
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + 0xB8E1AFED6A267E96ULL;
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (M6 ^ 0x9216D5D98979FB1BULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + (M8 ^ 0xC0AC29B7C97C50DDULL);
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M3 ^ 0x24A19947B3916CF7ULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + 0x082EFA98EC4E6C88ULL;
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);
	V0 += V4 + (M2 ^ 0xBA7C9045F12C7F99ULL);
	VC = ROTR64(VC ^ V0, 32);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 25);
	V0 += V4 + 0xA4093822299F31D0ULL;
	VC = ROTR64(VC ^ V0, 16);
	V8 += VC;
	V4 = ROTR64(V4 ^ V8, 11);
	V1 += V5 + (M6 ^ 0x2FFD72DBD01ADFB7ULL);
	VD = ROTR64(VD ^ V1, 32);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 25);
	V1 += V5 + (0x8000000000000000ULL ^ 0xC0AC29B7C97C50DDULL);
	VD = ROTR64(VD ^ V1, 16);
	V9 += VD;
	V5 = ROTR64(V5 ^ V9, 11);
	V2 += V6 + (M0 ^ 0xB8E1AFED6A267E96ULL);
	VE = ROTR64(VE ^ V2, 32);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 25);
	V2 += V6 + 0x243F6A8885A308D3ULL;
	VE = ROTR64(VE ^ V2, 16);
	VA += VE;
	V6 = ROTR64(V6 ^ VA, 11);
	V3 += V7 + (M8 ^ 0x082EFA98EC4E6C89ULL);
	VF = ROTR64(VF ^ V3, 32);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 25);
	V3 += V7 + (M3 ^ 0x9216D5D98979FB1BULL);
	VF = ROTR64(VF ^ V3, 16);
	VB += VF;
	V7 = ROTR64(V7 ^ VB, 11);
	V0 += V5 + (M4 ^ 0x24A19947B3916CF7ULL);
	VF = ROTR64(VF ^ V0, 32);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 25);
	V0 += V5 + 0x452821E638D01376ULL;
	VF = ROTR64(VF ^ V0, 16);
	VA += VF;
	V5 = ROTR64(V5 ^ VA, 11);
	V1 += V6 + (M7 ^ 0xBE5466CF34E90C6CULL);
	VC = ROTR64(VC ^ V1, 32);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 25);
	V1 += V6 + (M5 ^ 0x3F84D5B5B5470917ULL);
	VC = ROTR64(VC ^ V1, 16);
	VB += VC;
	V6 = ROTR64(V6 ^ VB, 11);
	V2 += V7 + (0x0000000000000280ULL ^ 0x0801F2E2858EFC16ULL);
	VD = ROTR64(VD ^ V2, 32);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 25);
	V2 += V7 + 0x636920D871574E69ULL;
	VD = ROTR64(VD ^ V2, 16);
	V8 += VD;
	V7 = ROTR64(V7 ^ V8, 11);
	V3 += V4 + (M1 ^ 0xD1310BA698DFB5ACULL);
	VE = ROTR64(VE ^ V3, 32);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 25);
	V3 += V4 + (M9 ^ 0x13198A2E03707344ULL);
	VE = ROTR64(VE ^ V3, 16);
	V9 += VE;
	V4 = ROTR64(V4 ^ V9, 11);

	hash64[0] = BSWAP64(V0 ^ V8 ^ 0x6A09E667F3BCC908ULL);
	hash64[1] = BSWAP64(V1 ^ V9 ^ 0xBB67AE8584CAA73BULL);
	hash64[2] = BSWAP64(V2 ^ VA ^ 0x3C6EF372FE94F82BULL);
	hash64[3] = BSWAP64(V3 ^ VB ^ 0xA54FF53A5F1D36F1ULL);
	hash64[4] = BSWAP64(V4 ^ VC ^ 0x510E527FADE682D1ULL);
	hash64[5] = BSWAP64(V5 ^ VD ^ 0x9B05688C2B3E6C1FULL);
	hash64[6] = BSWAP64(V6 ^ VE ^ 0x1F83D9ABFB41BD6BULL);
	hash64[7] = BSWAP64(V7 ^ VF ^ 0x5BE0CD19137E2179ULL);
}

[maxsolnc]

I think either someone has found a real miner on gpu or some people was extreme lucky
But with 3 strong cpu i mined all night and did not get any blocks at all
The difficulty being so high means many gpu miners put massive power in the coin or try to mine with asics, if i am right they will not find any coins but for cpu mining a diff over 4 is extreme high

In my client it shows 2950 coins created so i wonder what is going wrong

I restarted the client and it updated on itself thats not good either because it have a solid connection to the net but when i reconnected it rushed towards block 3100

Someone is finding these 150 blocks but its not me

I was lucky to get 3 blocks one by one 3 hours ago, and nothing from that moment 4 good servers (3*24-core Xeon, 1*8-core Xeon)

[BlueDragon747]

last block i got was 22:35 yesterday so if someone has a gpu miner its not me

think its most likly a cpu farm, vps servers or other cloud compute stuff

but still waiting for rule change

[abdulmad]

I think either someone has found a real miner on gpu or some people was extreme lucky
But with 3 strong cpu i mined all night and did not get any blocks at all
The difficulty being so high means many gpu miners put massive power in the coin or try to mine with asics, if i am right they will not find any coins but for cpu mining a diff over 4 is extreme high

In my client it shows 2950 coins created so i wonder what is going wrong

I restarted the client and it updated on itself thats not good either because it have a solid connection to the net but when i reconnected it rushed towards block 3100

Someone is finding these 150 blocks but its not me

I was lucky to get 3 blocks one by one 3 hours ago, and nothing from that moment 4 good servers (3*24-core Xeon, 1*8-core Xeon)

Only manage to find 6 stales through the night, will see how things go today, I have restarted my miner using blakes original 2 hours ago and haven't found a block to date.