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Author Topic: Ultra Under-overclock image for A2 Innosilicon by Emdje - V5.0  (Read 79748 times)
emdje (OP)
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March 19, 2015, 08:16:55 AM
 #241

I can for sure, just tell me how to do this, I'm not very familiar with linux.
PS: tried your 2.1 image, cgminer didn't start.

Ssh into the PI and follow this tutorial: http://www.penguintutor.com/news/raspberrypi/linux-static

For Ssh follow this:  https://learn.adafruit.com/adafruits-raspberry-pi-lesson-6-using-ssh/ssh-under-windows

Then open the file explorer and navigate to the /var/www. Right click the cgminer.log and open with leafpad. Select and copy the text until you see a couple of lines of accepted hashes and post is here.

Any questions? Just ask  Smiley
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March 19, 2015, 05:29:32 PM
 #242

Here is cgminer.log from the original innosilicon image for A2 new mini.

Code:
 [2015-03-19 20:24:28] Started cgminer 3.9.0 innosilicon-12chip-v0p5                    
 [2015-03-19 20:24:28] Run Reset=1                   
 [2015-03-19 20:24:28] ST MCU hardware reset start                   
 [2015-03-19 20:24:32] SPI Speed 4000 kHz                   
 [2015-03-19 20:24:32] ST MCU - Enable (Pre-header)                   
 [2015-03-19 20:24:32] Run    temperature 35C                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] A1 = 1200,7                   
 [2015-03-19 20:24:32] A1 PLL Clock = 1200MHz                   
 [2015-03-19 20:24:32] AUTO GPIO CS                   
 [2015-03-19 20:24:32] Failure(cs0)(2): missing ACK for cmd 0x02                   
 [2015-03-19 20:24:32] ACK(cs0) timeout:cmd_POWER_ON_BCAST-0.0587s                   
 [2015-03-19 20:24:32] SPI(cs0) no device                   
 [2015-03-19 20:24:32] ACK(cs0) timeout:cmd_RESET_BCAST - 0.31 ms                   
 [2015-03-19 20:24:32] Failure(cs1)(2): missing ACK for cmd 0x02                   
 [2015-03-19 20:24:32] ACK(cs1) timeout:cmd_POWER_ON_BCAST-0.0547s                   
 [2015-03-19 20:24:32] SPI(cs1) no device                   
 [2015-03-19 20:24:32] ACK(cs1) timeout:cmd_RESET_BCAST - 0.31 ms                   
 [2015-03-19 20:24:35] spidev0.0(cs2): Found 12 A2 chips                   
 [2015-03-19 20:24:35] Found chip  1 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  2 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  3 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  4 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  5 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  6 with  0 active cores                   
 [2015-03-19 20:24:35] Found chip  7 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  8 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip  9 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip 10 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip 11 with 54 active cores                   
 [2015-03-19 20:24:35] Found chip 12 with  0 active cores                   
 [2015-03-19 20:24:35] Found 12 chips with total 540 active cores                   
 [2015-03-19 20:24:35] Failure(cs3)(2): missing ACK for cmd 0x02                   
 [2015-03-19 20:24:35] ACK(cs3) timeout:cmd_POWER_ON_BCAST-0.0559s                   
 [2015-03-19 20:24:35] SPI(cs3) no device                   
 [2015-03-19 20:24:35] ACK(cs3) timeout:cmd_RESET_BCAST - 0.31 ms                   
 [2015-03-19 20:24:35] Failure(cs4)(2): missing ACK for cmd 0x02                   
 [2015-03-19 20:24:35] ACK(cs4) timeout:cmd_POWER_ON_BCAST-0.0527s                   
 [2015-03-19 20:24:35] SPI(cs4) no device                   
 [2015-03-19 20:24:35] ACK(cs4) timeout:cmd_RESET_BCAST - 0.30 ms                   
 [2015-03-19 20:24:38] spidev0.0(cs5): Found 12 A2 chips                   
 [2015-03-19 20:24:38] Found chip  1 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  2 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  3 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  4 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  5 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  6 with  0 active cores                   
 [2015-03-19 20:24:38] Found chip  7 with  0 active cores                   
 [2015-03-19 20:24:38] Found chip  8 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip  9 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip 10 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip 11 with 54 active cores                   
 [2015-03-19 20:24:38] Found chip 12 with  0 active cores                   
 [2015-03-19 20:24:38] Found 12 chips with total 486 active cores                   
 [2015-03-19 20:24:38] A2 boards=2, active cores=1026, Efficient=79%, speed=35.3M                   
 [2015-03-19 20:24:38] Probing for an alive pool                   
 [2015-03-19 20:24:38] Failed to resolve (?wrong URL) /:80                   
 [2015-03-19 20:24:38] Pool 2 slow/down or URL or credentials invalid                   
 [2015-03-19 20:24:38] Failed to resolve (?wrong URL) /:80                   
 [2015-03-19 20:24:38] Pool 1 slow/down or URL or credentials invalid                   
 [2015-03-19 20:24:39] Pool 0 difficulty changed to 1028                                       
 [2015-03-19 20:24:40] Network diff set to 0                                                             
 [2015-03-19 20:24:40] Job is not working from chip(cs5) 7                             
 [2015-03-19 20:24:40] Job is not working from chip(cs5) 8                             
 [2015-03-19 20:24:40] Job is not working from chip(cs5) 9                             
 [2015-03-19 20:24:40] Job is not working from chip(cs5) 10                             
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 7                             
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 8                             
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 9                             
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 10                             
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 7                             
 [2015-03-19 20:24:41] Job it not working for many times chip(cs5) 7                     
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 8                             
 [2015-03-19 20:24:41] Job it not working for many times chip(cs5) 8                     
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 9                             
 [2015-03-19 20:24:41] Job it not working for many times chip(cs5) 9                     
 [2015-03-19 20:24:41] Job is not working from chip(cs5) 10                             
 [2015-03-19 20:24:41] Job it not working for many times chip(cs5) 10                     
 [2015-03-19 20:24:41] Reinit board (cs5)                   
 [2015-03-19 20:24:41] Accepted 19af087d Diff 2.55K/1028 BA2 0 pool 0                                       
 [2015-03-19 20:24:41] Stratum from pool 0 requested work restart                   
 [2015-03-19 20:24:44] spidev0.0(cs5): Found 12 A2 chips                   
 [2015-03-19 20:24:44] Found chip  1 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  2 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  3 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  4 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  5 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  6 with  0 active cores                   
 [2015-03-19 20:24:44] Found chip  7 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  8 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip  9 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip 10 with 54 active cores                   
 [2015-03-19 20:24:44] Found chip 11 with 53 active cores                   
 [2015-03-19 20:24:44] Found chip 12 with  0 active cores                   
 [2015-03-19 20:24:44] Found 12 chips with total 539 active cores                   
 [2015-03-19 20:24:45] API running in UNRESTRICTED read access mode on port 4028 (7)                   
(5s):6.746M (avg):17.31Mh/s | A:1028  R:0  WU:12125.3/m
emdje (OP)
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March 20, 2015, 12:04:45 AM
 #243

Thnx hrustix,

Your log shows 2 sets of '12' chips. The cs2 one shows active cores on 10 chips. cs5 shows 9 active cores and then resets and shows 10 active chips as well.

Haven't seen the new board yet, but would be interesting if there is an empty space there and one would solder chips on there Smiley
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March 20, 2015, 03:22:58 AM
 #244

emdje, did you end up fixing your broken board?
emdje (OP)
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March 20, 2015, 08:36:34 AM
 #245

Not yet, but I might be getting a broken board from someone where I hopefully can salvage a chip from. I'll also try running it without chip (because the new A2's seems to have an open space). But I need to wait for the hot air soldering gun I ordered before I can try anything.
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March 23, 2015, 12:50:10 PM
 #246

Emdje, could you please compile new binary, where this parametere is 1min? Thanks

[2015-03-23 13:47:54] Pool 0 XXX stable for 5 mins
 [2015-03-23 13:47:54] Switching to pool 0 XXX
emdje (OP)
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March 23, 2015, 02:31:54 PM
 #247

Emdje, could you please compile new binary, where this parametere is 1min? Thanks

[2015-03-23 13:47:54] Pool 0 XXX stable for 5 mins
 [2015-03-23 13:47:54] Switching to pool 0 XXX


I will look at that BakSAj.
emdje (OP)
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March 23, 2015, 02:38:13 PM
 #248

Received my hot air soldering gun  Grin So I gave it a try to remove my burned A2 chip. At least I think it is burned and broken Roll Eyes :


But kudos to Innosilicon for the heat dissipation on the board. Even cranking up the heat to 600 degrees Celsius did nothing. The backplate spreads out the heat to fast  Undecided
This is the first time I am trying this so I might be doing stuff wrong. If you have experience with resoldering and/or have some tips, please share.

Backplate:
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March 23, 2015, 02:43:50 PM
 #249

Received my hot air soldering gun  Grin So I gave it a try to remove my burned A2 chip. At least I think it is burned and broken Roll Eyes

I don't know, looks like that might buff right out?  Shocked

Good luck!!
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March 23, 2015, 07:03:13 PM
 #250

Preparing an underclock version, which so far only selects the 1000 Mhz/s as lowest, but I think I know what is going wrong (at work now so now time to work on it further).
And change to secondary pool will be set to 1 minute instead of 5 minutes.
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March 24, 2015, 01:48:15 PM
 #251

Progress  Grin

Code:
 [2015-03-24 20:42:47] Started cgminer 3.9.0                    
 [2015-03-24 20:42:47] Run Reset=1                    
 [2015-03-24 20:42:47] ST MCU hardware reset start                    
 [2015-03-24 20:42:51] SPI Speed 4000 kHz                    
 [2015-03-24 20:42:51] ST MCU - Enable (Pre-header)                    
 [2015-03-24 20:42:51] A1 = 500,14                    
 [2015-03-24 20:42:51] A1 PLL Clock = 500MHz                    
 [2015-03-24 20:42:51] A1 = 600,13                    
 [2015-03-24 20:42:51] A1 PLL Clock = 600MHz                    
 [2015-03-24 20:42:51] A1 = 700,12                    
 [2015-03-24 20:42:51] A1 PLL Clock = 700MHz                    
 [2015-03-24 20:42:51] A1 = 800,11                    
 [2015-03-24 20:42:51] A1 PLL Clock = 800MHz                    
 [2015-03-24 20:42:51] A1 = 900,10                    
 [2015-03-24 20:42:51] A1 PLL Clock = 900MHz                    
 [2015-03-24 20:42:51] A1 = 1000,9                    
 [2015-03-24 20:42:51] A1 PLL Clock = 1000MHz                    
 [2015-03-24 20:42:51] AUTO GPIO CS                    
 [2015-03-24 20:42:51] SPI(cs0) no device                    
 [2015-03-24 20:42:51] ACK(cs0) timeout:cmd_RESET_BCAST-0.0355s                    
 [2015-03-24 20:42:52] spidev0.0(cs1): Found 8 A1 chips                    
 [2015-03-24 20:42:52] Found chip 1 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 2 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 3 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 4 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 5 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 6 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 7 with 54 active cores                    
 [2015-03-24 20:42:52] Found chip 8 with 54 active cores                    
 [2015-03-24 20:42:52] Found 8 chips with total 432 active cores  

When using 500 MHz I did not get an accepted share for the 10 minutes I tried it. 600 MHz started accepting shares right away. But might be the pool I was on.
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March 24, 2015, 08:24:50 PM
 #252

Emdje, could you please compile new binary, where this parametere is 1min? Thanks

[2015-03-23 13:47:54] Pool 0 XXX stable for 5 mins
 [2015-03-23 13:47:54] Switching to pool 0 XXX


I will look at that BakSAj.

Nice, I kindly ask only for cgminer binary, not the whole image :-)
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March 25, 2015, 02:27:08 PM
 #253

I remembered having a kitchen hotplate lying around, so I used that to heat the board to 90 Degrees Celsius:


Then the hot air soldering gun was enough to remove the chip (albeit a little bit to soon, should have let it heat up a tiny bit more. Now you can see a little damage to one of the grounds on the chip base, but since it is the ground, and that is very large I think it will still work if it gets a new chip)


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March 25, 2015, 02:37:36 PM
 #254

Emdje, could you please compile new binary, where this parametere is 1min? Thanks

[2015-03-23 13:47:54] Pool 0 XXX stable for 5 mins
 [2015-03-23 13:47:54] Switching to pool 0 XXX


I will look at that BakSAj.

Nice, I kindly ask only for cgminer binary, not the whole image :-)

Rar file with the cgminer where the switching parameter has been set to 1 minute instead of 5, and the correct index file (made some mistakes in the previous versions with the difficulty setting and some obsolete options have been removed) Also all the stratum code of cgminer 4.9.1 has been implemented.:
https://www.dropbox.com/s/f3t9eykuv1x2b1v/cgminer3.9.0-A2-v3.1.rar?dl=0

Don't forget to mark the cgminer as an executable by using the command "chmod +x cgminer"
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March 26, 2015, 06:41:19 AM
 #255

Sweet, thanks for the updated cgminer emdje. Are you planning on releasing a new image with the latest updates? I suck at linux command line.
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March 26, 2015, 07:55:34 AM
Last edit: March 26, 2015, 12:11:12 PM by emdje
 #256

Sweet, thanks for the updated cgminer emdje. Are you planning on releasing a new image with the latest updates? I suck at linux command line.

Sure I can. Will do that today.

Edit: compressing image now, then uploading and posting the link
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March 26, 2015, 01:02:51 PM
 #257

Image for V3.1 uploaded and ready for download:
https://mega.co.nz/#!rEU0WTYQ!Q5NQumz0Yu413cn8JucmJ4Zo1JNfy42dQ1ZWJbuk5Ow
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March 26, 2015, 02:37:21 PM
 #258

Thanks emdje, much appreciated. Sent you some beer money!  Smiley

Have you got your replacement chip back on the board?
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March 26, 2015, 03:49:45 PM
 #259

Thanks emdje, much appreciated. Sent you some beer money!  Smiley

Have you got your replacement chip back on the board?

Thnx Smiley

No I have not yet heard back from the person who offered his broken board (in return for underclock options, yet to be released).
If I won't hear anything I might try to connect pins 13 and 14 and try the board then.
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March 27, 2015, 03:43:39 AM
 #260

Here's hoping you hear from him soon!

I flashed the new Image on my 60 and 90 MH units, and for some reason they're getting a lot less hw errors. Not that I'm complaining, but what could have caused that? I was previously running version 2.0 on both.

I guess you were never able to get cgminer 4.9 working properly on the A2s? Also, did you ever figure a way of seeing the cgminer screen through ssh/putty?
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