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Author Topic: BFL ASIC is bogus  (Read 22325 times)
Dargo
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August 09, 2012, 03:13:31 AM
 #61

"Regarding refunds and charge back policy:  All sales are final unless we fail to perform.  That includes both performance and shipping targets.  60 days past target and we'll happily refund your purchase."

I guess "performance" is a bit vague, but I take that to mean they need to meet spec.

Easy:
According to BFL believers: Hashes/Jule and Hashes/sec
According to BFL: Hashes/sec only and only in the "Ballpark"

Several  estimations on what a real product would be capable of were done, I think even in this thread. But one thing: It is pretty clear that BFL deliberately left out numbers on the power requirement in order to encourage speculation. The only thing we have is a explanation from USB power limits which are fallacious in the first place since no possible accessible technology can provide it even in theory.

I think your view is quite plausible. Personally I won't be overly miffed if they at least come close on Hashes/sec, but are way off on the implied-but-not-stated power spec. Sort of like the old singles - they turned out 20% less on the Hash rate, 4x higher power consumption, and BFL cut the price by 14% since they missed the promised specs. Ohhh, the Horror!
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LazyOtto
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August 09, 2012, 03:54:05 AM
 #62

Uh, my recollection is that they *raised* the price from $500 to $600 once they actually had a product to ship.

Can you quote something to support your statement about a price reduction, please?
Dargo
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August 09, 2012, 04:28:22 AM
 #63

Uh, my recollection is that they *raised* the price from $500 to $600 once they actually had a product to ship.

Can you quote something to support your statement about a price reduction, please?

Is BFL's own account here a lie?

http://www.butterflylabs.com/bitforce-sc-release-notes/

"Our one blemish in spec estimate was with our original product.  The Single was announced at 1.05 GH/s @ 20W.  However, we released it at 832 MH/s @ 80W.  This was part of our introductory learning curve specific to this network hash application which is really quite extraordinary and unlike simple processor cryptography which is our background.  In the end, we missed our speed spec by 20% and power by a factor of 4. In fairness, we offered refunds and lowered our prices from $699 to $599 to compensate."

700 - 100 = 14% pride reduction. I thought I had read about this somewhere else as well, but can't remember where.
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August 09, 2012, 04:43:02 AM
 #64

Is BFL's own account here a lie?
Possibly. IMO they do not have a reputation which can be cited in their favor.

https://bitcointalk.org/index.php?topic=48863.0

Of course, the BFL web pages themselves have now been deleted / scrubbed. But it is clear from the context of that thread that the pre-release price point was initially quoted as $500.

--

BTW, thank you for digging up the quote you remembered.
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August 09, 2012, 04:49:00 AM
 #65

<lol>

And I find going back and reading that thread, in light of history and contemporary threads on the 'new' product, to be hilarious.
Dargo
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August 09, 2012, 05:06:59 AM
 #66

<lol>

And I find going back and reading that thread, in light of history and contemporary threads on the 'new' product, to be hilarious.

Agreed. So many people saying "I'm 100% certain this is a scam!" Anyway, as far as I can tell, you are right - the original spec was for 1 Gh @ 20 watts, with a pre-order price of $500. However, I also found this post from D & T

https://bitcointalk.org/index.php?topic=48863.msg637431#msg637431

This indicates that at some point the promised specs changed to 750-800 Mh @ 40-50 watts and the price had changed to $700. I don't have time to go through the whole thread right now, but it looks like the price was boosted to $700 at some point, and then (I assume) lowered to $600 (maybe when the final specs came in at 800 Mh @ 80 watts). 
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August 09, 2012, 05:15:04 AM
 #67

I personally think the only thing about the ASIC Jalepeno that isn't going to deliver is the coffee warmer part. The hashing power, as I see it, is possible, but good luck warming a coffee cup on a USB3.0. Espresso maybe?
You'd have to do better than that.
We have gone to great length explaining why we think BFLs numbers are fallacious. So you better address those arguments or at least provide some of your own.


Basically as said before, they could be using multiple chips, each chip with only a 3-5x performance increase over FPGA, which seems logical and perfectly possible in an ASIC. 5W may seem pretty hopeful, but I bet they can pull it off. ASIC chips can, as I've heard, deal with pretty high temps, so cooling won't be quite as important, meaning the fan would have a lower powerdraw. I'm no expert at all, and the power draw does seem a bit low, however I can certainly see a 3-5x performance increase to ASIC chips, even with a bit older of a production technique (like 130).

Alright, I pretty much already gone into that as well but again:

  • 'older' production techniques are pretty much still state of the art on low volume ASICs. While 180nm is common and 130nm at a premium.
  • The costs for a full custom ASICs in 180nm are beyond the market for BFL products (~10mil USD)
  • There are no complete workflow software packackes available which can enable designing the chips without enough manpower.
  • A fpga conversion 'ASIC' cannot meet the specs (at all feature sizes) and while it is the most likely chip to be used that would mean BFL would (again) exaggerated their promises.
I think the most likely output from BFL is a multi-chip, low production volume, FPGA to ASIC conversion @ ~110nm with a core running @ ~400Mhz. That seems feasible to me, although it would not meet their stated performance goals. What is your opinion?

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LazyOtto
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August 09, 2012, 05:50:41 AM
 #68

This indicates that at some point the promised specs changed to 750-800 Mh @ 40-50 watts and the price had changed to $700.
And I agree with you. Smiley

The next shoe to drop in this BFL SC/ASIC drama is when "the promised specs change" and what the performance and price point will be then.

As well as the actual lead time to delivery after 100% money paid at time of order.
Dargo
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August 09, 2012, 12:11:25 PM
 #69

The next shoe to drop in this BFL SC/ASIC drama is when "the promised specs change" and what the performance and price point will be then.

As well as the actual lead time to delivery after 100% money paid at time of order.

Well I won't be surprised if the promised specs change, but I don't think BFL can get away with changing the price point, at least not retroactively for those who have already ordered. For the original singles, the $500 price point was understood to be a special price for early adopters, with the price originally planned to go up to $600 after this. At least this is what is suggested by the following post:

https://bitcointalk.org/index.php?topic=48863.msg582446#msg582446

So for the original single, a price increase was on the table early in the game. Apparently at some point they raised the amount of that increase and then dropped it back. We'll see, but I will be surprised if they change price. 
Transisto
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August 09, 2012, 04:54:35 PM
 #70

My take on the Jalapeno.

Nobody in his right mind would buy this for profit. This is a novelty item meant as advertisement, so people ask, : "What is that thing" Bitcoin blablabla ... ... ... ... boring ... oh and coffee.

Unlike other coffee warmer this one does not consume any additional electricity as it's being left on all the time.

As it has been speculated, that thing may come with an additional power source so it might produce more heat.

Will the heat be sufficient to warm a coffee from room temp to warmish in a few hours ? I doubt it.
 Does this thing add insignificant heat to your coffee YES.   Do I care ? NO
Raralith
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August 09, 2012, 07:02:03 PM
 #71

Even if the specs were 50% off, it would still demolish FPGA's and GPU's which are the only other players in the game. At 1.75 ghash @ 50 watts (50% less power, 5-10x more power) for $150, that would absolutely murder the QuadMiner which is 840 mhash @ 20 watts for $1,070. Would I be upset if they didn't meet their original marks? Sure. Would I return my preorders? No, because I certainly won't be buying a FPGA or more GPU's.

Even at my outrageous $0.25/kw rate, my 7970 can push 630 mhash at 220 watts and you can get one for $400; I'm actually more efficient now and I paid less than $300 for my 7970. Just for the power savings alone against the QuadMiner would be 180 watts or 129.6kw per 30 day month or $32.40 extra in electricity and 25% less hashing power. Based on current difficulty and BTC at $11 USD, I would make $139/month from QuadMiner and $104/month from a single 7970 or $35 less USD, add in $32.40 for electricity and that's $67.40 in lost profit and additional operating expenses. Now factor in additional capital costs of $680, and it would take me 10 months to break even (well over a year if you had cheap electricity). The question is whether you believe someone can make an ASIC in 10 months, even a "shitty" one.

Bottom line, 1) even if BFL doesn't give us near what they originally quoted, they would still reign supreme because they would still blow everyone out of the water, 2) even if BFL does not put out a single ASIC chip, the ball is already rolling and we may see ASIC's from a different vendor in a year anyways, 3) FPGA and GPU's are either running the gravy train (on us, the consumers) or just won't be worth the effort if you are in this for profit.
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August 09, 2012, 07:14:34 PM
 #72

Bottom line, 1) even if BFL doesn't give us near what they originally quoted, they would still reign supreme because they would still blow everyone out of the water, 2) even if BFL does not put out a single ASIC chip, the ball is already rolling and we may see ASIC's from a different vendor in a year anyways, 3) FPGA and GPU's are either running the gravy train (on us, the consumers) or just won't be worth the effort if you are in this for profit.


Don't be so sure about that, the competition isn't sleeping. And that's not the bottom line.
The bottom line if there is another fpga conversion asic before BFLs "extended" deadline people gonna be duped.
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August 09, 2012, 07:34:56 PM
 #73

Don't be so sure about that, the competition isn't sleeping. And that's not the bottom line.
The bottom line if there is another fpga conversion asic before BFLs "extended" deadline people gonna be duped.

As I already pointed out, I'm glad the competition isn't sleeping because current FPGA's prices are absolutely outrageous. 1 to 3.5 gmash for $150 will pull correct the current FPGA price gouging.
ElectricMucus (OP)
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August 09, 2012, 08:07:44 PM
 #74

Don't be so sure about that, the competition isn't sleeping. And that's not the bottom line.
The bottom line if there is another fpga conversion asic before BFLs "extended" deadline people gonna be duped.

As I already pointed out, I'm glad the competition isn't sleeping because current FPGA's prices are absolutely outrageous. 1 to 3.5 gmash for $150 will pull correct the current FPGA price gouging.

Except in the case of BFL it might turn out to be no ASIC of any kind but some next-gen FPGA like Kintex-7. That would even be consistent since BFLs main asset seems to be to be able to obtain mid-range FPGAs at wholesale prices. So they could have just made up some performance figures... you figure out the rest. (Mind you the singles were introduced to contain ASICs too.)

I don't know whats the ETA for the next-gen xilinx FPGAs but I wouldn't be surprised if it happens to coincide with the BFL deadline.

I agree that completion is good for the market, the problem is BFL isn't playing fair, neither to the market nor their customers,
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August 10, 2012, 05:45:09 AM
 #75

Don't be so sure about that, the competition isn't sleeping. And that's not the bottom line.
The bottom line if there is another fpga conversion asic before BFLs "extended" deadline people gonna be duped.

As I already pointed out, I'm glad the competition isn't sleeping because current FPGA's prices are absolutely outrageous. 1 to 3.5 gmash for $150 will pull correct the current FPGA price gouging.

Except in the case of BFL it might turn out to be no ASIC of any kind but some next-gen FPGA like Kintex-7. That would even be consistent since BFLs main asset seems to be to be able to obtain mid-range FPGAs at wholesale prices. So they could have just made up some performance figures... you figure out the rest. (Mind you the singles were introduced to contain ASICs too.)

I don't know whats the ETA for the next-gen xilinx FPGAs but I wouldn't be surprised if it happens to coincide with the BFL deadline.

I agree that completion is good for the market, the problem is BFL isn't playing fair, neither to the market nor their customers,
Kintex is already available. I have seen FPGA computing boards with Kintex-7 in some tech show.

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August 10, 2012, 01:10:16 PM
 #76

But at what price .....

Not the same as they had with the "obviously" used single fpgas?


I think a jalapeño will barely make profit, more "barely" min it's own costs (electricity + hw)

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August 10, 2012, 01:17:25 PM
 #77

By custom chips I mean Full Custom ASICs, that is what they are claiming they are making. That costs about 10M USD for starters.

oh, I got it: pirate is collecting BTC to fund BFL. They will mine back the BTC with the asics.

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August 13, 2012, 06:04:21 PM
 #78

By custom chips I mean Full Custom ASICs, that is what they are claiming they are making. That costs about 10M USD for starters.
There might be some way to get it cheaper if you have the ties but unless whoever behind BFL is some engineering wizard he doesn't even have the means to develop it.
[...]
Could you please provide some sort of evidence that backs this statement? I'm not saying you're wrong, I have no idea what these kinds of chips cost, I'm just interested in some evidence.

What would comprise the 10M figure? How much of it would be development, and how much would be payment to the fab? It looks to me like they are developing the hardware design themselves. My knowledge of this process says it's a task of creating some HDL-code, and then having this code transformed into a chip by a fab. I've also heard that you can't write generic HDL code, ie. code that fits all production processes. So they have to decide on which process to use before writing their code.

My point is this: if 90% of the production costs are related to writing the HDL-code, then it might be feasible if they are able to write the code themselves, and only need to shell out the money for the actual production.
The equivalent situation in the world of software would be a claim that says that "it costs $100,000 to develop a professional website". That may be true if you hire a web design company, who write the entire thing from the ground up, but if you're able to write the code yourself, the costs mostly comprise hosting, and not much more.

In short: please educate me about hardware design Smiley.
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August 13, 2012, 06:25:04 PM
 #79

I won't be able to educate you on hardware design because I know almost nothing about this subject. Wink

I followed Chuck Moore for a few years about creating a new multiprocessor-soc design which he actually did. (I have one of the chips at home but still haven't gotten around on using). Somewhere he mentioned that he is going to mainly pay the initial development out of his own pocket, he is trying to do it the most economical way possible and that it will be like 10mil dollars. He actually has written a entire software package including a new programming language and operating system to do it, so I'm really confident he took the cheapest route.
I don't know where exactly to find that information anymore but I will try to find and quote it. (He has blanked out some parts of his blog though)
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August 13, 2012, 07:36:40 PM
 #80

I won't be able to educate you on hardware design because I know almost nothing about this subject. Wink

I followed Chuck Moore for a few years about creating a new multiprocessor-soc design which he actually did. (I have one of the chips at home but still haven't gotten around on using). Somewhere he mentioned that he is going to mainly pay the initial development out of his own pocket, he is trying to do it the most economical way possible and that it will be like 10mil dollars. He actually has written a entire software package including a new programming language and operating system to do it, so I'm really confident he took the cheapest route.
I don't know where exactly to find that information anymore but I will try to find and quote it. (He has blanked out some parts of his blog though)

Doing some research myself, this Wikipedia article seems to suggest that HDL code is just a small part of the actual chip design (HDL code would be the "Functional Design"-step, as far as I can gather):
http://en.wikipedia.org/wiki/Physical_design_%28electronics%29

I can see I'm already way in over my head, as I don't understand most of what the article says. But it seems that my view of hardware design as "write HDL, create chip" is grossly over-simplified.
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