You promised first shipment to your first monarch customers for october/november. Maybe you forgot with all the delays you announce, it must be hard to keep track. But we are mid january and you dont even have chips. Of course its possible you are on track with your internal schedule, but clearly not with the one you published.

As for no silicon in sight, I have not seen any, and neither have you. So eat that.

added some words about asicminer, and fixed some typo's.

Thats nonsense. Bitfury makes the chips, once they ship and get assembled on boards elsewhere, while running opensource mining software, bitfury no longer controls anything. He just counts his money, money thats well deserved. You might argue against buying hashrate at cex.io, but buying bitfury hardware is no threat to anyone. Even on the contrary Id say, any bitfury rig in the hands of individual miners is a protection against some dark entity taking control over the network. So buy more bitfury's

At this point, that would be silly. Unless nextreme 3 is delayed for many more months, in which case, you can stick a fork in ActM.

Thats fine, when I mined I didnt even use cases. Cases only obstruct airflow and add to the cost. Who needs them ? First thing I would do with that miner is take it apart, properly mount the hardware in some open frame, and salvage the Lian Li case.
Point is that all AMT does is:
- sales  &  marketing (aka as lying through their teeth. 80W, right? Shipping first week of January, right Clenell?)
- support (for most paying customers apparently pretty much non existent)
- system design and assembly.  Mind if I laugh?


Its typical of Technobit boards, or any other 16 chip Bitfury board. No surprises there, including the 180+% powerdraw compared to advertised. I guess that will prove typical too.

As for reliability/QC, if my memory doesnt fail me, the only other confirmed AMT customer had issues with 2 of the 3 boards. so one working board out of 4 that should have been in there to achieve the promised performance of 192GH.


If that is the case, I pity everyone who ordered one. With AMT's non existent technical skills, without chip samples until probably at least now, I wouldnt take bets they are able to bring up a custom PCB before 2015. Of course thats not what AMT will do. They will use off the shelve PCBs, either from Bitmine or from Technobit.


I dont care about pretty. But if I were a customer I would care how the they plan to remove  "300-600 AmtWatt" aka 1000+W from a case that supposedly measures 22 x 10 x 22 cm, smaller than a typical mATX case. Good luck with that.

How do you estimate the next difficulty? Basically there are two approaches; either you look at the average hashrate (I know, block generation speed) of some recent period and you assume it will remain constant; thats what most calculators do. Or you try to determine if there is a trend, thats what bitcoinwisdom does. Of course thats not always correct either; currently it predicts another 32% increase, but that will only really happen if the recent trend of rapid growth continuous. If some dark horse organisation just finished deploying a batch, and HF/CT wont ship or deploy meaningful numbers, it may remain flattish until the next retargeting and the other calculators that assume hashrate will remain around 15PH will be closer than bitcoinwisdom.

But given the past 12 months, usually assuming the trend will continue will yield a better estimate than assuming hashrate will remain flat at the current level .

That would be true if you would use most of the die estate. But these wafers contain various generic circuits that can be used for all kinds of applications, and therefore are anything but optimal for any particular application. Its a halfway solution between FGPA and ASIC. THere is also the tooling cost, since these wafers are produced in two phases, most of the layers for the generic easic nextreme process, and then later one application specific layer is etched. Fabs will charge you a pretty penny for that, even if eASIC wouldnt.

Then there is the ebeam thing; chips produced through ebeam will be a whole lot more expensive, because its a time consuming operation using very expensive equipment. I figure that will only apply to the first batch though, maybe as few as one single wafer to see if the chip works, and to allow PCB development/debugging.

$2/GH is very high by my estimate for pure asics. But dont forget these are not pure asics, they are structured asics. They are build on prefabricated wafers which carry a significant price premium, they are considerably less size efficient (and usually, less power efficient). Especially in smaller volumes, these chips may cost 10x more per GH than HF/KnC/CT/..   Now 10x their marginal asic production cost probably still means a profitable chip today, but Im not sure how long that will last.

eASIC does have a path towards pure asics, but expect the NRE for that to be similar as any from scratch asic development (if nothing else, a full mask set price is the same either way), and lead time will also be several months.

I dont understand how you guys can excuse this shoddy build. Keep in mind this is all AMT does.  I might be able to excuse it from Bitmain, KnC, Asicminer or whatever asic provider that assembles their own cases almost as an afterthought to turn their asics in to something customers can use. But AMT buys standard bitfury boards, some controller (pi?) and throws it in a standard (poorly suited and overpriced) case. Thats what they created the company for. And they cant do better than this ?

For the record, here are some examples of bitfury cases that the community came up with:











credits to foofighter to Spotswood.
Those cases were made available on a small scale, and sold for less than those Lian Li cases do.

Ill grant AMT that their prices are low compared to other bitfury suppliers, but please dont call the system "engineering" and build quality anything other than it is: embarrassing.

They have proven trust worthy so far (which doesnt mean they are offering a profitable deal). See my sig for some more info and alternatives.

OMG. I cant believe how they apparently just threw in those boards randomly and "'secured" them with.. hot glue? Is that really hot glue ?
Whats the point of spending $172 on a lian li case:
http://www.amazon.com/Lian-Li-PC-Q09FN-Black-Aluminum/dp/B007N6T85M/ref=sr_1_40?s=electronics&ie=UTF8&qid=1389595908&sr=1-40&keywords=lian+li+case

If you are going to "assemble" it like that?  I could do better with a cardboard box! Here is a sneak peak of their 1.2TH machine:



As for the power consumption. . advertised as 80W but actually drawing 146W at the wall. Eat that AMT shills. Good luck with your 1.2 TH machine; hope your circuits will be able to handle the "300-600" amtwatt²

² 1 amtwatt=1.5 bflJoule/S

Hah, another delay!



Bitparking, no idea, do they still exist?
Bitminter, three thumbs up, highly recommended.
ghash.io, good pool, but please dont, they already have far too much control

Nonsense. First of all, fabs are idling.

Taiwan Semiconductor Manufacturing Company (TSMC) has seen its 28nm process utilization rate fall to 65-70% recently, due to a cutback of customer orders, according to ind
http://www.digitimes.com/news/a20131209PD213.html

30-35% of their capacity is unused. Hardly "they can sell more then they can make" is it.

Your price estimates are even further off. Volume prices is below $3000 nowadays.  Low volume prices through intermediaries may be much higher, but thats irrelevant when estimating the "end game". To get to anywhere near the hashrates I predict, you are talking about significant volumes of wafers anyway.

Which is *exactly* why a 28nm structured asic was a good idea to begin with. Nothing else gives you the chance to bring a 28nm chip to market faster.  Now hindsight is 20/20 and you can argue Ken should have picked a proven, existing process, but Im not aware of any existing single mask 28nm process (altera hardcopy is available but it works differently and is probably far less suited). So he basically would have had the choice between a proven 45nm chip, that would barely be competitive with BFL 65nm parts,  and a more risky 28nm implementation that would remain competitive much longer, and with a relatively straightforward migration path to full asics. Ive not talked to eASIC either, but just from what I know, I would have rated that risk pretty low and have gone for 28nm myself.


Obviously not. But if you think the substrate and PCB are the easy parts, talk to HF.


It does. Or at least should have. Its not like 28nm itself is new or unproven, neither is eASIC's nextreme. Porting of their nextreme wafers to 28nm is not something Id have considered high risk. 6 months later its easy to say differently, but do keep in mind, if next week working chips are demo'd, they still have a chance to beat HF and Cointerra, and they have been developing their asic for far longer and will have spent a whole lot more on NRE. Whatever the cause of the current delays, the decision to go with Nextreme 3 was quite a sensible one.

That VMC inked a deal with eASIC is not a hypothetical, unless you think eASIC is in on the scam.
That they would use 28nm Nextreme 3 is not a hypothetical
That 6 months after the first press release mentioning it, Nextreme 3 is still not being advertised or described as available, or its specifications available, is also not a hypothetical.
That eASIC would have a functional nextreme 3 process but for some reason chose not to market it, a is hypothetical I cant swallow.

Ergo,  I find it impossible to come up with a plausible scenario where eASIC did not fuck up. Unless you want to believe eASIC told Ken back in august that it would take until spring 2014 before they could deliver anything, and somehow tout that as "dramatically reducing .. time-to-production".

As for shifting the blame to "Ken's design"; there is zero chance Ken had anything to do with the design. eASIC did that, cf the press release where Ken touts "The fast design and turnaround time of eASIC Nexteme-3".  More evidence is that eASIC has intellectual property concerning SHA cores and all the other components needed to produce a bitcoin miner. Since these cores are supposedly tailored for their process, why on earth would anyone reinvent the wheel? In theory its possible some third party design house used eASIC's IP and combined it into a chip design for their process, but that seems both stupid and very unlikely considering that the specifications of their nextreme 3 weren't even available at the time, if they existed at all.

Again though, Im not vouching for Ken in any way, other than for his decision at the time to contract eASIC, and looking at the facts today, blaming eASIC primarily. There might be tons of other shenanigans going on, Ken might be incompetent, an imbecile or a swindler, but that would be on top of eASIC dropping the ball.  And that I would not hold over Ken's head.

Thats a very general number and FWIW, applies to a 10 year old process without even mentioning what FPGA they are comparing to. Performance improvements from FPGA to structured asic or even asic ranges enormously depending on application. Ive seen numbers from 2x to 100x, so  I wouldnt read much in to that. 16 GH per chip is what they claim, as well as ~1GH/J, Im sure eASIC didnt just come up with those numbers based on nothing. What remains to be seen is how big that chip is, but to be economically unprofitable in the coming months, it would have to be frigging huge.  Considering the stated power efficiency, that seems unlikely.

Anyway, at this point I cant draw conclusions. If my assumption is correct, then it all depends on how fast eASIC can make nextreme 3 work and produce these wafers. That could be weeks or months from here, I have no idea. Ken probably does have an idea, but Im sure he is not allowed to talk. Whats left is waiting I guess.

Read my edit, this explains how it works:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/

You dont use the ebeam to etch the entire chip, only a few via's on one layer. The prefabricated wafer is a lot like an FPGA, with the ebeam burning your bitstream. But those wafers are what makes Nextreme 3 what it is, and since eASIC still not advertising that process, only their 90 and 45nm nextreme implementations,  thats all the evidence I need to know its not ready yet.

Im not here to defend Ken or ActM in general, I have no opinion on the rest of his business, but I will say the strategy of going with eASIC structured asic was a good one. Even if on hindsight it appears to be causing delays.

And it may have been done ages ago. But when the nextreme 3 wafers (or asics?) came back and proved not working (assuming anything came back), it might have been decided to take the opportunity to tweak the code while waiting for the new spin of nextreme wafers.


e-beam is more expensive, but the difference isnt quite as large as you suggest for low volume productions. In fact for volumes under 100K, its probably cheaper. Moreover, Im assuming that would only be used for the first lot because it can be done so fast. Once the chip and PCB is validated, a photomask can be made for the top layer(s) and the chips produced in a way thats much more comparable to traditional asics, while still allowing a faster turn around since you are only etching one or two metal layers on to prefabricated wafers. There is still a price penalty compared to a full mask asic, but I would expect those chips to be competitive for quite some time.


edit: read this (rather dated) press release by easic, which rhymes completely with my hypothesis:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/


There is nothing inherently wrong with being a guinea pig. Especially not if you can't see compelling reasons why it would fail. Frankly, Im stunned eASIC still doesnt seem to have nextreme 3 ready. Where you predicting this back in September? If so, I must have missed that.

I drew the same conclusion as you but with a few caveats: not only would you need to be able to supply the power (meaning not only the PSU, but also the PCBs and VRMs need to be handle it), you must also be able to get rid of the heat. Moreover, BA would have to provide ways to change voltage and clockspeed. If they say its not possible (didnt read that, but Ill take your word for it), Im guessing thats where the problem will lie.

Of course anyone designing their own PCB and just buying chips from BA might be able to leverage some of that headroom, though its probably not going to be a walk in the park.

Im hardly an expert, but Ive considered the structured asic approach for a long time myself. It made complete sense a year ago, since it allows close to asic performance with comparatively low NRE, much lower risk and in theory (on an established process), much faster time to market. However, if its true ActM collected $10M, that choice becomes more questionable. And for sure the clock is ticking, the disadvantages of a structured asic cant be ignored in the face of mounting competition; they are less power efficient (color me skeptical about the claims made in that regard) and they cost a lot more per chip. IF its going to happen it had better happen soon, because obsolesce is looming around the corner.