[LABCOIN] IPO [BTCT.CO] - Details/FAQ and Discussion (ASIC dev/sales/mining)

[ishkur]

Would someone be so kind and summarize whats going on please?  I'm a bit behind and lost

Labcoin getting caught in more lies and scams, people finally digging information on them, something that they should of done since day one, prepare for price below .00001

Is this before or after they get to 5BTC a share?

[1714834283]

1714834283

[KS]

It can't be that difficult to provide a stop-gap heat remedy. I mean, get a few air conditioners and blow them across the chips. stick them in an enclosure with dry ice. Chilled mineral oil. etc. at least until you can get a permanent solution.

If the package can't transfer heat it doesn't matter what the outside temp is.

That being said, explain to me what a 3rd party can do about it on *already* made chips (given they would exist at all)?

[crumbs]

It can't be that difficult to provide a stop-gap heat remedy. I mean, get a few air conditioners and blow them across the chips. stick them in an enclosure with dry ice. Chilled mineral oil. etc. at least until you can get a permanent solution.

Doesn't always work -- the package sets the limit.  Put a thermos jar in dry ice -- coffee inside it will still stay hot.

Edit:  What the guy above me sez.

[DeathAndTaxes]

While the die size determines the heat transfer at the silicon junction, the size and more importantly type of package is also important as the thermal energy must pass through the package as well and the lower the thermal conductivity the higher the core die temp is going to reach.  The bizarre thing is that they reported using "QFP packaging, 44 pin, no exposed heat pad" for the size of the die that makes absolutely no sense @ >12W and is still hard to believe even at 5W.  They do make packages with exposed metal heat pad to improve heat transfer.  For example this is the Avalon chip.



Inside the package the die is pressed against the large square metal pad in the center of the package.  The center pad is only used for heat transfer, the other pins are used for electrical power, ground, and signal.  The pad will be surface mounted to a non-electrical pad (copper plate) on the PCB to conduct heat away from this chip.  Using a multi-layer board the connection can extend from the top layer through the PCB to the bottom layer which is used as a heat dump.  As a side note this is why the heatsink is on the "back" of an Avalon board.  The heat is conducted through the heatpad, through the PCB, to the heatsink on the other side.  With a QFP and no heat pad essentially the entire chip is encapsulated in insulating plastic and that greatly limits the amount of power that can be dispersed.  

I hate to say "I told you so"  I never owned a share, never will I was just interested from a technology standpoint.   There is a reason every other 110/130nm ASIC chip uses a heat heatpad package.  If you put 12W in (and their 5W estimate was likely nonsense) you have to get 12W out.  Plastic is a great thermal insulator.   You aren't getting 12W out of a chip that small without something that has a higher thermal conductivity.  They likely tried and with a low thermal conductivity the internal temp of the chip skyrocketed.   Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

[KS]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

If the chip is working, get another MPW run and a decent package. Underclock what you have and move on.

[Vigil]

Well, good points. I do recall some people wondering early on how they were going to dissipate the heat with no thermal pad, etc.

[DeathAndTaxes]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

Well 10% was a SWAG.   Without knowing the specific details of the chip it is hard to say how bad it is.  Still assumming there is a chip and it otherwise works it could have been avoided by using the right package.

[superduh]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

Well 10% was a SWAG.   Without knowing the specific details of the chip it is hard to say how bad it is.  Still assumming there is a chip and it otherwise works it could have been avoided by using the right package.

i'm imagining you shaking your fist and screaming damn you howard on top of your lungs

[KS]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

Well 10% was a SWAG.   Without knowing the specific details of the chip it is hard to say how bad it is.  Still assumming there is a chip and it otherwise works it could have been avoided by using the right package.

i'm imagining you shaking your fist and screaming damn you howard on top of your lungs

Package choice was probably down to "management"

[BitThink]

Basicly, this is a one-man (even this man is part time) company, with a maybe workable 130nm chip design and 20TH not workable chips. The 65nm plan is paused and don't know when to continue so can be safely ignored. Plus around 3500BTC left but 'very unlikely to refund'. The 'new' owner hesitates in providing his Identity and may have trouble in list in a new exchange.

Suppose this is what we know in the beginning (forget about ATH and ATL, forget about how much you have thrown on it already), how much will you pay for it?

[radiumsoup]

Would someone be so kind and summarize whats going on please?  I'm a bit behind and lost

At best:
No one told them the chips should be made out of metal.  Apparently plastic melts.
They would redesign them, but it looks like everyone quit.  So they're hiring outside contractors.

At worst:
It's all a scam run by a chinese or italian or swedish or russian, no one really knows.

Rich people invested thousands, lost 80%.  Some are still holding on saying that 0% is the same as 20%.
People who couldn't afford investing were greedy and invested anyway and lost as well.

This is by far the best summary I've ever seen

[dexX7]

Re: power consumption and packaging:

https://bitcointalk.org/index.php?topic=263445.msg3082245#msg3082245

[radiumsoup]

might have missed it, but did someone start a nomination process for the shareholder reps?

[AngelSky]

Hello guys,

my name is labcoin. I'm alone in this company named labcoin (hehe). It's a hobby, I have a lot of money to spend (hihi). We are working on a solution about the heating problem (in fact I paid someone I don't know and I can't tell you who it is because I don't know..). The cost will be... I don't know (it's not my money..).

So my job is to communicate here and on IRC about your concerns. In fact, I'm traveling right now (through proxies) and I can't tell you more.

I cannot tell you the real ID's of my ex-partners and I can't tell you who I am. But please, trust me.

Thanks a lot,
bybye.

EDIT: By the way, we are going to do the direct share stuff. My EXCEL is ready. I have about 10'000'000 rows. I'm going to fill the cells manually. It will take about 2 weeks.

[Ytterbium]

Not exactly.  The W/mm² issue has to do with the size of the physical chip, not the size of the packaging.  There's only so much heat that can be removed from silicon for a given temperature gradient. For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon.

While the die size determines the heat transfer at the silicon junction, the size and more importantly type of package is also important as the thermal energy must pass through the package as well and the lower the thermal conductivity the higher the core die temp is going to reach.  The bizarre thing is that they reported using "QFP packaging, 44 pin, no exposed heat pad" for the size of the die that makes absolutely no sense @ >12W and is still hard to believe even at 5W.  They do make packages with exposed metal heat pad to improve heat transfer.  For example this is the Avalon chip.



Inside the package the die is pressed against the large square metal pad in the center of the package.  The center pad is only used for heat transfer, the other pins are used for electrical power, ground, and signal.  The pad will be surface mounted to a non-electrical pad (copper plate) on the PCB to conduct heat away from this chip.  Using a multi-layer board the connection can extend from the top layer through the PCB to the bottom layer which is used as a heat dump.  As a side note this is why the heatsink is on the "back" of an Avalon board.  The heat is conducted through the heatpad, through the PCB, to the heatsink on the other side.  With a QFP and no heat pad essentially the entire chip is encapsulated in insulating plastic and that greatly limits the amount of power that can be dispersed.  

I hate to say "I told you so"  I never owned a share, never will I was just interested from a technology standpoint.   There is a reason every other 110/130nm ASIC chip uses a heat heatpad package.  If you put 12W in (and their 5W estimate was likely nonsense) you have to get 12W out.  Plastic is a great thermal insulator.   You aren't getting 12W out of a chip that small without something that has a higher thermal conductivity.  They likely tried and with a low thermal conductivity the internal temp of the chip skyrocketed.   Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

You didn't tell me anything, I was aware of the problem with the packaging, I was responding to someone who thought the size of the packaging mattered, not the material.  That's why I said For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon. - You're quoting me as if I was saying something completely different then what I actually said.

In fact, I responded at the time:

Not exactly.  The W/mm² issue has to do with the size of the physical chip, not the size of the packaging.  There's only so much heat that can be removed from silicon for a given temperature gradient. For the packaging, you can use materials like copper or aluminum that have higher thermal conductivity then Silicon.

While the die size determines the heat transfer at the silicon junction, the size and more importantly type of package is also important as the thermal energy must pass through the package as well and the lower the thermal conductivity the higher the core die temp is going to reach.

Yeah, I was just pointing out the size of the packages is not the major determining factor.  A "chip scale" flip chip BGA package would probably be tiny but still be able to remove a lot of heat (from what I understand)

The bizarre thing is that they reported using "QFP packaging, 44 pin, no exposed heat pad" for the size of the die that makes absolutely no sense @ >12W and is still hard to believe even at 5W.  They do make packages with exposed metal heat pad to improve heat transfer.  For example this is the Avalon chip.

It is strange. It would be helpful to have more information from them on why they decided to forgo the heat pad. Maybe they think the plastic will be able to dissipate the heat.  

The thermal conductivity of plastic is about 0.2-0.5 W/mK, compared to 200 for aluminum.

But, remember the 'm' stands for the thickness of the material, not the surface area.  If the package material is very thin, it can still conduct a decent amount of heat.

If you have a surface area of 1cm (0.0001m²), thermal conductivity of 0.5 W/mK, 50C temperature difference, and 0.25mm thick layer of plastic, you should be able to move

-(0.5W/mK) * 0.0001m² * (50K / 0.0025m)
=-0.5W/K*0.0001m*(20000K/m)
=-0.5W/K*0.0001*20000K
=-0.5W*0.0001*20000
=-1W.

So, just one watt of cooling using those parameters. Maybe 2 watts if you count both sides.

It's also possible that they could be using a type of plastic with a higher thermal conductivity as well.

And, it's also possible my math could be completely off.  The units did cancel properly, but I could be doing that totally wrong

EDIT: A 12-inch wafer is 0.775mm thick, and a lqfp44 package is 1.2mm thick (not counting the pins).  So the thickness of the packaging should be 0.21mm on either side. But there could be other materials in there as well. If so, that should increase the amount of heat able to be emitted package a great deal.

Anyway, we'll find out in a few days what's actually possible.

Great job misrepresenting what I actually said in order to say "I told you so"

[Ytterbium]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

Well 10% was a SWAG.   Without knowing the specific details of the chip it is hard to say how bad it is.  Still assumming there is a chip and it otherwise works it could have been avoided by using the right package.

i'm imagining you shaking your fist and screaming damn you howard on top of your lungs

Package choice was probably down to "management"

Yeah, I'm sure this was the case.  And the thing is, he seemed no idea what was wrong with the chips until now.  Otherwise he could have just said so.

So people in the forum were able to figure out the problem in just a few hours just from looking at photographs while it took this guy, what, over a month to figure out what the problem was (or at least communicate it)

And meanwhile (at least according to him) he's working another job and traveling all over the world while completely ignoring the company he's supposed to be running on behalf of shareholders, and not bothering to follow up with anything while there's no hashrate and the share prices are tanking.

[dhenson]

might have missed it, but did someone start a nomination process for the shareholder reps?

I've not seen it started. But tbh I've not been glued to the thread, just got off of work.

[MikeyVeez]

Now they have a ton of chips which probably can't handle more than 2W which means running them at 10% speed (or slower).

Wow. And here I thought it was going to be 50%.
What a waste.

Well 10% was a SWAG.   Without knowing the specific details of the chip it is hard to say how bad it is.  Still assumming there is a chip and it otherwise works it could have been avoided by using the right package.

i'm imagining you shaking your fist and screaming damn you howard on top of your lungs

Package choice was probably down to "management"

Yeah, I'm sure this was the case.  And the thing is, he seemed no idea what was wrong with the chips until now.  Otherwise he could have just said so.

So people in the forum were able to figure out the problem in just a few hours just from looking at photographs while it took this guy, what, over a month to figure out what the problem was (or at least communicate it)

And meanwhile (at least according to him) he's working another job and traveling all over the world while completely ignoring the company he's supposed to be running on behalf of shareholders, and not bothering to follow up with anything while there's no hashrate and the share prices are tanking.

Yeah this is utterly insane, to have this guy do this part time. Forum member figured out the problem within a few hours and it took Sam months.

Scary stuff

[AngelSky]

Welcome to destination:

[DeathAndTaxes]

You didn't tell me anything ...

I didn't even mean to include your quote (will remove it).  I was just speaking in general terms.  The "you" was directed at "you".