HardwareCollector
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May 10, 2018, 03:32:54 PM |
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I think you are not factoring in the cost of FPGAs.
That's a good point, but the FPGA market looks totally dis-functional to me. I suspect that pricing practices will change as the impact of the Intel/Altera acquisition works thru the system. ASICs will continue to dominate mining and GPU miners are very resilient. But for FPGAs, even without their magical powers, will still remain a viable alternative for some people.
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zer0k
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May 10, 2018, 03:50:54 PM |
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Keccak (Smartcash, Maxcoin): 136GH/s (17GH/s per card x eight) ($160/day at Apr-30 prices) Tribus (Denarius, Virtus): 16.8GH/s (2.1GH/s per card x eight) ($304/day at Apr-30 prices) Phi1612 (Luxcoin, Folm): 5.2GH/s (650MH/s per card x eight) ($456/day at Apr-30 prices) Skunhash (Various coins): 10.4GH/s (1.3GH/s per card x eight) ($261/day at Apr-30 prices)
Those yield around US$20-$57 per card per day ($160-$456 per day for the rig).
This is a mutually-assured-destruction arms race. I calculated for Phi, if there are 5000 such cards online, the per day return will be $12 per card and not $57. (The GPUs will make pennies, meanwhile.). That will be an year to get back cost at $4000. And 5000 is conservative number I think, for one Algo. Edit: And the irony of this -> Only ASICs will survive. ASIC's are only really going to survive on coins that aren't building resistance into their algo's. Then we have a the FPGA's and GPU's battling it out on all the rest ![Grin](https://bitcointalk.org/Smileys/default/grin.gif)
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rem26
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May 10, 2018, 04:03:02 PM |
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I think you are not factoring in the cost of FPGAs.
That's a good point, but the FPGA market looks totally dis-functional to me. I suspect that pricing practices will change as the impact of the Intel/Altera acquisition works thru the system. I doubt it. Altera/Intel have no desire to erode their margins, and there are a lot more high dollar uses for FPGAs than mining.... Most of the companies I've worked for will spend $50k-$100k per FPGA, for hundreds of engineers, to pull in an ASIC design schedule.
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senseless
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May 10, 2018, 04:40:53 PM Last edit: May 10, 2018, 05:05:54 PM by senseless |
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I think you are not factoring in the cost of FPGAs.
That's a good point, but the FPGA market looks totally dis-functional to me. I suspect that pricing practices will change as the impact of the Intel/Altera acquisition works thru the system. I doubt it. Altera/Intel have no desire to erode their margins, and there are a lot more high dollar uses for FPGAs than mining.... Most of the companies I've worked for will spend $50k-$100k per FPGA, for hundreds of engineers, to pull in an ASIC design schedule. I think you're confusing markets. Traditionally, fpgas (other than tiny ones used in various devices) were only used for ASIC design. That's not the case any more. They're becoming legitimately their own product that can be used by a large number of markets. I for one am interested to see what they can do to speed up SQL servers. There are a number of big data / relational database FPGA solutions coming to market. The next couple of years are going to be very exciting for the fpga and server markets -- all that fpga power is going to be coming to our door. Just wait until the marketing guys figure out what they can do with FPGAs and how quickly they'll be able to do it... Alright, maybe this isn't a good idea at all ![Cheesy](https://bitcointalk.org/Smileys/default/cheesy.gif) Intel's only current coprocessor offering is the Xeon Phi. Intel is planning a hybrid fpga cpu. This would be like having a cpu with a gpu except it would be a cpu with a fpga. Their goal is to put a co processor on all the server chips. This would allow offloading of various applications that would have performance / efficiency increases at a multiple of a gpu -- and -- allow offloading of tasks you can't even do on a gpu. For higher end customers that need more fpga space, they'll have co-processor pci-e cards. Even with the margin erosion, by increasing the market size, they will have far more profit than they could by price fixing. Intel sells 100s of M of chips every year. They have the ability to completely destroy Xilinx who has been stagnant, take almost complete FPGA market share, while, simultaneously taking market share from AMD and Nvidia. Brilliant! Intel could lose market cap that would be equivalent to 100% of Xilinx market cap and it would just be a "bad day". They're not in the same playing field. Have you seen what they (Intel) decreased the price of proto chips to? I was pretty shocked. That's going to take a big bite out of Xilinx's 'entry fee' / 'cover charge'. In the next couple of years we'll be buying Stratix 10 PCI-E boards at walmart for $600 a pop.
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HardwareCollector
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May 10, 2018, 05:08:19 PM |
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Have you seen what they (Intel) decreased the price of proto chips to? I was pretty shocked. That's going to take a big bite out of Xilinx's 'entry fee' / 'cover charge'. In the next couple of years we'll be buying Stratix 10 PCI-E boards at walmart for $600 a pop.
But can it run Crysis in 4K @ 60fps? ![Grin](https://bitcointalk.org/Smileys/default/grin.gif)
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senseless
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May 10, 2018, 05:18:30 PM |
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Have you seen what they (Intel) decreased the price of proto chips to? I was pretty shocked. That's going to take a big bite out of Xilinx's 'entry fee' / 'cover charge'. In the next couple of years we'll be buying Stratix 10 PCI-E boards at walmart for $600 a pop.
But can it run Crysis in 4K @ 60fps? ![Grin](https://bitcointalk.org/Smileys/default/grin.gif) No, but it could decode / encode 16 streams of 4K video with <500ms latency simultaneously without stuttering or losing a single frame.
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abudfv2008
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May 10, 2018, 05:30:06 PM |
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So 27pages of blahblablah. Is there any real proof of the declared hashrates on several algos?
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HardwareCollector
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May 10, 2018, 05:32:07 PM |
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So 27pages of blahblablah. Is there any real proof of the declared hashrates on several algos?
No.
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greerso
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May 10, 2018, 06:41:16 PM |
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I'm wanting to try fpga mining on an AWS EC2 instance. It seems anyone that has done/is doing that is keeping the 'how to' close to their chest. BFGMiner seems to be the way to go, but where does one get the bitstream (or in the case of AWS the AFI containing the bitstream)?
After seeing posts saying someone fried an AWS F1 board with 300A, and that now there is a 150W limit but it is only a warning, I did a little searching and found that it appears AWS F1 limits your core power (Vccint) to 85W, which would be 100A at 0.85V. They say they may/will shut you down (gate your clocks) if you exceed this, see https://github.com/aws/aws-fpga/blob/master/hdk/docs/afi_power.mdAlso, someone suggested that since the power supplies are current limited, you could just raise the voltage to lower the current, unfortunately this is not how these chips work. They basically take the same amount of current to do a given job, regardless of voltage. So the lower the voltage, the lower the power. This is why chip makers keep trying to run at lower and lower voltages, since it saves power. There is another power consideration in all these latest generation chips as well, which is static power (as opposed to dynamic), which is due to leakage in the transistors. While dynamic power is linear with voltage, static power (leakage) is non-linear, going up as the square of voltage. It also increases dramatically with temperature. Static power in general has nothing to do with how much work is being done, hence the name "static". Note that raising voltage may make you be able to run faster, but faster means yet more power, since dynamic power is highly dependent on clock rate. You can run certain VU9Ps at 0.72V instead of 0.85V and this will certainly lower your power BUT it also kills your performance by 20-30%. You can also run certain VU9Ps at 0.9V and get higher performance, with the associated higher power. Of course the chip vendors charge a premium for these special devices over the standard ones. So, determining the optimal combination of FPGA size, core voltage, and clock rate is not such a simple task. As mentioned, we are working with the OP on this. Thanks, great information, seem to confirm that this is for software developers only at this point. I can find my way around AWS and linux but cannot code, so waiting until someone releases something to the community or is selling something.
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44ondaflo
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May 10, 2018, 06:55:42 PM |
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This looks very promising. ![Grin](https://bitcointalk.org/Smileys/default/grin.gif) heres for the future ![Grin](https://bitcointalk.org/Smileys/default/grin.gif)
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Feralaz
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May 10, 2018, 06:56:18 PM |
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what a monster
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greerso
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May 10, 2018, 07:41:04 PM |
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45% -- Would have been lower but I lost a LOT in Jan 2018 when shitsmartcash got hacked
Oh yes, that was me. I was controlling the market as much as I could. Most FPGA i ever had at a single time was around 800.
Well, I am jealous and I knew something was up when the prices kept climbing. ![Wink](https://bitcointalk.org/Smileys/default/wink.gif) Don't be, I wasted all my profits flying all over the world trying to raise $5M to build out a huge FPGA mine. All the investors thought it was too good to be true and did not believe that I was mining on AWS. They kept saying "why isn't anyone else doing this", "I love the idea! come see me!", "I want to introduce you to my friend! They're ready to invest! You just need to go see them!". ![Roll Eyes](https://bitcointalk.org/Smileys/default/rolleyes.gif) -- Hey, at least I got to see india, china, hong kong, switzerland, germany, france ![Cheesy](https://bitcointalk.org/Smileys/default/cheesy.gif) . Definitely never going to fly anywhere to meet an investor again though. Are you still mining on AWS and saying that it is still profitable? Did you make your own bitstream and stay within the voltage limits mentioned on this thread?
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ibinsad
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May 10, 2018, 08:23:29 PM |
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I think they already mining Ravencoin with fpga.
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greerso
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May 10, 2018, 08:43:10 PM |
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I think they already mining Ravencoin with fpga.
Who is 'they'? This is interesting. Any information that you can link to?
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HardwareCollector
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May 10, 2018, 10:28:52 PM |
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As it relates to Ravencoin mining with FPGAs, OP will need to store over 300 million bitstreams to account for every possible combination. Better get back to the drawing board because this design will never work. For Ravencoin and Bitcore, the DDR4 is not used for hashing at all, but rather to store hundreds of different FPGA configuration bitstreams, which allows the entire FPGA to rapidly reprogram itself on every block based on the algorithm sequence for that block.
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GPUHoarder
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May 10, 2018, 10:52:31 PM |
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As it relates to Ravencoin mining with FPGAs, OP will need to store over 300 million bitstreams to account for every possible combination. Better get back to the drawing board because this design will never work. For Ravencoin and Bitcore, the DDR4 is not used for hashing at all, but rather to store hundreds of different FPGA configuration bitstreams, which allows the entire FPGA to rapidly reprogram itself on every block based on the algorithm sequence for that block.
Partial reconfiguration - you don’t need every combination, just every building block.
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2112
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May 10, 2018, 11:09:08 PM |
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As it relates to Ravencoin mining with FPGAs, OP will need to store over 300 million bitstreams to account for every possible combination. Better get back to the drawing board because this design will never work.
Partial reconfiguration - you don’t need every combination, just every building block. Yeah, for X16r coins thats 16^2=256, for X16s coins thats 16!/14!=240. Certainly doable.
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HardwareCollector
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May 10, 2018, 11:21:05 PM |
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As it relates to Ravencoin mining with FPGAs, OP will need to store over 300 million bitstreams to account for every possible combination. Better get back to the drawing board because this design will never work.
Partial reconfiguration - you don’t need every combination, just every building block. Yeah, for X16r coins thats 16^2=256, for X16s coins thats 16!/14!=240. Certainly doable. Hmmm, two accelerator cards will be daisy chained with pipelining and their performance will magically double. I will believe it when I see it like all other claims made by the OP.
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senseless
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May 10, 2018, 11:23:23 PM Last edit: May 10, 2018, 11:34:22 PM by senseless |
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Hmmm, two accelerator cards will be daisy chained with pipelining and their performance will magically double. I will believe it when I see it like all other claims made by the OP.
There are some situations where having 2 cards could be beneficial and provide superior hashrates. An example, cubehash on lyra2rev2. The hard part about lyra2rev2 has nothing to do with memory. And, if anyone out there wants to make a FPGA resistant algo, better use a lot of cubehash. It would restrict fpga hashrates, at least temporarily. If lut density doubles or triples again, it would be no problem.
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