[ANN][RIC] Riecoin: constellations POW *CPU* HARD FORK successful, world record

[northranger79510]

God THe deficullty is going crazy

Max difficulty achieved thus far is 1712:

http://www.cs.cmu.edu/~dga/crypto/ric/diff_offset_2014_03_27.png

Which is also the current diff.  I'll get this graph automated over the weekend for at least daily updates so I can stop squawking about it, or commit the tools to generate it into the fastrie github so that someone else can do it easily.

An automated graph would be fantastic!

Well, it's not automated (yet), but I've checked in the plot generation scripts into the fastrie tree so that anyone can generate their own.  Warning:  They're a silly quick hack!  Someone should rewrite them.  I'd love to put an improved version in there...

https://github.com/dave-andersen/fastrie/tree/master/analysis

Thanks dga!

[northranger79510]

Remember to donate when Riecoin Foundation comes out to support Riecoin!

[antonio8]

YPool down?

My miners show connection lost but YPool shows miners connected.

Never mind. They just reconnected.

[northranger79510]

Riecoin Foundation launches tonight. Hopefully Gatra can concentrate more on developing and less on funds and marketing.

[istudy92]

these riecoin prices, with bitcoin prices are really making me just sell out on these coins before it goes any lower=[
fear is being instilled upon me!! 

[northranger79510]

these riecoin prices, with bitcoin prices are really making me just sell out on these coins before it goes any lower=[
fear is being instilled upon me!! 

Yea..it sucks.. But all coins right now is dropping..Look on coinmarketcap.com. Bitcoin is unfortunately the crypto leader right now so all coins follow Bitcoin's price.

[northranger79510]

As long as Gatra doesn't abandon this project though, Riecoin will definitely rise to the top.

[c.figgis]

How are other pools doing right now?

upcpu found 4 blocks last 120 blocks.
infinitypool yet to find a block...

Any reasons for this?

The only publicly available pool server uses the stratum protocol but none of the fast mining clients support stratum. Once that changes we should see a more even distribution between pools.

[gatra]

As long as Gatra doesn't abandon this project though, Riecoin will definitely rise to the top.

I wouldn't abandon my precious!
and even if I did others could continue it, don't despair.
we are all expecting it to rise after stratum pools start to generate blocks and the Riecoin Foundation takes over PR. I think it wouldn't be wise to launch a full blown advertising operation until the network is healthy with many pools, but that's just a few days away.

[bitcoinvideos]

The foundation launches today and steady, heavy PR starts soon as we push this out to the masses!

[northranger79510]

As long as Gatra doesn't abandon this project though, Riecoin will definitely rise to the top.

I wouldn't abandon my precious!
and even if I did others could continue it, don't despair.
we are all expecting it to rise after stratum pools start to generate blocks and the Riecoin Foundation takes over PR. I think it wouldn't be wise to launch a full blown advertising operation until the network is healthy with many pools, but that's just a few days away.

Thanks for the confidence boost Gatra! The foundation is confirming whether the address is working like it should right now. Should be ready momentarily.

[bitcoinvideos]

As long as Gatra doesn't abandon this project though, Riecoin will definitely rise to the top.

I wouldn't abandon my precious!
and even if I did others could continue it, don't despair.
we are all expecting it to rise after stratum pools start to generate blocks and the Riecoin Foundation takes over PR. I think it wouldn't be wise to launch a full blown advertising operation until the network is healthy with many pools, but that's just a few days away.

Thanks for the confidence boost Gatra! The foundation is confirming whether the address is working like it should right now. Should be ready momentarily.

Thanks northranger too for all your work keeping it all together!

[surfer43]

Primecoin GPU miner released.

https://bitcointalk.org/index.php?topic=548230.0

[northranger79510]

There will be a delay in the release of the Riecoin Foundation. We have experiencing technical difficulties with verifying multi-sig in qt wallet. The site will be uploaded tomorrow.

[istudy92]

I guess my discomfort is just from bitcoin being soo low lately.  I hope the fed returns the 200k BTC to investors to create more liquidity within the market once again.
But how long will be..a LONG time..maybe 1 year before BTC of 200k hit the market.

[cphr]

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

It's about 5-10% faster than latest dga sse4-b14 build for me.

Build include 2.25% devfee (1.5% dga, 0.25% jh00, 0.25% clintar, 0.25% cphr). Devfee can be disabled with -d 0 param.

Download link https://mega.co.nz/#!m1g3QRhb!YN83XBhfDrB7dLxtncQmtnp5aV26MfOCABHgVv1017M (only binary files included, use this at your own risk)

Build supports -s parameter as in dga build.

[dga]

I've compiled custom build(windows 64bit) from jh00 xptminer and dga ric core with gmp 6.0.0(not mpir) and avx-i support (Ivy Bridge processors only).

Build include 1% devfee (hardcoded).

Don't you find it a little odd to rip out someone's existing dev fee when there's a mechanism in there to add your own to the stack and ensure that all of the developers continue to have an incentive to work on the software?  I do.  So:

There's now an official build for Windows 64bit against gmp 6.0.0a with avx support at:

http://www.cs.cmu.edu/~dga/crypto/ric/

Along with the existing sse4 version.  I've automated the build for this platform and will continue to maintain it through future releases.  At the same time, I've also added an avx version for Linux.  These have my standard dev fee structure - 2% default (1.5% to me, 0.25% jh00, 0.25% clintar), and you can increase or decrease it from the command line or in the source code as you wish.

cphr, I'd love to talk about a strategy that has the right incentives for everyone.  Just like I think it's great for pools to provide a dev fee mechanism to encourage miner innovation, I think it's important for devs and port maintainers to figure out a reasonable standard of expectation for how to split dev fees in a good way.  Good outcomes would seem to include:
  - Original developers have an incentive to keep developing and improving their software;
  - Original developers want to make it easy for platform-porters to do their ports and keep in sync with the dev version;
  - Platform-porters want to make awesome platform ports and receive a fair fee for doing so.

Any thoughts on the right way to do this in the future?

[antonio8]

@dga

Thanks for the Windows version of avx miner and also for the work you do.

[primer10]

Just wanna thank gatra, dga and not forgetting jh00 and clintar.

Waiting for the day world record is broken   

[madMAx510510]

  asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[0]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[0]) : "r"(op1[0*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[1]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[1]) : "r"(op1[1*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[2]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[2]) : "r"(op1[2*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[3]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[3]) : "r"(op1[3*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[4]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[4]) : "r"(op1[4*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[5]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[5]) : "r"(op1[5*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[6]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[6]) : "r"(op1[6*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[7]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[7]) : "r"(op1[7*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[8]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[8]) : "r"(op1[8*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(r[9]) : "r"(tasm));
   asm( "madc.hi.u32 %0, %1, %2, 0;" : "=r"(tasm) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "mad.lo.cc.u32 %0, %1, %2, %0;" : "+r"(r[9]) : "r"(op1[9*op1_interleaved]), "r"(op2[0*op2_interleaved]));
   asm( "addc.u32 %0, %0, 0;" : "+r"(tasm));
   asm( "add.cc.u32 %0, %0, %1;" : "+r"(c0) : "r"(tasm) );
   asm( "addc.u32 %0, 0, 0;" : "=r"(c1));

I don't get why you have so many adds in there... especially when you have fancy mad.lo.cc.u32/mad.hi.cc.u32 instructions...