ACTUAL Butterfly Labs PCB pics!

[Jack1Rip1BurnIt]

ASICs look like RAM chips on an 8GB DDR3 module lol.

lol?

You do realize that both the word "chip" in "RAM chip" and the "IC" in "ASIC" mean Integrated Circuit, don't you.
And as they are both integrated circuits, it is not really surprising (or humorous) that they look similar when soldered onto a board.

Is there any way to tell what process was used to make the device just from pictures? 130nm?

Nah, from the shade of gray I'd say it's most probably 65nm.

Wow. Just wow.
The level of ignorance on this Forum sometimes astounds me.

They're friggen dark grey squares with no markings, how the hell is anyone supposed to determine the technology used.
(X-ray vision does not work over the Interwebs.)

If the parts were even ever marked at some point (and early engineering samples often are not) you can be sure that BFL would have sanded the markings off like they did with the Atratix chips in their previous generation products.

And yes, I know it's "Stratix", not "Atratix", I just find it funny how people have been quoting the original typo without ever realizing it.

I don't know that's all I was asking? Don't have a holy-fucking-shit-coniption. I've just heard a lot of talk about "I wonder what technology they're gonna use?" and was just wondering if there is a way to tell other than hooking the fuckers up to a computer or something. That's all, get it? The question was answered immediately after I asked it. Just sayin'

[Mobius]

.... scheduled to be released in late November or December.

 

Oh for fucks sake.

If it gets delayed anymore the SC is going to be allocated as "Andrew's Christmas present" by the Mrs

O.o

or Valentine's Day.

[Xfinity]

I can't wait for my singles to arrive anymore, thanks for posting the pics.

[dani]

it looks nice. i like the heatpipes and copper. I see one connector for fans on the front (on bfl website) and 1 pin on the backside that may belong to another fan connector (i know they are not called "fan connector", 3pin connector? whatev). i really hope those are meant for the sc minirig, because otherwise i assume they are planned for cooling the single actively.

If not 60watt seem legit for a cooler that size. Hm..

[The-Real-Link]

Woohoo pics!  Thanks.

[dani]

The Single SC as a whole will have a base area of 98x98mm fully assembled, and will be 74mm high

according to http://bitcoinmagazine.net/butterfly-labs-releases-more-asic-photos/ and looking at the picture of an single bfl shwos on there website, i see there must be some "air" above the cooler.
comparing heigth vs length (74mm vs 98mm) there must be like 2/3 of it made of air (speaking of the heigth). more than enough space for a fan.
But maybe they just like to build something similiar lookin to their fpga, wasting space for no use at all. Whats it gonna be?

[ngzhang]

I think it's about 30Gh for one board if they are using 65nm, or 60Gh preboard if they are using 40nm.
And i think there must be another heat sink at the backside of the board.

[cedivad]

I think it's about 30Gh for one board if they are using 65nm, or 60Gh preboard if they are using 40nm.
And i think there must be another heat sink at the backside of the board.

So you suppose a low nanometer product, this would agree with a low power usage, do you think their estimates to be possible?

[Unacceptable]

it looks nice. i like the heatpipes and copper. I see one connector for fans on the front (on bfl website) and 1 pin on the backside that may belong to another fan connector (i know they are not called "fan connector", 3pin connector? whatev). i really hope those are meant for the sc minirig, because otherwise i assume they are planned for cooling the single actively.

If not 60watt seem legit for a cooler that size. Hm..

The heatsink your looking at is the one currently used on the FPGA Single (they have not updated the pic as of yet to an image of a ASIC ),which consumed 80 watts & was designed for a 72F enviroment.

But they may be able use something similar on the ASIC,just beefed up a little to allow it to operate in an environment of 90F this time.

[ngzhang]

I think it's about 30Gh for one board if they are using 65nm, or 60Gh preboard if they are using 40nm.
And i think there must be another heat sink at the backside of the board.

So you suppose a low nanometer product, this would agree with a low power usage, do you think their estimates to be possible?

my estimates all based on their announced specifications. it's a backward induction.

[ngzhang]

it looks nice. i like the heatpipes and copper. I see one connector for fans on the front (on bfl website) and 1 pin on the backside that may belong to another fan connector (i know they are not called "fan connector", 3pin connector? whatev). i really hope those are meant for the sc minirig, because otherwise i assume they are planned for cooling the single actively.

If not 60watt seem legit for a cooler that size. Hm..

The heatsink your looking at is the one currently used on the FPGA Single (they have not updated the pic as of yet to an image of a ASIC ),which consumed 80 watts & was designed for a 72F enviroment.

But they may be able use something similar on the ASIC,just beefed up a little to allow it to operate in an environment of 90F this time.

a major issue is the FPGA they are using (e.g. Altera S3) is a flip-chip package. and their ASIC is low cost wire-bond QFN. this package glue the DIE to the metal GND pad at the bottom. the θJb (to board)is low but the θJt (to top) is high. so it won't work whatever you do from the top.

my question is, as a ASIC developer too, i will prepare everything before our chip comes back, and will know if it work or not in a few hours test. now there are well assembled board pictures, but still no testing data.

why?

[BFL-Engineer]

Just as a side note, the board is 92mm X 92mm.

Regards,
Nasser

[Unacceptable]

it looks nice. i like the heatpipes and copper. I see one connector for fans on the front (on bfl website) and 1 pin on the backside that may belong to another fan connector (i know they are not called "fan connector", 3pin connector? whatev). i really hope those are meant for the sc minirig, because otherwise i assume they are planned for cooling the single actively.

If not 60watt seem legit for a cooler that size. Hm..

The heatsink your looking at is the one currently used on the FPGA Single (they have not updated the pic as of yet to an image of a ASIC ),which consumed 80 watts & was designed for a 72F enviroment.

But they may be able use something similar on the ASIC,just beefed up a little to allow it to operate in an environment of 90F this time.

a major issue is the FPGA they are using (e.g. Altera S3) is a flip-chip package. and their ASIC is low cost wire-bond QFN. this package glue the DIE to the metal GND pad at the bottom. the θJb (to board)is low but the θJt (to top) is high. so it won't work whatever you do from the top.

my question is, as a ASIC developer too, i will prepare everything before our chip comes back, and will know if it work or not in a few hours test. now there are well assembled board pictures, but still no testing data.

why?

To build suspense in us doe eyed fools??? 

[bce]

Here is a full-sized side by side wallpaper  .

[kano]

Just as a side note, the board is 92mm X 92mm.

Regards,
Nasser

... and the hand in the OP is fake right ...
Photoshop FTW

Was it scaled correctly or is that one a little off?

The 2nd post looks real, but I think the 1st hand is a Photoshop.

Edit: the thumb shadow gives it away

[makomk]

a major issue is the FPGA they are using (e.g. Altera S3) is a flip-chip package. and their ASIC is low cost wire-bond QFN. this package glue the DIE to the metal GND pad at the bottom. the θJb (to board)is low but the θJt (to top) is high. so it won't work whatever you do from the top.

Yeah, that was one of the first things I noticed too. They've basically got the entire thickness of the plastic chip package insulating their die from the heatsink that's meant to be cooling it.

my question is, as a ASIC developer too, i will prepare everything before our chip comes back, and will know if it work or not in a few hours test. now there are well assembled board pictures, but still no testing data.

And that's the other one. At this point I don't even believe major hardware manufacturers who show off pretty boards without bothering to mention little details like whether they actually work; NVidia famously pulled off a similar stunt, for instance.

[Zeek_W]

Here is a full-sized side by side wallpaper  .

Do my eyes decieve me, but does ASIC chip 4 (1st on second row) look like its bulged out?
 
POP!

[Raoul Duke]

Here is a full-sized side by side wallpaper  .

http://www.anonmgur.com/up/746d0a6ba54410ec39c8209abd266dc1.jpg

Do my eyes decieve me, but does ASIC chip 4 (1st on second row) look like its bulged out?
 
POP!

Those ASICS look like a square piece of black duct tape lol

[dirtycat]

other than the weird bulged out one.. they look great but do they work?

[PuertoLibre]

other than the weird bulged out one.. they look great but do they work?

With a bulge that big I doubt it. It wouldn't mate evenly with the HeatSink.

Might be a defective board they are holding in front of the camera.