[ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE!

[cscape]

Can antone tell me how many bitfury's can be chained?
Ive seen the proven 16 bitfury design. metabank has multiple chains.
Nowhere is listed how many you can put on one chain.

There's no hard limit, but more chips increases the chance of a single bad chip blocking the communication. Also, the longer the chain, the slower the communication. First generation M/H board design has 256 chips in a single chain, 2nd generation has 4x64.

[1685932695]

1685932695

[KNK]

Can antone tell me how many bitfury's can be chained?
Ive seen the proven 16 bitfury design. metabank has multiple chains.
Nowhere is listed how many you can put on one chain.

No there is no such information and there are no limits from the chips themselves, but ...

There are 2 types of limiting factors involved:
 [1] RPi (or other device) processing power, which applies to both single and multiple chains, but also on software.
 [2] each chip in the chain adds some delay, which results in lower SPI speed required in order to successfully communicate with the last chip in the chain, then at some point your SPI communication will be too slow to walk all the chips in the chain in time before they need new work.

BSB has 4 boards of 16 chips each in a chain, so 64 chips are proven to work. I have read somewhere about 100 chips working in a chain and about 400, but not sure if in a single chain or just on the same RPi.
Going for more than 150-200 in a chain is unreasonable because of [2] and more than 350-450 total because of [1] which is close to those 100 and 400 numbers above

[Bitware]

I'll throw my hat in the ring to test these if needed.

[KNK]

I'll throw my hat in the ring to test these if needed.

No problem! Send me one reel of chips and I'll send you back 4 chains of 98 chips for testing ... you will need a PSU which gives 80V DC and 10A

[kano]

Can antone tell me how many bitfury's can be chained?
Ive seen the proven 16 bitfury design. metabank has multiple chains.
Nowhere is listed how many you can put on one chain.

No there is no such information and there are no limits from the chips themselves, but ...

There are 2 types of limiting factors involved:
 [1] RPi (or other device) processing power, which applies to both single and multiple chains, but also on software.
 [2] each chip in the chain adds some delay, which results in lower SPI speed required in order to successfully communicate with the last chip in the chain, then at some point your SPI communication will be too slow to walk all the chips in the chain in time before they need new work.

BSB has 4 boards of 16 chips each in a chain, so 64 chips are proven to work. I have read somewhere about 100 chips working in a chain and about 400, but not sure if in a single chain or just on the same RPi.
Going for more than 150-200 in a chain is unreasonable because of [2] and more than 350-450 total because of [1] which is close to those 100 and 400 numbers above

The V2 controller from BlackArrow, with the BlackArrow Fury boards, supports up to 384 chips
The V2 controller has 4 SPI 10pin connectors that allows 6 boards each SPI chain - so 24 boards.
... yes that's running on an RPi
From a software POV it's 4 banks of 6 boards i.e. the same thing as the V2 bfsb code.

[MrTeal]

I'll throw my hat in the ring to test these if needed.

No problem! Send me one reel of chips and I'll send you back 4 chains of 98 chips for testing ... you will need a PSU which gives 80V DC and 10A

From that message, it sounds like you're talking not only about chaining the SPI bus, but also running strings of Vdd similar to what Metabank is doing with their new cards.

Have you actually played around with this? I have a few BF chips still sitting around that I wouldn't mind playing with, and I'm curious how you'd handle fault tolerance and load balancing in such a setup.

[KNK]

Have you actually played around with this?

Quite a lot. I have a board from 14 chips running from 12V and they can be chained for higher voltage. My initial idea was to make a string for 220V AC directly, but that won't be easy and cheep enough to do properly and in addition it's dangerous, so i gave up on that.

Here is an old setup from November at 12V
And this is a fresh one from few minutes ago at 24V

The bold red lines are missing/nonworking chips - they should be at the end of the chain and replaced with diodes if missing. It is possible to 'skip' a single non working chip in the middle of the chain by changing the SPI resistor dividers, but it's easier to replace or move them at the end.

Most of the HW errors are actually software errors (chip starts working on the old job because the new one has not been sent yet), so i am working on a new driver based on the cgminer's BAB driver, but still have some problems to understand the internal work queue API and workflow and the lack of time lately is adding to the delay

EDIT: and the passive cooled miner itself No fans, no noise. 'Smart aluminium heater' and the back can be populated too ... if there's chips

[MrTeal]

Have you actually played around with this?

Quite a lot. I have a board from 14 chips running from 12V and they can be chained for higher voltage. My initial idea was to make a string for 220V AC directly, but that won't be easy and cheep enough to do properly and in addition it's dangerous, so i gave up on that.

Here is an old setup from November at 12V
And this is a fresh one from few minutes ago at 24V

The bold red lines are missing/nonworking chips - they should be at the end of the chain and replaced with diodes if missing. It is possible to 'skip' a single non working chip in the middle of the chain by changing the SPI resistor dividers, but it's easier to replace or move them at the end.

Most of the HW errors are actually software errors (chip starts working on the old job because the new one has not been sent yet), so i am working on a new driver based on the cgminer's BAB driver, but still have some problems to understand the internal work queue API and workflow and the lack of time lately is adding to the delay

EDIT: and the passive cooled miner itself No fans, no noise. 'Smart aluminium heater' and the back can be populated too ... if there's chips

Very nice. It sounds like you're testing each board and moving chips around/replacing them based on their performance and/or whether they're dead or not. Have you considered any methods to remove a dead chip from the chain without actually having to rework the board?

[KNK]

Very nice. It sounds like you're testing each board and moving chips around/replacing them based on their performance and/or whether they're dead or not. Have you considered any methods to remove a dead chip from the chain without actually having to rework the board?

Well ... not exactly. This is the prototype, so it was designed to make tests and moving things around easier. The problem was that i had lots of bad chips (https://bitcointalk.org/index.php?topic=242745.msg3538767#msg3538767 ) - from 120 purchased the first two boards didn't start at all, so had to replace some chips and the end result is 111 of those 120 working or over 8% waste.

I have considered designing the new board in a way that will allow skipping a dead chip (by changing the resistor diver on SPI as stated earlier), but that makes the board huge and no longer single layer board (with only chip grounds on the bottom), so the next decision was to make shorter strings of 7 chips and be able to skip the whole link until it's fixed. It is not possible to skip a chip with a simple jumper as in the BFSB boards, because here there are different voltage levels at each chip.

As you can see from the pictures above most chips are at 54 clock, but some are at 55 - that's how they are balanced in performance, not by replacing the chips or moving them around.

[adib]

An update on my m-board DIY project:




The schematic has been modified a little bit from the original design(on the fly).
The copper layer is now on the bottom, i am expecting the pieces needed to repair the power module on the H-cards next week.
Ill update the schematic also next week.
The H-card are empty, yes, im expecting some bitfury chips for testing, any donations(even bad chips)/trade/selling of chips are welcome.

Hope ill get them running.
As i understand one of these boards should be seen as 1 bank by the Rpi.

Keeping my fingers crossed and time to clean up those H-cards.

[kano]

Sigh, people wasting their time reproducing the exact same hardware+firmware will get the exact same problem of HW errors.

Other than the fact that I've reduced that as low as possible in my bab driver in cgminer, (with a CPU usage trade off) the problem is the design.

There is nothing to clearly associate a nonce with the work sent.
It's unbelievable how stupid that problem is and how simple it is to fix.
Fix in design is to send an ID with the work and send the ID with the nonce reply.
End of problem - and my super smart nonce checking code can be removed
(yes that's a joke - there's nothing special about my nonce fix - it's just simple logic - oh and a few bugs from chainminer fixed)

P.S. KNK I don't care if you wish to reproduce my PM reply in public. Feel free to do so.

Edit: I've set the default limit in cgminer to 55 and on my BlackArrow board ... and it runs:
[Fast 0-15] => 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55

[KNK]

There is nothing to clearly associate a nonce with the work sent.
It's unbelievable how stupid that problem is and how simple it is to fix.
Fix in design is to send an ID with the work and send the ID with the nonce reply.

The chip design is what it is and it can't be fixed for this, but the next chip (design)
Yes, there is a simple fix and without much CPU usage trade off.

P.S. I didn't mean to offend you and definitely do not want to start a flame war as I saidwrote

[adib]

Sigh, people wasting their time reproducing the exact same hardware+firmware will get the exact same problem of HW errors.

Im using what i can afford and as i said im a DIY kindda guy, so i woulnt judge.
and i admit i dont have much experience with those chips.

[kano]

There is nothing to clearly associate a nonce with the work sent.
It's unbelievable how stupid that problem is and how simple it is to fix.
Fix in design is to send an ID with the work and send the ID with the nonce reply.

The chip design is what it is and it can't be fixed for this, but the next chip (design)
Yes, there is a simple fix and without much CPU usage trade off.

P.S. I didn't mean to offend you and definitely do not want to start a flame war as I saidwrote

Although this has USB specific information in it, most of it applies to any mining hardware:

https://bitcointalk.org/index.php?topic=294499.0

(yeah the lack of any temperature sensors anywhere sux also)

[adib]

Update:


Got 4 chips, 3 working, 1 one i think i busted because i didnt check if the 1.8v line was ok on one of the H-cards(H-card still fixable, jut got to remove the connections as they lead to GND and make new ones on air wires ).

Out of the 5 H-cards repaired, 4 are confirmed to work.
Pictures and schematics doon.

[intron]

Update:


Got 4 chips, 3 working, 1 one i think i busted because i didnt check if the 1.8v line was ok on one of the H-cards(H-card still fixable, jut got to remove the connections as they lead to GND and make new ones on air wires ).

Out of the 5 H-cards repaired, 4 are confirmed to work.
Pictures and schematics doon.

Will send you some more chips to play with:)

[adib]

After turning this: into this: and this: into this: ,
because there were no 0603 220k resistors in stock.


The result: , ,

P.S. Thanks intron for the help and support

4 boards fixed and accepting chips

Schematic:
TOP VIEW


BOTTOM VIEW


NOTES:
- ONLY USE V2 CHAINMINER SOFTWARE AS THE SCHEMATIC IS BASED ON THAT, its actually a bank of the v2 m-board
- tried to keep air wires to a minimum (8 to be exact)
- LM2596 power module should be placed exactly where it is placed on the layout, otherwise youll have trouble in placing the H-cards, youll have some tolerance if you use flexible wires.
- Scale is 1:1 so i did not bother to place dimensions
- full resolution images here:  https://www.dropbox.com/sh/yl0fov35cmv3r7p/gR4W5vdL6W
- pins on the slots are a bit tighter then they should be so youll have to bend the first 4 pins on each side inwards a bit (made them from the hip)

I have decided to stop making other version... aka the 8,12 or 16 slot versions although you can adapt as you see fit.
You can also connect 4 m-boards with 4 slots toghether like so:

full image here: https://www.dropbox.com/sh/yl0fov35cmv3r7p/gR4W5vdL6W

[pinkfloyd11]

Hello

The new bitfury chip will have the same pinout?

There will be improvement in Ghash/s?

Thanks

[punin]

The new bitfury chip will have the same pinout?

Our rev2 55nm chip is in the same 7mm punch-type QFN48 package with identical pinout to the rev1 55nm (summer 2013).

There will be improvement in Ghash/s?

Yes. Our preliminary tests show 25% increase in hashrate and 25% lower power consumption. We will receive new chips tomorrow and will have samples available to developers.

[vs3]

Yes. Our preliminary tests show 25% increase in hashrate and 25% lower power consumption. We will receive new chips tomorrow and will have samples available to developers.

Can you add me to the list for samples please?