[CLOSED] Bitmine CoinCraft A1 28nm chip distribution / DIY support

[papamoi]

Update: Chips arrived and re-shipped


Chip Distribution
Bitmine received the first lot of chips on Thursday. Orders that have been paid by then where shipped on Friday, the remaining ones will do after I receive the payment in full.

With that, also the 2nd wave of samples have been sent / will be sent on Monday to

Code:

Michael S.
vs3
savetree
goxed
goodney
zulunation
papamoi
1am3r

Good Luck with your designs.


New Terms for free Sample Chips
In the past few days I received around 30 requests for samples. While glad to hear about so many DIYers, given the fact that most of them were from folks just registered to the forum, I need to assume the service is misinterpreted as free chips giveaway.

Generally, with the availability of the A1 in volumes, the distribution of free sample chips ended. For serious developers I will still left a supply option open, but to distinguish them from free-riders I have to adapt the terms as follows: 2 sample chips are shipped to developers at their effective costs of $250. That amount will be deducted from the payment of that developer's first order of 50+ chips - with that they effectively become free samples again.

I'm sure you agree that this change is required to be able to provide best support to the serious developers.

ok thanks for this zefir

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[zefir]

What about hobbyists that just want to buy a few chips to experiment with, how are they being catered for?

Where do you draw the line here? Aren't hobbyists part of the DIY scene, or what would be your classification of a hobbyist?

I believe making chips available in lots of 50 is exactly aiming at hobbyists. Or are you saying there are people out there investing time to develop some mining boards and then produce only one of them? I won't expect that, i.e. if someone has a working board, he should have a vital interest to order at least 50 chips.

Please let me know if I am not aware of common use-cases out there and I will consider.

[erk]

What about hobbyists that just want to buy a few chips to experiment with, how are they being catered for?

Where do you draw the line here? Aren't hobbyists part of the DIY scene, or what would be your classification of a hobbyist?

I believe making chips available in lots of 50 is exactly aiming at hobbyists. Or are you saying there are people out there investing time to develop some mining boards and then produce only one of them? I won't expect that, i.e. if someone has a working board, he should have a vital interest to order at least 50 chips.

Please let me know if I am not aware of common use-cases out there and I will consider.

There are plenty of people that just make a miner for the heck of it, other people take their design and make more boards.

Just see the Bitfury thread for a raft of examples.

https://bitcointalk.org/index.php?topic=228677.0

[stevebrowne]

Are any 3rd party board developers likely to be producing populated cards to go into the Coincraft Desk or Coincraft Rigs?  There will be a number of people getting an extra chassis with their 10% customer protection bonuses, and likely to have empty slots. Bitmine aren't currently advertising cards to plug into existing chassis, so maybe a good market for someone to target?

[marto74]

screen capture software

[MrTeal]

Nice Marto. What's the power draw like at 30GH/s per chip, and what voltage are you running?

[totalslacker]

So I'm in the final stages of PCB layout here (hoping to release the board today or tomorrow). Still one question is pending however: are there any sequencing restrictions on bringing up the IO/analog and core voltage supplies for the A1? I'm currently planning to bring up IO, then the core supply - will this be ok?

I've asked Bitmine as well and the question has been forwarded to engineers but no reply as yet.

Thanks for any help!

[Cheshyr]

So how is everyone handling the cgminer integration?  

The https://github.com/bitmine-ch/cgminer branch that Zefir put so much excellent work into is a bit deviant from the https://github.com/ckolivas/cgminer I'd been using.  There are features in the ckolivas version that I'd like to use, so what's the standard procedure here?  Fork/branch ckolivas version, integrate the A1 bits, then see what it takes to pull and merge it back?

[loshia]

So how is everyone handling the cgminer integration?  

The https://github.com/bitmine-ch/cgminer branch that Zefir put so much excellent work into is a bit deviant from the https://github.com/ckolivas/cgminer I'd been using.  There are features in the ckolivas version that I'd like to use, so what's the standard procedure here?  Fork/branch ckolivas version, integrate the A1 bits, then see what it takes to pull and merge it back?

Depends on the design and i/o USB communication protocol. There will be patch fro Technobit I beleive but it will be specific to their design. Actually there is some code released in their latest version

[zefir]

So how is everyone handling the cgminer integration?  

The https://github.com/bitmine-ch/cgminer branch that Zefir put so much excellent work into is a bit deviant from the https://github.com/ckolivas/cgminer I'd been using.  There are features in the ckolivas version that I'd like to use, so what's the standard procedure here?  Fork/branch ckolivas version, integrate the A1 bits, then see what it takes to pull and merge it back?

Depends on the design and i/o USB communication protocol. There will be patch fro Technobit I beleive but it will be specific to their design. Actually there is some code released in their latest version

So far it seems I have been the only one using it - if and when the user base broadens, the correct way is to a) clean the code up, b) rebase it on current cgminer head, and c) get it accepted upstream. Since this needs some initial and ongoing maintenance effort, I need to know if anyone is using the driver as-is for own designs.

And that is one point: all designs currently being worked on are based on existing drivers already integrated in cgminer. Take marto74's for example: the uC on the 8-chip board will encapsulate the control of the A1 chips and to cgminer that board will look like any other HEX based one, fully accessible with the existing driver. Same goes for WASP, burnin, intron. My driver is meant to attach to a system's SPI port directly and most probably will serve only as template for full featured drivers or initial testing.

So I'm in the final stages of PCB layout here (hoping to release the board today or tomorrow). Still one question is pending however: are there any sequencing restrictions on bringing up the IO/analog and core voltage supplies for the A1? I'm currently planning to bring up IO, then the core supply - will this be ok?

I've asked Bitmine as well and the question has been forwarded to engineers but no reply as yet.

There are no related restrictions documented or known and I am not aware that anyone from the working designs is keeping some defined bring-up order. The only requirement documented is the reset sequence (1s low, then 1s high before first command is sent).

[marto74]

12 hour stable

photo share

[loshia]

12 hour stable

photo share

Insane reject ratio of 0.14% only  
I am wandering how you do that having in mind what the usual reject rate is at btcguild?
And hw error % looks perfect also.

[loshia]

I am wandering how you do that having in mind what the usual reject rate is at btcguild?

Marto had his A1 boards ready since 18th December, that's how he's so quick, then he fine tunes them by adding capacitors to the pre-production models. Martin told me once they may look ugly but they work better that way! Later production runs replace the ugly big capacitors with micro ones. What he finally delivers don't look like the ugly pre-production pictures on the web site! Everything looks professional like it came from a big manufacturer.

It is software dude. Both pic and cgminer. Hw errors may be capacitors related

[Cheshyr]

So far it seems I have been the only one using it - if and when the user base broadens, the correct way is to a) clean the code up, b) rebase it on current cgminer head, and c) get it accepted upstream. Since this needs some initial and ongoing maintenance effort, I need to know if anyone is using the driver as-is for own designs.

My driver is meant to attach to a system's SPI port directly and most probably will serve only as template for full featured drivers or initial testing.

I've seen mention of 2 different single-chip or direct-connect boards in this thread so far, and 2 of our projects involving the A1 are also going to start as USB-SPI direct.  My only sadness is that the bitmine.ch branch doesn't have MCP2210 support or official RPi support, and the main cgminer does, so I've got features in both versions that I want to use.  I started diffing them last night, but wanted to check the procedure first.  Thanks.

[totalslacker]

So I'm in the final stages of PCB layout here (hoping to release the board today or tomorrow). Still one question is pending however: are there any sequencing restrictions on bringing up the IO/analog and core voltage supplies for the A1? I'm currently planning to bring up IO, then the core supply - will this be ok?

I've asked Bitmine as well and the question has been forwarded to engineers but no reply as yet.

There are no related restrictions documented or known and I am not aware that anyone from the working designs is keeping some defined bring-up order. The only requirement documented is the reset sequence (1s low, then 1s high before first command is sent).

OK, thank you!

[intron]

Received 50 A1 samples, thank you for that Zefir.

[vs3]

I've got some goodies too! :-)

Thanks Zefir!

[ernie-]

I've got some goodies too! :-)

Thanks Zefir!

Are you going to to an open source board design for it?

[vs3]

I've got some goodies too! :-)

Thanks Zefir!

Are you going to to an open source board design for it?

I am considering that. But no promises yet.

I have a little bitter taste left from the previous open-source design - which took a lot of work and energy to get it to its current and complete state, and I see a lot of people enjoying the benefits of it, except that I'm still paying the bills. And I still owe to the other people (including Luke) who did such an awesome work to get it to where it currently is.

[Bicknellski]

I've got some goodies too! :-)

Thanks Zefir!

Are you going to to an open source board design for it?

I am considering that. But no promises yet.

I have a little bitter taste left from the previous open-source design - which took a lot of work and energy to get it to its current and complete state, and I see a lot of people enjoying the benefits of it, except that I'm still paying the bills. And I still owe to the other people (including Luke) who did such an awesome work to get it to where it currently is.

vs3. You are always welcome to throw some of your sweat into our project we'd love to have you.