Thanks for reply.
I made a simple board for one chip. And it is ok.
I want to build something similar.
I think you have the following layer stack:
top - power plane and jumpers (if any chip will be damaged)
layer1 - Ground and SPI connection between chips
layer2 - Ground and IOVDD conection
bottom - Ground plane
Am i correct?
A small board with a single bitfury can be a bi-layer indeed.
Wouldn't take changes when making a board with many ASICs
Here you can see the different layers:
<image removed>
Layer top is Vcore (0V6..0V9), rest is GND with vertical
going wires on layer 3 and horizontal going wires
going on layer 2. Except near the upper edge
were current density is low. Layer bottom is also GND.
In the power section layer top is also GND.
intron
Thanks intron for sharing the board layers.
It is not very clear how do you connect the grounds together.
As i understand the chips 49 pin (GND) is connected to the blue (lowest ground). Also the capacitors near the chips goes to the lowest ground. Am i correct?
There are also a lot of vertical vias. Do they connect the yellow and green grounds?
The ground tab of the ASIC has an 5x5 array of vias
connecting all layers together. Same holds for the
decoupling caps: one terminal is connected to the
top layer (Vcore), the other terminal is connected to
layer 1, 2 and bottom using a via. You don't see the
copper pours in the image for clearity.
These strips of vias connecting all ground planes
together are there to make sure the return path of
the currents are un-interrupted. And as vias are
(almost) free, I do a lot. Just in case:)
intron
